公开(公告)号：US06677200B2

公开(公告)日：2004-01-13

申请号：US10194182

申请日：2002-07-12

申请人： Chang-Hyun Lee ,  Jung-Dal Choi ,  Sung-Hoi Hur

发明人： Chang-Hyun Lee ,  Jung-Dal Choi ,  Sung-Hoi Hur

IPC分类号： H01L213366

CPC分类号： H01L29/792 ,  H01L21/28282 ,  H01L29/66833 ,  Y10S438/954

摘要： A method of forming a non-volatile memory having a floating trap-type device is disclosed in the present invention. In the method, a relatively thick thermal oxide layer is formed at a semiconductor substrate and patterned to leave a thick thermal oxide pattern at a high-voltage region (a high-voltage region defining step). An oxide-nitride-oxide (ONO) layer is formed over substantially the entire surface (the substantial surface) of the semiconductor substrate and patterned to leave an ONO pattern at a cell memory region (a cell memory region defining step). After the high-voltage region defining step and the cell memory region defining step, a thermal oxidizing process is performed with respect to the semiconductor substrate where a low-voltage region is exposed, thereby forming a relatively thin gate insulation layer for a low-voltage type device (a low-voltage region defining region).

摘要翻译： 在本发明中公开了形成具有浮动陷阱型装置的非易失性存储器的方法。 在该方法中，在半导体衬底上形成相对较厚的热氧化物层，并将其图案化以在高电压区域（高电压区域限定步骤）处留下厚的热氧化物图案。 在半导体衬底的基本上整个表面（基本表面）上形成氧化物 - 氧化物（ONO）层，并将其图案化以在单元存储区（单元存储区定义步骤）处留下ONO图案。 在高电压区域定义步骤和电池存储区域限定步骤之后，对于暴露低电压区域的半导体衬底进行热氧化处理，从而形成用于低电压的较薄的栅极绝缘层 （低电压区域限定区域）。