公开(公告)号：WO1997006559A2

公开(公告)日：1997-02-20

申请号：PCT/DE1996001477

申请日：1996-08-07

Applicant: SIEMENS AKTIENGESELLSCHAFT ,  PLASA, Gunther

Inventor： SIEMENS AKTIENGESELLSCHAFT

IPC: H01L21/8247

CPC classification number: H01L27/11521 ,  H01L29/66825

Abstract: A process for producing a non-volatile memory cell is disclosed. The desired polysilicon structure is masked by an oxidation-inhibiting layer, preferably a nitride layer. The polysilicon above the source/drain regions and field effect regions is then converted into silicon dioxide. The interval between adjacent polysilicon paths is thus filled with silicon dioxide. The conversion of polysilicon also increases the field oxide thickness in the field effect regions. A second polysilicon layer is applied on a field effect region so as to include the oxidation-inhibiting layer located therein, and one capacitor electrode is formed therefrom by masking and etching. The first polysilicon layer below the oxidation-inhibiting layer forms the other capacitor electrode and the oxidation-inhibiting layer forms the dielectric. The advantages of the invention consist in a less complex masking and etching technique and in an improved reliability of the components.

Abstract translation: 将描述用于非易失性存储单元的制造方法。 所需的多晶硅结构由抗氧化层，优选掩蔽的氮化物形成。 随后，在多晶硅在源/漏区和场区的转化中二氧化硅被执行。 相邻的多晶硅轨道之间，同时用二氧化硅填充发生。 另外，在字段区，场氧化物厚度增加了多晶硅的转换。 在字段区域，第二多晶硅层被施加，包括本有氧化抑制层。 通过标记和蚀刻产生从中电容器的电极，来其中所述第一多晶硅的氧化抑制层，另一电极和所述氧化抑制层形成介电底层。 本发明的优点是在较不复杂的掩模和蚀刻技术和改进的器件的可靠性。

公开(公告)号：WO2000028576A2

公开(公告)日：2000-05-18

申请号：PCT/DE1999003602

申请日：1999-11-11

Applicant: INFINEON TECHNOLOGIES AG ,  BRAUN, Helga ,  KAKOSCHKE, Ronald ,  STOKAN, Regina ,  PLASA, Gunther ,  KUX, Andreas

Inventor： INFINEON TECHNOLOGIES AG

IPC: H01L

CPC classification number: H01L23/573 ,  H01L21/28512 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The invention relates to a method for producing a wiring extending at least partly in the substrate. The invention is characterized in that it provides for at least one conductive connection extending in the semiconductor substrate and at least one conductive connection extending on said semiconductor substrate. The semiconductor component provided for by the invention permits applications requiring good security against external manipulation.

Abstract translation: 根据本发明，用于制备至少分段在基板配线延伸，其中至少一个在所述半导体衬底，导电性连接部和至少一个所述半导体衬底上运行运行中，提供了导电连接的方法，提供了。 本发明的半导体组件使得其需要针对外部操作高安全性的应用程序。

公开(公告)号：WO0019441A2

公开(公告)日：2000-04-06

申请号：PCT/DE9903135

申请日：1999-09-29

Applicant: SIEMENS AG ,  WEBER WERNER ,  THEWES ROLAND ,  PLASA GUNTHER

Inventor： WEBER WERNER ,  THEWES ROLAND ,  PLASA GUNTHER

IPC: G11C11/14 ,  G11C11/15 ,  G11C11/16 ,  H01F10/08 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/22 ,  H01L43/08

CPC classification number: G11C11/16 ,  H01L27/222

Abstract: The invention relates to a magnetoresistive memory having improved interference immunity while keeping the chip surface small. Interference immunity is improved by arranging word lines vertically between two complementary bit lines. Also, a magnetoresistive memory system of a regular cell is provided between a bit line and a word line, and a pertaining magnetoresistive layer system of a complementary memory cell is provided between the complementary bit line and the word line.

Abstract translation: 本申请的主题涉及一种磁阻存储器，其中，在低的芯片面积，从而提高了抗噪声能力，实现在两个互补的位线之间垂直地设置线这个词，和一个位线和字线，常规小区的和互补的位线之间的磁电阻存储器系统之间，并且 字线提供一个互补的存储器单元的相关联的磁阻层系统。

公开(公告)号：WO9706559A3

公开(公告)日：1997-03-20

申请号：PCT/DE9601477

申请日：1996-08-07

Applicant: SIEMENS AG ,  PLASA GUNTHER

Inventor： PLASA GUNTHER

IPC: H01L21/336 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

CPC classification number: H01L27/11521 ,  H01L29/66825

Abstract: A process for producing a non-volatile memory cell is disclosed. The desired polysilicon structure is masked by an oxidation-inhibiting layer, preferably a nitride layer. The polysilicon above the source/drain regions and field effect regions is then converted into silicon dioxide. The interval between adjacent polysilicon paths is thus filled with silicon dioxide. The conversion of polysilicon also increases the field oxide thickness in the field effect regions. A second polysilicon layer is applied on a field effect region so as to include the oxidation-inhibiting layer located therein, and one capacitor electrode is formed therefrom by masking and etching. The first polysilicon layer below the oxidation-inhibiting layer forms the other capacitor electrode and the oxidation-inhibiting layer forms the dielectric. The advantages of the invention consist in a less complex masking and etching technique and in an improved reliability of the components.

Abstract translation: 一种用于制造存储单元的方法包括用氧化抑制层（优选氮化物层）掩蔽期望的多晶硅结构。 然后将源极/漏极区域和场区域上的多晶硅转化为二氧化硅。 同时，在相邻的多晶硅路径之间进行填充二氧化硅。 通过场区域中的多晶硅的转化也增加了场氧化物厚度。 在场区域上施加第二多晶硅层，其中存在氧化抑制层。 通过使用标记和蚀刻从而产生电容器的一个电极，其中位于氧化抑制层下方的第一多晶硅形成另一电极，氧化抑制层形成电介质。 该结构提供了较不复杂的掩模和蚀刻技术以及提高部件的可靠性。