Abstract:
The present invention is to provide a method and an apparatus of uplink synchronization acquisition. The present invention comprising the step of: the transmitter of the Sync Channel is located at every User Station; the transmitter generates the sync pulse and according to the message received from BS, the transmitter sends sync pulse in an arbitrary position; the BS receives the sync pulse and calculates the deviation from the standard position and sends USC to the MS; this interaction between BS and MS takes place until the deviation of the received sync pulse from standard position at BS is within a certain limit; the receiver of the Sync Channel is located at Base station. It assures that all users' signal reach the Base Station at the same time or within the IFW and can assure all the users acquire synchronization. It can eliminate the multiple access interference.
Abstract:
A complementary code decoder technique is provided where the encoded input data is first parallelized. From the parallelized data, correlation values are generated by a correlator circuit that is capable of changing its correlation characteristics depending on at least one control signal. Different control signals are sequentially provided to the correlator circuit thereby driving the correlator circuit to sequentially generate multiple correlation values from the parallelized data, based on different correlation characteristics. From the multiple correlation values, the correlation value that represents the optimum correlation is identified. This technique significantly reduces the gate count of the decoder structure, thus saving chip area and manufacturing costs.
Abstract:
The invention relates to a method for determining the correlation phase between a signal received at a receiver and a replica sequence. A matched filter multiplies samples 21 of the received signal with samples 22 of the replica and sums the resulting products to obtain a correlation value for a specific correlation phase. The samples of the received signal and the replica are shifted relative to each other for each correlation phase that is to be checked. In order to reduce the computational load, it is proposed that results obtained in the correlation calculations for one correlation phase are used by the matched filter also for calculations for a subsequent correlation phase. The invention relates equally to a corresponding receiver, to an electronic device comprising such a receiver, to a device cooperating with such a receiver and to a corresponding system.
Abstract:
Signal processing architectures for direct acquisition of spread spectrum signals using long codes. Techniques are described for achieving a high of parallelism, employing code matched filter banks and other hardware sharing. In one embodiment, upper and lower sidebands are treated as two independent signals with identical spreading codes. Cross-correlators, in preferred embodiments, are comprised of a one or more banks of CMFs for computing parallel short-time correlations (STCs) of received signal samples and replica code sequence samples, and a means for calculating the cross-correlation values utilizing discrete-time Fourier analysis of the computed STCs. One or more intermediate quantizers may optionally be disposed between the bank of code matched filters and the cross-correlation calculation means for reducing word-sizes of the STCs prior to Fourier analysis. The techniques described may be used with BOC modulated signals or with any signals having at least two distinct sidebands.
Abstract:
A method and system for time aligning a received transmitted signal with the receiver clock signal is disclosed herein. Time alignment is achieved by applying the proper matched filter coefficients to account for the time difference between received transmitted signal and the receiver clock signal. For direct sequence signals, time alignment is achieved between the spreading chips. For non-direct sequence signals, time alignment is achieved between the symbols. Time alignment is obtained by applying the proper matched filter coefficients to add or subtract propagation delay to account for the time difference between the received transmitted signal and received clock signal. The shape of the received synchronization correlation curve is used to determine the selection of the proper matched filter coefficients for fine timing correction. The matched filter coefficients are selected at synchronization and updated throughout the waveform reception. For direct sequence signals with RAKE receivers, timing alignment is easily applied to multiple RAKE taps.
Abstract:
The invention generally relates to improved correlators for spread spectrum receivers, particularly for third generation (3G) mobile communications systems. A Golay correlator with a plurality of delay structures is described. At least one of these delay structures comprises a plurality of memory elements (704) sharing a common input bus (720), and a circular shift register (610) having a plurality of bit positions (712), one for each of the memory elements, each bit position storing a single bit and having an associated bit position output (706), each bit position output being coupled to a corresponding one of the memory elements for enabling writing of data into the memory element when the bit position output is active, and wherein, in use, only one of the bit positions in the circular shift register is active, the active bit position moving circularly through the shift register to select the memory element into which data on the common bus is written. The circular shift register may be shared between two or more of the delay structures.
Abstract:
A spectrum spread reception apparatus includes a matched filter (1) for performing a correlation calculation between a reception signal in which a plurality of spectrum spread signals are multiplexed and a spread signal, a cyclic integrator (2) for cyclically integrating a correlation waveform, correlating the cyclic integration output to a phase for management, and establishing a maximum value detection flag when an integration value corresponding to a predetermined phase is detected as the maximum value, a correlation peak canceller (9) for assuming the integration value of the phase where the maximum value detection flag is established as the maximum value of correlation waveform of the spread code, generating a replica signal from the integration value, and deleting the replica signal from the cyclic integration output, and a maximum value detector (10) for detecting the maximum value in a predetermined cyclic integration period and a phase corresponding to this maximum value from the cyclic integration output after deletion of the replica signal.
Abstract:
A communication system (100), comprising a first communication unit (112) communicating (118) with a second communication unit (122), said first communication unit (112) transmitting to said second communication unit a preamble (516) prior to a message, wherein the preamble is a concatenation of signals, said second communication unit receives and decodes the preamble (516) and compares the received concatenated signals with know pre-determined concatenated signals to determine whether an error has occurred in said preamble (516) or said first message.This enables a system employing the FAUSCH concept to carry more information than a simple request for a channel. For example, it could include the data rate of the required channel. It also allows an extra degree of flexibility when designing the protocols. It allows forward error correction to be applied to the channel. Hence, the receiver can detect and correct some transmission errors.
Abstract:
A method of finding a maximum likelihood solution for, comprising: providing a sample vector; iteratively match-filtering said sample vector with a coefficient matrix to find a gradient; using the gradient to search for a maximum likelihood solution; and deciding if a found solution of vector data is good enough.