A METHOD AND AN APPARATUS OF UPLINK SYNCHRONIZATION ACQUISITION
    131.
    发明申请
    A METHOD AND AN APPARATUS OF UPLINK SYNCHRONIZATION ACQUISITION 审中-公开
    上传同步采集的方法和装置

    公开(公告)号:WO2004068763A1

    公开(公告)日:2004-08-12

    申请号:PCT/CN2003/000088

    申请日:2003-01-27

    CPC classification number: H04B1/707 H04B1/7093 H04B1/7115

    Abstract: The present invention is to provide a method and an apparatus of uplink synchronization acquisition. The present invention comprising the step of: the transmitter of the Sync Channel is located at every User Station; the transmitter generates the sync pulse and according to the message received from BS, the transmitter sends sync pulse in an arbitrary position; the BS receives the sync pulse and calculates the deviation from the standard position and sends USC to the MS; this interaction between BS and MS takes place until the deviation of the received sync pulse from standard position at BS is within a certain limit; the receiver of the Sync Channel is located at Base station. It assures that all users' signal reach the Base Station at the same time or within the IFW and can assure all the users acquire synchronization. It can eliminate the multiple access interference.

    Abstract translation: 本发明是提供上行链路同步捕获的方法和装置。 本发明包括以下步骤:同步信道的发射机位于每个用户站; 发射机产生同步脉冲,并且根据从BS接收到的消息,发射机在任意位置发送同步脉冲; BS接收同步脉冲并计算与标准位置的偏差,并向MS发送USC; BS和MS之间的这种相互作用发生,直到接收到的同步脉冲与BS处的标准位置的偏差在一定限度内; 同步通道的接收器位于基站。 它确保所有用户的信号同时到达IFW,并确保所有用户获得同步。 可以消除多址干扰。

    COMPLEMENTARY CODE DECODING BY REDUCED SIZED CIRCUITS
    132.
    发明申请
    COMPLEMENTARY CODE DECODING BY REDUCED SIZED CIRCUITS 审中-公开
    通过减小尺寸的电路进行补码的解码

    公开(公告)号:WO2004040784A2

    公开(公告)日:2004-05-13

    申请号:PCT/US2003/035434

    申请日:2003-10-27

    Abstract: A complementary code decoder technique is provided where the encoded input data is first parallelized. From the parallelized data, correlation values are generated by a correlator circuit that is capable of changing its correlation characteristics depending on at least one control signal. Different control signals are sequentially provided to the correlator circuit thereby driving the correlator circuit to sequentially generate multiple correlation values from the parallelized data, based on different correlation characteristics. From the multiple correlation values, the correlation value that represents the optimum correlation is identified. This technique significantly reduces the gate count of the decoder structure, thus saving chip area and manufacturing costs.

    Abstract translation: 提供了一种补码解码器技术,其中编码的输入数据首先被并行化。 根据并行数据,相关值由相关器电路产生,该相关器电路能够根据至少一个控制信号改变其相关特性。 根据不同的相关特性,不同的控制信号被顺序地提供给相关器电路,从而驱动相关器电路从并行数据顺序地生成多个相关值。 从多个相关值中,识别表示最佳相关性的相关值。 这种技术大大减少了解码器结构的门数,从而节省了芯片面积和制造成本。

    DETERMINATION OF THE CORRELATION PHASE BETWEEN A SIGNAL AND A REPLICA SEQUENCE
    133.
    发明申请
    DETERMINATION OF THE CORRELATION PHASE BETWEEN A SIGNAL AND A REPLICA SEQUENCE 审中-公开
    确定信号与复原序列之间的相关相位

    公开(公告)号:WO2004038944A1

    公开(公告)日:2004-05-06

    申请号:PCT/IB2002/004420

    申请日:2002-10-24

    Inventor: AKOPIAN, David

    CPC classification number: H04B1/7075 H04B1/7093 H04B2201/70707

    Abstract: The invention relates to a method for determining the correlation phase between a signal received at a receiver and a replica sequence. A matched filter multiplies samples 21 of the received signal with samples 22 of the replica and sums the resulting products to obtain a correlation value for a specific correlation phase. The samples of the received signal and the replica are shifted relative to each other for each correlation phase that is to be checked. In order to reduce the computational load, it is proposed that results obtained in the correlation calculations for one correlation phase are used by the matched filter also for calculations for a subsequent correlation phase. The invention relates equally to a corresponding receiver, to an electronic device comprising such a receiver, to a device cooperating with such a receiver and to a corresponding system.

    Abstract translation: 本发明涉及一种用于确定在接收机处接收的信号与复制序列之间的相关相位的方法。 匹配滤波器将接收信号的样本21与复制品的样本22进行乘法,并且对所得到的乘积求和以获得特定相关相位的相关值。 对于要检查的每个相关相位,接收信号和副本的样本相对于彼此移位。 为了减少计算负荷,提出了在一个相关相位的相关计算中获得的结果也被匹配滤波器用于后续相关相位的计算。 本发明同样涉及相应的接收机,包括这种接收机的电子设备,与这种接收机配合的设备和相应的系统。

    SYSTEM FOR DIRECT ACQUISITION OF RECEIVED SIGNALS
    134.
    发明申请
    SYSTEM FOR DIRECT ACQUISITION OF RECEIVED SIGNALS 审中-公开
    用于直接收取信号的系统

    公开(公告)号:WO2004034604A1

    公开(公告)日:2004-04-22

    申请号:PCT/US2003/031897

    申请日:2003-10-09

    CPC classification number: H04B1/70752 G01S19/30 H04B1/708 H04B1/7093

    Abstract: Signal processing architectures for direct acquisition of spread spectrum signals using long codes. Techniques are described for achieving a high of parallelism, employing code matched filter banks and other hardware sharing. In one embodiment, upper and lower sidebands are treated as two independent signals with identical spreading codes. Cross-correlators, in preferred embodiments, are comprised of a one or more banks of CMFs for computing parallel short-time correlations (STCs) of received signal samples and replica code sequence samples, and a means for calculating the cross-correlation values utilizing discrete-time Fourier analysis of the computed STCs. One or more intermediate quantizers may optionally be disposed between the bank of code matched filters and the cross-correlation calculation means for reducing word-sizes of the STCs prior to Fourier analysis. The techniques described may be used with BOC modulated signals or with any signals having at least two distinct sidebands.

    Abstract translation: 用于使用长码直接采集扩频信号的信号处理架构。 描述了用于实现高并行性,采用代码匹配滤波器组和其他硬件共享的技术。 在一个实施例中,上边带和下边带被视为具有相同扩展码的两个独立信号。 交叉相关器在优选实施例中包括用于计算接收信号样本和复制码序列样本的并行短时相关(STC)的一个或多个CMF组,以及用于使用离散的 计算的STCs的时间傅立叶分析。 一个或多个中间量化器可以可选地设置在码组匹配滤波器组和互相关计算装置之间,用于在傅立叶分析之前减少STC的字长。 所描述的技术可以与BOC调制信号或具有至少两个不同边带的任何信号一起使用。

    送信信号形成方法、通信方法、及び送信信号のデータ構造
    135.
    发明申请
    送信信号形成方法、通信方法、及び送信信号のデータ構造 审中-公开
    传输信号的传输信号生成方法,通信方法和数据结构

    公开(公告)号:WO2004021597A1

    公开(公告)日:2004-03-11

    申请号:PCT/JP2003/011017

    申请日:2003-08-29

    CPC classification number: H04B1/7093 H04B1/7115 H04B2201/709709

    Abstract:  スペクトラム拡散による送信データの変調において、拡散系列自体ではなく、送信データ列に着目することにより、送信信号の周期スペクトラムを無相関とし、信号の振幅の広がりを小さくし、受信側の増幅器のダイナミックレンジを小さくする。送信信号形成方法は、送信データに所定の係数列の各係数を乗じて複数の送信データを形成する工程と、この係数を乗じた複数の送信データ間に所定長の0データを付加して送信データ列を形成する工程を備える。

    Abstract translation: 在通过扩展频谱进行的发射数据调制中,注意不扩散序列本身,而是传播数据串,从而提供传输信号的周期谱的疏离,减少信号幅度的扩展,并减小放大器的动态范围 在接收方。 发送信号产生方法包括通过将发送数据乘以预定系数串的系数来产生多个发送数据的步骤,以及通过将预定长度的零数据加到发送数据串的步骤 多个发送数据乘以系数。

    SYSTEM AND METHOD FOR SIGNAL TIME ALIGNMENT USING PROGRAMMABLE MATCHED FILTER COEFFICIENTS
    136.
    发明申请
    SYSTEM AND METHOD FOR SIGNAL TIME ALIGNMENT USING PROGRAMMABLE MATCHED FILTER COEFFICIENTS 审中-公开
    使用可编程匹配滤波器系数的信号时间对准的系统和方法

    公开(公告)号:WO2003084080A2

    公开(公告)日:2003-10-09

    申请号:PCT/US2003/009235

    申请日:2003-03-26

    IPC: H04B

    CPC classification number: H04B1/7077 H04B1/70758 H04B1/7093 H04B1/7117

    Abstract: A method and system for time aligning a received transmitted signal with the receiver clock signal is disclosed herein. Time alignment is achieved by applying the proper matched filter coefficients to account for the time difference between received transmitted signal and the receiver clock signal. For direct sequence signals, time alignment is achieved between the spreading chips. For non-direct sequence signals, time alignment is achieved between the symbols. Time alignment is obtained by applying the proper matched filter coefficients to add or subtract propagation delay to account for the time difference between the received transmitted signal and received clock signal. The shape of the received synchronization correlation curve is used to determine the selection of the proper matched filter coefficients for fine timing correction. The matched filter coefficients are selected at synchronization and updated throughout the waveform reception. For direct sequence signals with RAKE receivers, timing alignment is easily applied to multiple RAKE taps.

    Abstract translation: 本文公开了一种用于将接收到的发送信号与接收机时钟信号进行时间对准的方法和系统。 通过应用适当的匹配滤波器系数来解决接收到的发送信号和接收机时钟信号之间的时间差来实现时间对准。 对于直接序列信号,在扩展芯片之间实现时间对准。 对于非直接序列信号,在符号之间实现时间对准。 通过应用适当的匹配滤波器系数来增加或减去传播延迟以解决接收到的发送信号和接收到的时钟信号之间的时间差来获得时间对准。 接收到的同步相关曲线的形状用于确定用于精细定时校正的适当的匹配滤波器系数的选择。 匹配的滤波器系数在整个波形接收期间同步选择并更新。 对于具有RAKE接收器的直接序列信号,定时对准很容易应用于多个RAKE抽头。

    DIGITAL CORRELATORS
    137.
    发明申请
    DIGITAL CORRELATORS 审中-公开
    数码相机

    公开(公告)号:WO2003077441A1

    公开(公告)日:2003-09-18

    申请号:PCT/JP2003/002937

    申请日:2003-03-12

    CPC classification number: H04B1/7093 G06F17/15 H03H17/0254 H04B1/7095

    Abstract: The invention generally relates to improved correlators for spread spectrum receivers, particularly for third generation (3G) mobile communications systems. A Golay correlator with a plurality of delay structures is described. At least one of these delay structures comprises a plurality of memory elements (704) sharing a common input bus (720), and a circular shift register (610) having a plurality of bit positions (712), one for each of the memory elements, each bit position storing a single bit and having an associated bit position output (706), each bit position output being coupled to a corresponding one of the memory elements for enabling writing of data into the memory element when the bit position output is active, and wherein, in use, only one of the bit positions in the circular shift register is active, the active bit position moving circularly through the shift register to select the memory element into which data on the common bus is written. The circular shift register may be shared between two or more of the delay structures.

    Abstract translation: 本发明一般涉及用于扩频接收机的改进的相关器,特别是对于第三代(3G)移动通信系统。 描述了具有多个延迟结构的Golay相关器。 这些延迟结构中的至少一个包括共享公共输入总线(720)的多个存储器元件(704)和具有多个位位置(712)的圆形移位寄存器(610),每个存储器元件 每个位位置存储单个位并且具有相关联的位位置输出(706),每个位位置输出耦合到存储器元件中的相应一个,用于当位位置输出有效时将数据写入存储元件, 并且其中,在使用中,循环移位寄存器中只有一个位位置有效,活动位位置循环移动通过移位寄存器,以选择写入公共总线上的数据的存储元件。 循环移位寄存器可以在两个或更多个延迟结构之间共享。

    スペクトラム拡散用受信装置
    138.
    发明申请
    スペクトラム拡散用受信装置 审中-公开
    光谱接收装置

    公开(公告)号:WO2003077439A1

    公开(公告)日:2003-09-18

    申请号:PCT/JP2003/002114

    申请日:2003-02-26

    CPC classification number: H04B1/7093 H04B1/7075 H04B1/70755 H04B1/7115

    Abstract: A spectrum spread reception apparatus includes a matched filter (1) for performing a correlation calculation between a reception signal in which a plurality of spectrum spread signals are multiplexed and a spread signal, a cyclic integrator (2) for cyclically integrating a correlation waveform, correlating the cyclic integration output to a phase for management, and establishing a maximum value detection flag when an integration value corresponding to a predetermined phase is detected as the maximum value, a correlation peak canceller (9) for assuming the integration value of the phase where the maximum value detection flag is established as the maximum value of correlation waveform of the spread code, generating a replica signal from the integration value, and deleting the replica signal from the cyclic integration output, and a maximum value detector (10) for detecting the maximum value in a predetermined cyclic integration period and a phase corresponding to this maximum value from the cyclic integration output after deletion of the replica signal.

    Abstract translation: 频谱扩展接收装置包括:对多个频谱扩展信号进行多路复用的接收信号与扩频信号进行相关运算的匹配滤波器(1),将相关波形进行周期积分的循环积分器(2) 循环积分输出到用于管理的相位,并且当检测到与预定相位相对应的积分值作为最大值时,建立最大值检测标志;相关峰值消除器(9),用于假定相位的积分值, 建立最大值检测标志作为扩展码的相关波形的最大值,从积分值生成复制信号,并从循环积分输出中删除复制信号;以及最大值检测器(10),用于检测最大值 在预定的循环积分周期中的值和与该最大值相对应的相位 删除复制信号后的循环积分输出。

    COMMUNICATION SYSTEM, COMMUNICATION UNIT AND METHOD OF COMMUNICATING INFORMATION
    139.
    发明申请
    COMMUNICATION SYSTEM, COMMUNICATION UNIT AND METHOD OF COMMUNICATING INFORMATION 审中-公开
    通信系统,通信单元和通信信息的方法

    公开(公告)号:WO02080583A3

    公开(公告)日:2003-08-07

    申请号:PCT/EP0202761

    申请日:2002-03-11

    Abstract: A communication system (100), comprising a first communication unit (112) communicating (118) with a second communication unit (122), said first communication unit (112) transmitting to said second communication unit a preamble (516) prior to a message, wherein the preamble is a concatenation of signals, said second communication unit receives and decodes the preamble (516) and compares the received concatenated signals with know pre-determined concatenated signals to determine whether an error has occurred in said preamble (516) or said first message.This enables a system employing the FAUSCH concept to carry more information than a simple request for a channel. For example, it could include the data rate of the required channel. It also allows an extra degree of flexibility when designing the protocols. It allows forward error correction to be applied to the channel. Hence, the receiver can detect and correct some transmission errors.

    Abstract translation: 一种通信系统(100),包括与第二通信单元(122)通信(118)的第一通信单元(112),所述第一通信单元(112)在消息之前向所述第二通信单元发送前导码(516) ,其中所述前同步码是信号的级联,所述第二通信单元接收并解码前导码(516),并将所接收的级联信号与已知预定的级联信号进行比较,以确定所述前同步码(516)或所述 第一消息。这使得采用FAUSCH概念的系统能够携带比针对信道的简单请求更多的信息。 例如,它可以包括所需通道的数据速率。 它还允许在设计协议时额外的灵活性。 它允许向通道应用前向纠错。 因此,接收机可以检测和纠正一些传输错误。

Patent Agency Ranking