MODULATOR MODULE IN AN INTEGRATED CIRCUIT DEVICE
    11.
    发明申请
    MODULATOR MODULE IN AN INTEGRATED CIRCUIT DEVICE 审中-公开
    集成电路设备中的调制器模块

    公开(公告)号:WO2010085721A1

    公开(公告)日:2010-07-29

    申请号:PCT/US2010/021915

    申请日:2010-01-25

    CPC classification number: H03C3/00 H04L27/122 H05B41/2828

    Abstract: An integrated circuit device has a modulator module that provides a modulation signal comprising one frequency keyed on and off, or alternating between two or more different frequencies or phases that are selected based upon a modulator signal. The one or more frequencies or phases may be selected from a plurality of frequency sources. Switching the one frequency on or off, or between the at least two different frequencies or phases may be synchronized with one or both of the two or more different frequencies or phases so that "glitches" or spurs are not introduced into the modulation signal. The integrated circuit device may also comprise a processor, memory, digital logic and input-output. Frequency sources may be internal to the digital device or external. The modulator signal may comprise serial data generated from the digital logic and/or processor of the digital device.

    Abstract translation: 集成电路装置具有调制器模块,该调制器模块提供包括基于调制器信号选择的一个频率键控开关或交替的两个或多个不同频率或相位之间的调制信号。 可以从多个频率源中选择一个或多个频率或相位。 将一个频率开启或关闭,或者在至少两个不同频率或相位之间切换可以与两个或更多个不同频率或相位中的一个或两个同步,使得“毛刺”或杂散不被引入到调制信号中。 集成电路设备还可以包括处理器,存储器,数字逻辑和输入 - 输出。 频率源可能在数字设备内部或外部。 调制器信号可以包括从数字设备的数字逻辑和/或处理器产生的串行数据。

    A MULTIMODE MULTICARRIER MODEM SYSTEM AND METHOD OF COMMUNICATION OVER THE SAME
    12.
    发明申请
    A MULTIMODE MULTICARRIER MODEM SYSTEM AND METHOD OF COMMUNICATION OVER THE SAME 审中-公开
    多模式多媒体调制解调器系统及其通信方法

    公开(公告)号:WO01091443A2

    公开(公告)日:2001-11-29

    申请号:PCT/US2001/016540

    申请日:2001-05-23

    Abstract: An alternative approach to coping with the ever increasing demand for faster communications hardware is to design modems that are capable of operating its speeds at a higher data rate than a speed required for a single port of the standard communication rate for that modem. Basically, by utilizing a resource manager, that directs the data in and out of the various portions of the modem in an orderly manner, keeping track of which of the ports is being operated at any given point in time, a standard single port modem can be reconfigured, for example, at an over clocked rate, to manipulate the data input and output of a modem.

    Abstract translation: 应对日益增长的通信硬件需求的替代方法是设计能够以比该调制解调器的标准通信速率的单个端口所需的速度更高的数据速率来操作其速度的调制解调器。 基本上,通过利用资源管理器,其以有序的方式将数据导入和移出调制解调器的各个部分,跟踪哪个端口在任何给定的时间点被操作,标准的单端口调制解调器可以 例如,以超时速率重新配置,以操纵调制解调器的数据输入和输出。

    DIRECT DIGITAL SYNTHESIZER FOR MODULATION
    13.
    发明申请
    DIRECT DIGITAL SYNTHESIZER FOR MODULATION 审中-公开
    直接数字合成器进行调制

    公开(公告)号:WO1993018578A1

    公开(公告)日:1993-09-16

    申请号:PCT/US1993002445

    申请日:1993-03-12

    CPC classification number: H03C3/40 G06J1/00 H03C1/52 H04L27/122 H04L27/2092

    Abstract: A low-power digital frequency synthesizer combining direct digital frequency synthesis techniques with serrodyne frequency translation principles to produce a wideband frequency response with high spectral purity. A conventional direct digital synthesizer is used to generate a high-resolution analog carrier signal from a low-speed digital clock signal. The carrier signal is phase modulated by a low-resolution signal generated from a high-speed digital clock signal. The modularity signal is a higher frequency signal than the carrier signal. The phase modulation is accomplished by exact decoded gain elements. The spectral purity of the resulting high-resolution output signal is unobtainable by conventional direct digital synthesizers, while providing significant power savings.

    TRANSMISSION/RECEPTION OF A PARTIAL SC-FDM SYMBOL
    14.
    发明申请
    TRANSMISSION/RECEPTION OF A PARTIAL SC-FDM SYMBOL 审中-公开
    传输/接收部分SC-FDM符号

    公开(公告)号:WO2015113594A1

    公开(公告)日:2015-08-06

    申请号:PCT/EP2014/051686

    申请日:2014-01-29

    Abstract: A method is disclosed for signal processing in a radio system. The method comprises generating (801 ), in an apparatus (602), a single carrier frequency division multiplexing SC-FDM signal having a shorter duration than a time symbol duration defined by a radio standard applied in the radio system. The signal is transmitted (802) from the communications apparatus (602). The method comprises receiving (803) said signal from the communications apparatus (602), wherein orthogonality of frequency subcarriers is maintained at a receiver (601 ) of the signal.

    Abstract translation: 公开了一种用于无线电系统中的信号处理的方法。 该方法包括在装置(602)中生成具有比由在无线电系统中应用的无线电标准定义的时间符号持续时间更短的持续时间的单载波频分复用SC-FDM信号(801)。 从通信装置(602)发送信号(802)。 所述方法包括从所述通信装置(602)接收(803)所述信号,其中频率子载波的正交性维持在所述信号的接收机(601)。

    PROCESSING INTERFERENCE IN A WIRELESS NETWORK
    16.
    发明申请
    PROCESSING INTERFERENCE IN A WIRELESS NETWORK 审中-公开
    在无线网络中处理干扰

    公开(公告)号:WO2015011459A1

    公开(公告)日:2015-01-29

    申请号:PCT/GB2014/052233

    申请日:2014-07-22

    CPC classification number: H04L25/03006 H04B1/123 H04B17/0085 H04L27/122

    Abstract: Interference is processed in a waveform received at a device in a wireless network, the received interference comprising non-linear products of at least a first signal (C 1 ) at a first carier frequency and a second signal (C 2) at a second carrier frequency. A complex composite baseband signal is generated comprising at least the first and second signal at baseband, occupying a respective first and second frequency range within a composite baseband frequency range and not overlapping in frequency, by frequency shifting at least one of the first and second signals within the composite baseband frequency range. The complex composite baseband signal is processed by applying at least a first non-linear function (74a) to generate simulated interference comprising at least one simulated non-linear product. The received interference is then processed in dependence on the simulated interference.

    Abstract translation: 在无线网络中的设备处接收的波形中处理干扰,所接收的干扰包括处于第一载波频率的至少第一信号(C1)和第二载波频率的第二信号(C2)的非线性乘积。 生成复合复合基带信号,其包括在基带处的至少第一和第二信号,通过频移第一和第二信号中的至少一个来占用复合基带频率范围内的相应的第一和第二频率范围并且不与频率重叠 在复合基带频率范围内。 通过施加至少第一非线性函数(74a)来生成复合复合基带信号以产生包含至少一个模拟非线性乘积的模拟干扰。 然后根据模拟的干扰对接收到的干扰进行处理。

    UPSTREAM PILOT STRUCTURE IN POINT TO MULTIPOINT ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING COMMUNICATION SYSTEM
    17.
    发明申请
    UPSTREAM PILOT STRUCTURE IN POINT TO MULTIPOINT ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING COMMUNICATION SYSTEM 审中-公开
    上游导向结构点到多点正交频分多路通信系统

    公开(公告)号:WO2014164762A1

    公开(公告)日:2014-10-09

    申请号:PCT/US2014/023410

    申请日:2014-03-11

    Abstract: A central access network unit comprising a processor configured to assign a plurality of upstream training blocks from an upstream OFDM symbol to a plurality of downstream network units, wherein the OFDM symbol comprises a plurality of pilot subcarriers equally spaced across an upstream RF spectrum in a pre-determined time interval, and wherein each upstream training block comprises a different subset of the pilot subcarriers that are non-consecutive and situated across the upstream RF spectrum, and generate one or more messages comprising assignments of the upstream training blocks, and a transmitter coupled to the processor and configured to transmit the messages to the plurality of downstream network units via a network, wherein the messages instruct at least one of the plurality of downstream network units to transmit a modulated pre-determined sequence at the pilot subcarriers corresponding to the upstream training block assigned to the downstream network unit.

    Abstract translation: 一种中央接入网络单元,包括:处理器,被配置为将多个上游训练块从上游OFDM符号分配到多个下游网络单元,其中所述OFDM符号包括在预先的上行RF频谱上等距间隔的多个导频子载波 并且其中每个上游训练块包括不连续且位于上游RF频谱上的导频子载波的不同子集,并且生成包括上游训练块的分配的一个或多个消息,以及发射机 并且被配置为经由网络将消息发送到所述多个下游网络单元,其中所述消息指示所述多个下游网络单元中的至少一个在与所述上游对应的导频子载波处发送经调制的预定序列 训练块分配给下游网络单元。

    PROCEDE DE RADIO EMISSION ET DISPOSITIF RADIO-EMETTEUR ADAPTE
    18.
    发明申请
    PROCEDE DE RADIO EMISSION ET DISPOSITIF RADIO-EMETTEUR ADAPTE 审中-公开
    无线传输方法和适配无线电发射机

    公开(公告)号:WO2013121020A1

    公开(公告)日:2013-08-22

    申请号:PCT/EP2013/053122

    申请日:2013-02-15

    Applicant: TELECOM DESIGN

    Abstract: L'objet de l'invention est un procédé d'émission radio qui comporte des étapes de simulation d'une modulation de phase d'une porteuse radio par l'émission successivement d'une porteuse d'une fréquence principale f et d'une porteuse d'une fréquence décalée f+Δf, la fréquence décalée l'étant d'un delta de fréquence adapté à simuler un déphasage donné de la fréquence principale au bout d'un temps T donné. L'invention concerne en outre un dispositif d'émission radio de mise en œuvre du procédé qui comporte un circuit intégré radio de génération de modulation de fréquence programmable, des moyens de programmation dans ce circuit intégré radio de la fréquence principale f et de la fréquence décalée f+Δf et des moyens de pilotage de ce circuit intégré radio afin de générer lesdites fréquences en fonction du signal à transmettre.

    Abstract translation: 本发明涉及一种无线传输方法,其包括以下步骤:通过连续发送具有主频率f的载波和具有移位频率f + Deltaf的载波来模拟无线电载波的相位调制,移位频率为 频率增量适用于在给定时间T之后模拟主频率的给定相移。本发明还涉及一种用于执行该方法的无线电传输装置,其包括用于产生频率调制的可编程无线电集成电路,用于编程的装置 在所述无线电集成电路中,主频率f和移位频率f + Deltaf,以及用于控制所述无线电集成电路以便根据要发送的信号产生所述频率的装置。

    INTEGER CYCLE FREQUENCY HOPPING MODULATION FOR THE RADIO FREQUENCY TRANSMISSION OF HIGH SPEED DATA
    19.
    发明申请
    INTEGER CYCLE FREQUENCY HOPPING MODULATION FOR THE RADIO FREQUENCY TRANSMISSION OF HIGH SPEED DATA 审中-公开
    用于无线电频率传输高速数据的整数周期频率调制

    公开(公告)号:WO2004102818A2

    公开(公告)日:2004-11-25

    申请号:PCT/US2004/002163

    申请日:2004-01-27

    IPC: H04B

    CPC classification number: H04L27/122 H04B1/713 H04L27/10 H04L27/2014

    Abstract: The invention disclosed in this application uses a method of modulation named Integer Cycle Frequency Hopping (ICFH) wherein a carrier signal, comprised of a continuum of sine waves is generated on a single frequency. A data bit representing either a “1” or a “0”, depending upon the logic polarity chosen by the builder is imposed upon the carrier signal by modifying the carrier signal at precisely the zero crossing point or the zero degree angle. The method of imposing the data is to cause either a lengthening or shortening of the proceeding 360 degrees of phase angle, thus effectively either raising or lowering the frequency of the carrier signal for just the one, or a succession of cycles at hand. Upon completion of the 360-degree cycle(s), the carrier will return to the original frequency. The main carrier frequency is only modulated beginning at the zero degree phase angle and ending at the 360-degree phase angle. In this modulation scheme as few as one sine wave cycle can be used to represent one data bit. The spectral output of a transmitting device using this modulation scheme will be defined by the difference in frequency between the main carrier signal and the modulating frequency. In the resulting signal a modulated segment of the main carrier frequency can represent either a binary “1” or a binary “0”.

    Abstract translation: 本申请中公开的发明使用称为整数周期跳频(ICFH)的调制方法,其中在单个频率上产生由正弦波的连续谱构成的载波信号。 根据构建器选择的逻辑极性,表示“1”或“0”的数据位通过在精确的过零点或零度角修正载波信号而施加在载波信号上。 施加数据的方法是导致进行的360度相位角的延长或缩短,从而有效地提高或降低载波信号的频率仅仅是手中的一个或一系列循环。 在360度循环完成后,运营商将返回到原始频率。 主载波频率仅从零度相位角开始调制,并以360度相位角结束。 在这种调制方案中,只能使用一个正弦波周期来表示一个数据位。 使用该调制方式的发送装置的频谱输出将由主载波信号和调制频率之间的频率差定义。 在得到的信号中,主载波频率的调制段可以表示二进制“1”或二进制“0”。

    DIGITAL SYNTHESIZER WITH COHERENT DIVISION
    20.
    发明申请
    DIGITAL SYNTHESIZER WITH COHERENT DIVISION 审中-公开
    具有相似部分的数字合成器

    公开(公告)号:WO00072120A1

    公开(公告)日:2000-11-30

    申请号:PCT/FR2000/001309

    申请日:2000-05-16

    CPC classification number: H04L27/122 G06F1/0328 G06F7/72

    Abstract: The invention concerns a direct frequency digital synthesizing device. Said device comprises: a modulo M coherent accumulator (1) for generating a first phase law based on a frequency control word, a table (2) addressed by a second phase law derived from the first phase law, for generating a digital sine wave signal, a digital-to-analog converter (3) for converting the digital sine wave signal into an analog sine wave signal, a filter (4) for filtering the analog sine wave signal, and a divider (5) for dividing the filtered signal, the divider is of an order less than M and has a synchronizing input controlled by a synchronizing pulse for re-synchronizing the signal after division, the synchronizing pulse being worked out from the phase law. The invention is particularly applicable to digital synthesizers for radar.

    Abstract translation: 本发明涉及直接频率数字合成装置。 所述装置包括:模M相干累加器(1),用于基于频率控制字产生第一相位定律;基于从第一相位律导出的第二相位律寻址的表(2),用于产生数字正弦波信号 ,用于将数字正弦波信号转换成模拟正弦波信号的数模转换器(3),用于滤波模拟正弦波信号的滤波器(4)和用于分频滤波信号的分频器(5) 除法器的次序小于M,并且具有由同步脉冲控制的同步输入,用于使除法之后的信号重新同步,从相位律求出同步脉冲。 本发明特别适用于雷达数字合成器。

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