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公开(公告)号：WO2020185560A1
公开(公告)日：2020-09-17
申请号：PCT/US2020/021393
申请日：2020-03-06
Applicant: AVX CORPORATION
Inventor： MAREK, Michael , O'NEILL, Elinor , NISSIM, Ronit
Abstract: A surface mountable coupler may include a monolithic base substrate having a first surface, a second surface, a length in an X-direction, and a width in a Y-direction that is perpendicular to the X-direction. A plurality of ports may be formed over the first surface of the monolithic base substrate including a coupling port, an input port, and an output port. The coupler may include a first thin film inductor and a second thin film inductor that is inductively coupled with the first thin film inductor and electrically connected between the input and output ports. A thin film circuit may electrically connect the first thin film inductor with the coupling port. The thin film circuit may include at least one thin film component.
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公开(公告)号：WO2020167955A1
公开(公告)日：2020-08-20
申请号：PCT/US2020/017937
申请日：2020-02-12
Applicant: AVX CORPORATION
Inventor： BEROLINI, Marianne , HORN, Jeffrey , CAIN, Jeffrey
Abstract: The present invention is directed to a multilayer ceramic capacitor. The capacitor comprises a top surface, a bottom surface, and at least one side surface connecting the top surface and the bottom surface. The capacitor comprises a main body containing a plurality of alternating dielectric layers and internal electrode layers comprising a first plurality of internal electrode layers and a second plurality of internal electrode layers. A first through-hole conductive via electrically connects the first plurality of internal electrode layers to a first external terminal on the top surface and a first external terminal on the bottom surface of the capacitor. A second through-hole conductive via electrically connects the second plurality of internal electrode layers to a second external terminal on the top surface and a second external terminal on the bottom surface of the capacitor. The at least one side surface does not include an external terminal.
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公开(公告)号：WO2020159813A1
公开(公告)日：2020-08-06
申请号：PCT/US2020/014895
申请日：2020-01-24
Applicant: AVX CORPORATION
Inventor： BEROLINI, Marianne , HORN, Jeffrey A. , VANALSTINE, Richard C.
Abstract: A multilayer capacitor may include a monolithic body including a plurality of dielectric layers. A first external terminal may be disposed along a first end, and a second external terminal may be disposed along a second end of the capacitor. The external terminals may include respective bottom portions that extend along a bottom surface of the capacitor. The bottom portions of the external terminals may be spaced apart by a bottom external terminal spacing distance. A bottom shield electrode may be arranged within the monolithic body between a plurality of active electrodes and the bottom surface of the capacitor. The bottom shield electrode may be spaced apart from the bottom surface of the capacitor by a bottom-shield-to-bottom distance that may range from about 3 microns to about 100 microns. A ratio of a length of the capacitor to the bottom external terminal spacing distance may be less than about 4.
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公开(公告)号：WO2020159810A1
公开(公告)日：2020-08-06
申请号：PCT/US2020/014891
申请日：2020-01-24
Applicant: AVX CORPORATION
Inventor： BEROLINI, Marianne , HORN, Jeffrey A. , VANALSTINE, Richard C.
Abstract: The present invention is directed to a multilayer ceramic capacitor. A plurality of active electrodes may be arranged within a monolithic body of the capacitor and parallel with a longitudinal direction. A first shield electrode may be arranged within the monolithic body and parallel with the longitudinal direction. The first shield electrode may be connected with a first external terminal. The first shield electrode may have a first longitudinal edge and a second longitudinal edge that are each aligned with the lateral direction and face away from the first external terminal. The second longitudinal edge may be offset in the longitudinal direction from the first longitudinal edge by a shield electrode offset distance. A second shield electrode may be connected with a second external terminal. The second shield electrode may be approximately aligned with the first shield electrode in the Z-direction.
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公开(公告)号：WO2020159809A1
公开(公告)日：2020-08-06
申请号：PCT/US2020/014889
申请日：2020-01-24
Applicant: AVX CORPORATION
Inventor： BEROLINI, Marianne , HORN, Jeffrey A. , VANALSTINE, Richard C.
Abstract: The present invention is directed to a multilayer ceramic capacitor that includes a plurality of active electrodes and at least one shield electrode that are each arranged within a monolithic body and parallel with a longitudinal direction. The capacitor may exhibit a first insertion loss value at a test frequency, which may be greater than about 2 GHz, in a first orientation relative to the mounting surface. The capacitor may exhibit a second insertion loss value at about the test frequency in a second orientation relative to the mounting surface and the capacitor is rotated 90 degrees or more about the longitudinal direction with respect to the first orientation. The longitudinal direction of the capacitor may be parallel with the mounting surface in each of the first and second orientations. The second insertion loss value may differ from the first insertion loss value by at least about 0.3 dB.
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Patent Agency Ranking
公开(公告)号：WO2020096748A1
公开(公告)日：2020-05-14
申请号：PCT/US2019/056654
申请日：2019-10-17
Applicant: AVX CORPORATION
Inventor： SEIDMAN, Yehuda , O'NEILL, Elinor , ROZBROJ, Dan
Abstract: A surface-mountable component is disclosed. The surface-mountable component may include a substrate having a side surface and a top surface that is perpendicular to the side surface. The component may include an element layer formed on the top surface of the substrate. The element layer may include a thin-film element and a contact pad electrically connected with the thin-film element. The contact pad may extend to the side surface of the substrate. The component may include a terminal that is electrically connected with the contact pad at a connection area. The connection area may be parallel with the top surface of the substrate. The terminal may have a visible edge surface that is approximately aligned with the side surface of the substrate. The visible edge surface may be visible for inspection when the surface-mountable component is mounted to a mounting surface.
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公开(公告)号：WO2020044182A1
公开(公告)日：2020-03-05
申请号：PCT/IB2019/057088
申请日：2019-08-22
Applicant: AVX CORPORATION
Inventor： LYBRAND, Brent
Abstract: An electrical spring contact is provided. The electrical spring contact includes a connection portion configured to couple the electrical spring contact to a printed circuit board, a bulge portion, a bend portion having a substantially U-shaped configuration, and an inclined portion extending from the bend portion at an angle relative to a plane that is substantially parallel to the connection portion. The connection portion, the bulge portion, the bend portion, and the inclined portion are formed from a single conductive contact material.
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公开(公告)号：WO2020033820A1
公开(公告)日：2020-02-13
申请号：PCT/US2019/045890
申请日：2019-08-09
Applicant: AVX CORPORATION
Inventor： AOKI, Kiyofumi , PETRZILEK, Jan
Abstract: A solid electrolytic capacitor containing a capacitor element is provided. The capacitor element contains a sintered porous anode body, a dielectric that overlies the anode body, a solid electrolyte that overlies the dielectric that includes conductive polymer particles that contain a complex formed from a thiophene polymer and a copolymer counterion, and an external polymer coating that overlies the solid electrolyte and includes conductive polymer particles.
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公开(公告)号：WO2020033000A2
公开(公告)日：2020-02-13
申请号：PCT/US2019/016775
申请日：2019-02-06
Applicant: AVX CORPORATION
Inventor： SMITH, David M.
Abstract: A phased array antenna is provided. The phased array antenna includes a dome shaped substrate. The phased array antenna further includes a plurality of antenna elements disposed on the substrate.
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公开(公告)号：WO2020018651A1
公开(公告)日：2020-01-23
申请号：PCT/US2019/042178
申请日：2019-07-17
Applicant: AVX CORPORATION
Inventor： RAVINDRANATHAN, Palaniappan , BEROLINI, Marianne
Abstract: In general, a varistor including a passivation layer and a method of forming such a varistor are disclosed. The varistor comprises a ceramic body comprising a plurality of alternating dielectric layers and electrode layers. The varistor also comprises a first external terminal on a first end surface and a second external terminal on a second end surface opposite the first end surface wherein at least two side surfaces extend between the first end surface and the second end surface. The varistor also comprises a passivation layer on at least one side surface of the ceramic body between the first external terminal and the second external terminal. The passivation layer includes a phosphate and a metal additive including an alkali metal, an alkaline earth metal, or a mixture thereof. The passivation layer has an average thickness of from 0.1 micron to 30 microns.
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