公开(公告)号：WO2017004459A1

公开(公告)日：2017-01-05

申请号：PCT/US2016/040572

申请日：2016-06-30

Applicant: TEXAS INSTRUMENTS INCORPORATED ,  TEXAS INSTRUMENTS JAPAN LIMITED

Inventor： CHAKRABORTY, Sudipto

IPC: H03F3/20

CPC classification number: H03B5/1212 ,  H03B5/1228 ,  H03B5/1265 ,  H03F3/211 ,  H03F3/213 ,  H03F3/245 ,  H03G1/0005 ,  H03G3/3042 ,  H04B2001/0416

Abstract: In described examples, a variable-gain power amplifying technique includes: generating a first oscillating signal (400) with a network of one or more reactive components included in an oscillator; and outputting a second oscillating signal (402) via one or more taps included in the network of the reactive components. The second oscillating signal has a magnitude that is proportional to and less than the first oscillating signal. The power amplifying technique further includes selecting one of the first and second oscillating signals to use for generating a power- amplified output signal (404), and amplifying the selected one of the first and second oscillating signals to generate the power-amplified output signal (406).

Abstract translation: 在所述示例中，可变增益功率放大技术包括：利用包括在振荡器中的一个或多个无功分量的网络产生第一振荡信号（400）; 以及经由包括在所述无功分量的网络中的一个或多个抽头输出第二振荡信号（402）。 第二振荡信号具有与第一振荡信号成比例且小于第一振荡信号的幅度。 功率放大技术还包括选择用于产生功率放大输出信号（404）的第一和第二振荡信号中的一个，以及放大所选择的第一和第二振荡信号之一以产生功率放大的输出信号（ 406）。

公开(公告)号：WO2016209474A1

公开(公告)日：2016-12-29

申请号：PCT/US2016/033954

申请日：2016-05-24

Applicant: QUALCOMM INCORPORATED

Inventor： KHALILI, Alireza ,  RAJAVI, Yashar ,  TAGHIVAND, Mazhareddin

IPC: H03B5/36 ,  H03B5/12

CPC classification number: H03B5/364 ,  H03B5/1212 ,  H03B5/1228 ,  H03B2200/0036 ,  H03B2200/0082

Abstract: A circuit includes: first and second output terminals; a reference resonator coupled between the first and second output terminals; a cross-coupled oscillation unit coupled to the first and second output terminals; a first MOSFET diode coupled to the cross-coupled oscillation unit, the first MOSFET diode including a first transistor, a first resistor coupled between gate and drain terminals of the first transistor, and a first capacitor; a second MOSFET diode coupled to the cross-coupled oscillation unit, the second MOSFET diode including a second transistor, a second resistor coupled between gate and drain terminals of the second transistor, and a second capacitor cross coupled between the drain terminal of the second transistor and the gate terminal of the first transistor, wherein the first capacitor is cross coupled between the drain terminal of the first transistor and the gate terminal of the second transistor.

Abstract translation: 电路包括：第一和第二输出端子; 耦合在所述第一和第二输出端子之间的参考谐振器; 耦合到所述第一和第二输出端子的交叉耦合振荡单元; 耦合到所述交叉耦合振荡单元的第一MOSFET二极管，所述第一MOSFET二极管包括第一晶体管，耦合在所述第一晶体管的栅极和漏极端子之间的第一电阻器和第一电容器; 耦合到交叉耦合振荡单元的第二MOSFET二极管，所述第二MOSFET二极管包括第二晶体管，耦合在所述第二晶体管的栅极和漏极端子之间的第二电阻器以及耦合在所述第二晶体管的漏极端子之间的第二电容器 和第一晶体管的栅极端子，其中第一电容器交叉耦合在第一晶体管的漏极端子和第二晶体管的栅极端子之间。

公开(公告)号：WO2016111761A1

公开(公告)日：2016-07-14

申请号：PCT/US2015/061877

申请日：2015-11-20

Applicant: QUALCOMM INCORPORATED

Inventor： TAGHIVAND, Mazhareddin ,  JOHANSEN, Keplin Victor

IPC: H03B5/12

CPC classification number: H03B5/1262 ,  H03B5/1203 ,  H03B5/1206 ,  H03B5/1209 ,  H03B5/1228 ,  H03B5/1243 ,  H03B5/1265 ,  H03B5/129

Abstract: Systems and methods for biasing frequency oscillators to minimize phase noise are disclosed. The system may comprise a tank circuit having an inductor, at least a first coupling capacitor and a second coupling capacitor. The system may further comprise a varactor circuit electrically connected to the first coupling capacitor and the second coupling capacitor. The system may further comprise at least one first metal oxide semiconductor (MOS) device electrically connected in shunt with the tank circuit and a bias voltage. The at least one first MOS device may be electrically connected to a first gate bias voltage configured to bias the at least one first MOS device such that a first gate-to-source voltage of the at least one first MOS device remains below the first threshold voltage.

Abstract translation: 公开了用于偏置频率振荡器以最小化相位噪声的系统和方法。 该系统可以包括具有电感器，至少第一耦合电容器和第二耦合电容器的振荡电路。 该系统还可以包括电连接到第一耦合电容器和第二耦合电容器的变容二极管电路。 该系统可以进一步包括至少一个第一金属氧化物半导体（MOS）器件，其电连接到与谐振电路并联的偏置电压。 至少一个第一MOS器件可以电连接到第一栅极偏置电压，其被配置为偏置至少一个第一MOS器件，使得至少一个第一MOS器件的第一栅极至源极电压保持低于第一阈值 电压。

公开(公告)号：WO2016054612A1

公开(公告)日：2016-04-07

申请号：PCT/US2015/053891

申请日：2015-10-03

Applicant: ZARETSKY, Howard

Inventor： BABAIE, Masoud ,  STASZEWSKI, Robert, Bogdan

IPC: H03B5/14

CPC classification number: H03B5/1212 ,  H03B5/1215 ,  H03B5/1218 ,  H03B5/1228 ,  H03B5/124 ,  H03B5/1265 ,  H03B5/1281 ,  H03B5/1293 ,  H03B5/1296 ,  H03J2200/10 ,  H03L7/081 ,  H03L7/0991 ,  H03L7/1976

Abstract: A novel and useful RF oscillator suitable for use in applications requiring ultra-low voltage and power. The oscillator structure, employing alternating current source transistors, combines the benefits of low supply voltage operation of conventional NMOS cross-coupled oscillators together with high current efficiency of the complementary push-pull oscillators. In addition, the 1/f noise upconversion is also reduced. The oscillator can be incorporated within a wide range of circuit applications, including for example a conventional phase locked loop (PLL), all-digital phase-locked loop (ADPLL), wireline transceiver circuits and mobile devices.

Abstract translation: 一种新颖有用的RF振荡器，适用于需要超低电压和功率的应用。 采用交流电源晶体管的振荡器结构将常规NMOS交叉耦合振荡器的低电源电压工作的优点与互补推挽式振荡器的高电流效率相结合。 此外，1 / f噪声上变频也降低。 振荡器可以并入广泛的电路应用中，包括例如常规的锁相环（PLL），全数字锁相环（ADPLL），有线收发器电路和移动设备。

公开(公告)号：WO2016029946A1

公开(公告)日：2016-03-03

申请号：PCT/EP2014/068238

申请日：2014-08-28

Applicant: TELEFONAKTIEBOLAGET L M ERICSSON (PUBL)

Inventor： BAO, Mingquan

IPC: H03B5/12

CPC classification number: H03B5/1212 ,  H03B5/1228 ,  H03B5/1231 ,  H03B5/1243 ,  H03B2200/009 ,  H03B2201/031

Abstract: A voltage controlled oscillator (200) for generating a signal with a frequency range. The voltage controlled oscillator (200) comprises an oscillator core (210) comprising an amplifier (212) and a resonator (214) and a tunable capacitance cell (220) having an input/output port. The input/output port is connected to the resonator (214) of the oscillator core (210). The tunable capacitance cell (220) comprises a cross-coupled transistor pair (Q11; Q12), the base or gate of the first transistor (Q11) and the base or gate of the second transistor (Q12) are coupled to a control signal to tuning an input capacitance and conductance of the tunable capacitance cell (220).

Abstract translation: 一种用于产生具有频率范围的信号的压控振荡器（200）。 压控振荡器（200）包括具有放大器（212）和谐振器（214）的振荡器芯（210）和具有输入/输出端口的可调谐电容单元（220）。 输入/输出端口连接到振荡器芯（210）的谐振器（214）。 可调电容单元（220）包括交叉耦合晶体管对（Q11; Q12），第一晶体管（Q11）的基极或栅极和第二晶体管（Q12）的基极或栅极耦合到控制信号 调谐可调电容单元（220）的输入电容和电导。

公开(公告)号：WO2016029058A1

公开(公告)日：2016-02-25

申请号：PCT/US2015/046170

申请日：2015-08-20

Applicant: ZARETSKY, Howard

Inventor： VLACHOGIANNAKIS, Gerasimos, S. ,  STASZEWSKI, Robert, Bogdan ,  XIMENES, Auqusto, Ronchini

IPC: H03L7/08 ,  H03M1/50 ,  H03M1/82

CPC classification number: H03B5/1265 ,  G04F10/005 ,  H03B1/00 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1296 ,  H03J2200/10 ,  H03K3/015 ,  H03K3/0315 ,  H03L7/0802 ,  H03L7/0893 ,  H03L7/093 ,  H03L7/1976 ,  H03L2207/50 ,  H03M1/002 ,  H03M1/201

Abstract: A novel and useful look-ahead time to digital converter (TDC) that is applied to an all digital phase locked loop (ADPLL) as the fractional phase error detector. The deterministic nature of the phase error during frequency/phase lock is exploited to achieve a reduction in power consumption of the TDC. The look-ahead TDC circuit is used to construct a cyclic DTC- TDC pair which functions to reduce fractional spurs of the output spectrum in near-integer channels by randomly rotating the cyclic DTC-TDC structure so that it starts from a different point every reference clock thereby averaging out the mismatch of the elements. Associated rotation and dithering methods are also presented. The ADPLL is achieved using the look-ahead TDC and/or cyclic DTC-TDC pair circuit.

Abstract translation: 数字转换器（TDC）的新颖有用的超前时间，适用于全数字锁相环（ADPLL）作为分数相位误差检测器。 利用频率/锁相期间相位误差的确定性来实现TDC功耗的降低。 先行TDC电路用于构建循环DTC-TDC对，其通过随机旋转循环DTC-TDC结构来减少近整数通道中的输出频谱的分数杂散，使其从每个参考的不同点开始 从而平均化元件的不匹配。 还提出了相关的旋转和抖动方法。 使用前瞻TDC和/或循环DTC-TDC对电路来实现ADPLL。

公开(公告)号：WO2015072649A1

公开(公告)日：2015-05-21

申请号：PCT/KR2014/006260

申请日：2014-07-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： LEE, Joon-Hee ,  CHOI, Jong-Won ,  HAN, Sang-Wook ,  LEE, Sung-Jun ,  LEE, Young-Taek ,  PU, Young-Gun

IPC: H03L7/099

CPC classification number: H03K3/012 ,  H03B5/04 ,  H03B5/1212 ,  H03B5/1228 ,  H03B5/1234 ,  H03B5/124 ,  H03K17/145 ,  H03K17/6877

Abstract: An electronic device for compensating for process variation is provided. The electronic device includes a first circuit configured to consume a current supplied to the first circuit, and a second circuit configured to control the current supplied to the first circuit. The second circuit is configured to generate a signal for controlling the current supplied to the circuit based on a frequency of a pulse signal generated using a second component that is of a same kind as a first component of the first circuit.

Abstract translation: 提供了用于补偿工艺变化的电子设备。 电子设备包括被配置为消耗提供给第一电路的电流的第一电路和被配置为控制提供给第一电路的电流的第二电路。 第二电路被配置为基于使用与第一电路的第一分量相同种类的第二分量产生的脉冲信号的频率来产生用于控制提供给电路的电流的信号。

公开(公告)号：WO2014124690A1

公开(公告)日：2014-08-21

申请号：PCT/EP2013/053108

申请日：2013-02-15

Applicant: HUAWEI TECHNOLOGIES CO., LTD. ,  STASZEWSKI, Robert Bogdan ,  BABAIE, Masoud ,  VISWESWARAN, Akshay ,  HE, Zhuobiao

Inventor： STASZEWSKI, Robert Bogdan ,  BABAIE, Masoud ,  VISWESWARAN, Akshay ,  HE, Zhuobiao

IPC: H03B5/12

CPC classification number: H03L7/06 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/124 ,  H03B5/1265 ,  H03B5/1296 ,  H03B2200/0036 ,  H03B2200/0048 ,  H03B2200/0062 ,  H03B2200/007 ,  H03B2200/0082 ,  H03H11/0405

Abstract: The invention relates to an oscillator(300), comprising: a pair of transistors (301, 303) which source terminals (SOURCEA, SOURCEB) are interconnected and which drain (DRAINA, DRAINB) and gate (GATEA, GATEB) terminals are coupled by a positive feedback loop comprising an oscillator tank (309), wherein the source terminals (SOURCEA, SOURCEB) of the transistors (301, 303) are connected to a current source (305) configured to control physical parameters of the oscillator(300).

Abstract translation: 本发明涉及一种振荡器（300），包括：源极端子（SOURCEA，SOURCEB）互连的一对晶体管（301,303），以及哪个漏极（DRAINA，DRAINB）和栅极（GATEA，GATEB）端子通过 包括振荡器箱（309）的正反馈回路，其中晶体管（301,303）的源极端子（SOURCEA，SOURCEB）连接到被配置为控制振荡器（300）的物理参数的电流源（305）。

公开(公告)号：WO2013169071A1

公开(公告)日：2013-11-14

申请号：PCT/KR2013/004163

申请日：2013-05-10

Applicant: SAMSUNG ELECTRONICS CO., LTD. ,  RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY

Inventor： LEE, Jae Sup ,  KIM, Hong Jin ,  PARK, Hyung Gu ,  LEE, Kang Yoon

IPC: H04B1/00 ,  H03L7/08

CPC classification number: H04B1/38 ,  H03B5/1215 ,  H03B5/1228 ,  H03B2200/0062 ,  H03C3/0916 ,  H03C3/0975 ,  H03C3/0991 ,  H03L7/0802 ,  H03L7/0895 ,  H03L7/0898 ,  H03L7/099 ,  H03L7/1072 ,  H04L5/0062 ,  H04L7/033 ,  H04L2027/0016 ,  H04L2027/0022 ,  H04L2027/0055

Abstract: A transceiver may include a reception (Rx) radio frequency (RF) part configured to process a received signal, a transmission (Tx) RF part configured to process a transmitted signal, and a phase lock loop (PLL) configured to provide a reception frequency to the reception RF part and provide a transmission frequency to the transmission RF part. The PLL may be controlled according to whether the reception RF part or the transmission RF part is on. In addition, a transceiver may include quenching waveform generator (QWGs) to control quenching waveforms of the RF parts corresponding to a plurality of antennas. The quenching waveforms may be generated respectively by VCOs operating at a same frequency. The QWGs may control the VCOs such that the quenching waveforms do not overlap.

Abstract translation: 收发器可以包括被配置为处理接收信号的接收（Rx）射频（RF）部分，被配置为处理发送信号的发送（Tx）RF部分）和被配置为提供接收频率 并且向发送RF部提供发送频率。 可以根据接收RF部分还是发射RF部分接通来控制PLL。 此外，收发器可以包括淬火波形发生器（QWG）以控制对应于多个天线的RF部件的淬灭波形。 淬灭波形可以由以相同频率工作的VCO分别产生。 QWG可以控制VCO，使得淬灭波形不重叠。

公开(公告)号：WO2013137867A1

公开(公告)日：2013-09-19

申请号：PCT/US2012/028955

申请日：2012-03-13

Applicant: INTEL CORPORATION ,  WEI, Fangxing ,  FAN, Yongping

Inventor： WEI, Fangxing ,  FAN, Yongping

IPC: H03B5/04 ,  H03B5/12

CPC classification number: H03B5/04 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1243 ,  H03B5/1265

Abstract: A temperature compensation apparatus may include a sense circuit configured to produce a sense voltage that is dependent on temperature and a temperature compensation circuit configured to receive the sense voltage and produce a temperature compensation control signal to control a compensation capacitor array of an oscillator. The temperature compensation circuit may be configured to calibrate the control signal to have a first value at a first temperature. The temperature compensation circuit may also be configured to calibrate a trimming level (e.g., slope) of the control signal.

Abstract translation: 温度补偿装置可以包括被配置为产生取决于温度的感测电压的感测电路和被配置为接收感测电压并产生温度补偿控制信号以控制振荡器的补偿电容器阵列的温度补偿电路。 温度补偿电路可以被配置为校准控制信号以具有处于第一温度的第一值。 温度补偿电路还可以被配置为校准控制信号的微调电平（例如，斜率）。