公开(公告)号：WO2018136682A1

公开(公告)日：2018-07-26

申请号：PCT/US2018/014326

申请日：2018-01-19

Applicant: CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR, LTD. ,  ZHU, Lei

Inventor： ZHU, Lei ,  HE, Ku ,  ZHAO, Xin ,  SONG, Miao ,  SINGH, Saurabh ,  JAYAKUMAR, Vinod

IPC: H03F1/32 ,  H03F3/217 ,  H03F1/30 ,  H03F3/187

Abstract: A method may include, in an apparatus comprising a closed loop amplifier and a signal processing block configured to generate an amplifier input signal as a function of an upstream signal received at an input of the signal processing block, in a calibration mode of the apparatus: decoupling a second stage input of the amplifier from a first stage output of the amplifier; determining an offset signal that when applied to the input of a signal processing block as the upstream signal generates approximately zero as an intermediate signal generated by the first stage of the amplifier; and controlling one or more parameters of the apparatus based on the offset signal to compensate for an offset of at least one of the first stage and the signal processing block.

公开(公告)号：WO2018128937A1

公开(公告)日：2018-07-12

申请号：PCT/US2017/069066

申请日：2017-12-29

Applicant: AVNERA CORPORATION

Inventor： LINK, Garry, N. ,  KING, Eric ,  ZHAO, Xudong ,  LEE, Wai ,  STANGE, Alexander, C. ,  KUMAR, Amit

IPC: H03F1/02 ,  H03F1/30 ,  H03F3/187

Abstract: A Class G amplifier system including a processing unit configured to receive an input signal and output a delayed processed input signal, a class G amplifier configured to receive the delayed processed input signal, and a power supply. The power supply includes a regulator configured to operate in a plurality of configurations, each configuration outputs a different supply voltage to the class G amplifier and a control circuit configured to receive the input signal and determine the supply voltage required from the regulator when the delayed processed input signal is received at the class G amplifier, and output a signal to the regulator to indicate the required configuration for the required supply voltage.

公开(公告)号：WO2017160520A3

公开(公告)日：2017-09-21

申请号：PCT/US2017/020911

申请日：2017-03-06

Applicant: CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR, LTD. ,  MELANSON, John L.

Inventor： MELANSON, John L. ,  KING, Eric J. ,  HE, Zhaohui ,  MARU, Siddharth

IPC: H03F3/217 ,  H03F3/187 ,  H04R3/02

Abstract: A signal processing system for producing a load voltage at a load output of the signal processing system, wherein the load output comprises a first load terminal having a first load voltage and a second load terminal having a second load voltage such that the load voltage comprises a difference between the first load voltage and the second load voltage, and may include a first processing path configured to process a first signal derived from an input signal to generate the first load voltage at a first processing path output, a second processing path configured to process a second signal received at a second processing path input and derived from the input signal, wherein the second signal comprises information of the input signal absent from the first signal, to generate the second load voltage at a second processing path output, and a high-pass filter coupled between the first processing path output and the second processing path input.

公开(公告)号：WO2017081571A1

公开(公告)日：2017-05-18

申请号：PCT/IB2016/056412

申请日：2016-10-25

Applicant: ISTITUTO NAZIONALE DI GEOFISICA E VULCANOLOGIA

Inventor： ROMEO, Giovanni

IPC: H03F3/187 ,  H03F3/45 ,  H03F1/56 ,  H04R3/00

CPC classification number: H03F3/187 ,  H03F1/56 ,  H03F3/45475 ,  H03F2200/03 ,  H03F2200/321 ,  H03F2200/387 ,  H03F2200/435 ,  H03F2200/462 ,  H03F2200/471 ,  H03F2203/45138 ,  H04R3/002 ,  H04R3/007 ,  H04R2400/00

Abstract: The invention relates to a device (12) for amplifying audio signals, comprising an amplifier (121) adapted to receive a first signal as input and to output a second signal capable of powering a loudspeaker (R L ), control means (122) configured for detecting the current and voltage of the second signal and for controlling said amplifier on the basis of the voltage of the first signal and of selection information (k) that allows selecting whether the amplifier (121) is also driven on the basis of the voltage or current of the second signal, tuning means (123) configured for changing the output impedance of the device (12) so that, when the first audio signal has constant frequency and voltage, the voltage of the second signal will be independent of the selection information (k) used by the control means for controlling said amplifier (121).

Abstract translation: 本发明涉及一种用于放大音频信号的设备（12），包括适于接收作为输入的第一信号的放大器（121）并且输出能够为扬声器（R 1）供电的第二信号， （122），其被配置用于检测第二信号的电流和电压，并且用于基于第一信号的电压和选择信息（k）来控制所述放大器，所述选择信息（k）允许选择 根据第二信号的电压或电流来驱动放大器（121）;调谐装置（123），其被配置用于改变装置（12）的输出阻抗，使得当第一音频信号具有恒定的频率 和电压，第二信号的电压将独立于用于控制所述放大器（121）的控制装置所使用的选择信息（k）。

公开(公告)号：WO2017030719A1

公开(公告)日：2017-02-23

申请号：PCT/US2016/042947

申请日：2016-07-19

Applicant: QUALCOMM INCORPORATED

Inventor： TANG, Dongyang ,  DHANASEKARAN, Vijayakumar

IPC: H03F1/08 ,  H03F1/26 ,  H03F1/34 ,  H03F3/187 ,  H03F3/393 ,  H03F3/45

CPC classification number: H03F1/26 ,  H03F1/086 ,  H03F1/342 ,  H03F3/187 ,  H03F3/387 ,  H03F3/393 ,  H03F3/45071 ,  H03F3/45475 ,  H03F2200/129 ,  H03F2200/156 ,  H03F2200/159 ,  H03F2200/21 ,  H03F2200/252 ,  H03F2200/372 ,  H03F2200/81 ,  H03F2200/87 ,  H03F2200/91 ,  H03F2203/45116 ,  H03F2203/45134 ,  H03F2203/45136 ,  H03F2203/45151 ,  H03F2203/45221 ,  H03F2203/45528 ,  H03F2203/45534 ,  H03F2203/45562 ,  H03F2203/45594 ,  H03F2203/45601 ,  H03F2203/45614 ,  H03F2203/45616

Abstract: A voltage reference buffer circuit, including: an amplifier having input terminals and output terminals; a plurality of current sources coupled to the input terminals of the amplifier, the plurality of current sources including a plurality of degeneration resistors coupled to a first plurality of voltage supplies; and a degeneration resistor chopping module comprising a first and second plurality of switches coupled to the plurality of degeneration resistors.

Abstract translation: 一种电压参考缓冲电路，包括：具有输入端和输出端的放大器; 耦合到放大器的输入端的多个电流源，所述多个电流源包括耦合到第一多个电压源的多个退化电阻; 以及退化电阻斩波模块，包括耦合到所述多个退化电阻器的第一和第二多个开关。

公开(公告)号：WO2016030668A1

公开(公告)日：2016-03-03

申请号：PCT/GB2015/052444

申请日：2015-08-24

Applicant: CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LIMITED

Inventor： LESSO, John Paul ,  IDO, Toru

IPC: H03F3/217 ,  H03F1/32 ,  H03F3/187 ,  H03F1/26

CPC classification number: H03G3/3089 ,  H03F1/26 ,  H03F1/32 ,  H03F1/34 ,  H03F3/187 ,  H03F3/217 ,  H03F3/2171 ,  H03F3/2173 ,  H03F3/2175 ,  H03F2200/102 ,  H03F2200/339 ,  H03F2200/432 ,  H03G7/002 ,  H03G7/007

Abstract: A modulator (201) controls a Class D output stage (202) based on a modulator input signal (Dm) to generate an output signal (Vout) which is representative of an input signal (Din). An error block (205) generates an error signal (e) from the output signal and the input signal. The error signal may be received at a first input (204) of a signal selector block (203). The input signal may be received at a second input (206) of the signal selector block (203). The signal selector block (203) may be operable in first and second modes of operation, wherein in the first mode the modulator input signal is based at least in part on the error signal; and in the second mode the modulator input signal is based on the digital input signal and is independent of the error signal. The error signal can be used to reduce distortion.

Abstract translation: 调制器（201）基于调制器输入信号（Dm）控制D类输出级（202），以产生代表输入信号（Din）的输出信号（Vout）。 误差块（205）根据输出信号和输入信号产生误差信号（e）。 误差信号可以在信号选择器块（203）的第一输入（204）处被接收。 可以在信号选择器块（203）的第二输入（206）处接收输入信号。 信号选择器块（203）可以在第一和第二操作模式下操作，其中在第一模式中，调制器输入信号至少部分地基于误差信号; 并且在第二模式中，调制器输入信号基于数字输入信号，并且与误差信号无关。 误差信号可用于减少失真。

公开(公告)号：WO2016010843A1

公开(公告)日：2016-01-21

申请号：PCT/US2015/039893

申请日：2015-07-10

Applicant: QUALCOMM INCORPORATED

Inventor： DHANASEKARAN, Vijayakumar

IPC: H03F3/45 ,  H03F3/187

CPC classification number: H03F3/183 ,  H03F3/187 ,  H03F3/211 ,  H03F3/45071 ,  H03F3/45475 ,  H03F3/45941 ,  H03F2200/03 ,  H03F2200/156 ,  H03F2203/45116 ,  H03F2203/45512 ,  H03F2203/45521 ,  H03F2203/45528

Abstract: An apparatus (260) includes a voltage divider circuit (306) and a reference amplifier (308) coupled to the voltage divider circuit (306). The reference amplifier (308) is configured to provide a feedback voltage to input circuitry (302) of an amplifier (304).

Abstract translation: 装置（260）包括耦合到分压器电路（306）的分压器电路（306）和参考放大器（308）。 参考放大器（308）被配置为向放大器（304）的输入电路（302）提供反馈电压。

公开(公告)号：WO2015153025A1

公开(公告)日：2015-10-08

申请号：PCT/US2015/017697

申请日：2015-02-26

Applicant: QUALCOMM INCORPORATED

Inventor： AZIN, Meysam ,  MEHRABI, Arash ,  HUANG, Wenchang

IPC: H03F3/00 ,  H03F3/181 ,  H03F3/187 ,  H03H19/00

CPC classification number: H03F3/185 ,  H03F3/005 ,  H03F3/181 ,  H03F3/187 ,  H03F3/45179 ,  H03F3/45183 ,  H03F2200/03 ,  H03F2203/45016 ,  H03F2203/45514 ,  H03H19/004 ,  H04R3/00

Abstract: An integrated DC blocking amplifier circuit (100), including: an operational amplifier (110) configured in a differential amplifier; and at least first and second two-stage switched-capacitor circuits, each two stage switched-capacitor circuit including a first-stage circuit(140,144) and a second-stage circuit (142,146), wherein the first two-stage switched capacitor circuit is connected to a positive feedback path of the operational amplifier and the second two-stage switched capacitor circuit is connected to a negative feedback path of the operational amplifier, wherein the first-stage circuit is switched at a relatively low switching frequency, while the second-stage circuit is switched at a relatively high switching frequency.

Abstract translation: 一种集成直流阻塞放大器电路（100），包括：配置在差分放大器中的运算放大器（110） 以及至少第一和第二两级开关电容器电路，每个两级开关电容器电路包括第一级电路（140,144）和第二级电路（142,146），其中所述第一两级开关电容器电路是 连接到运算放大器的正反馈路径，并且第二两级开关电容器电路连接到运算放大器的负反馈路径，其中第一级电路以相对低的开关频率切换， 以较高的开关频率切换。

公开(公告)号：WO2014174283A1

公开(公告)日：2014-10-30

申请号：PCT/GB2014/051262

申请日：2014-04-23

Applicant: WOLFSON MICROELECTRONICS PLC

Inventor： DEAS, James ,  LESSO, John Paul ,  HARDY, Emmanuel ,  IDO, Toru

IPC: H04R3/06 ,  H04R19/00 ,  G01D5/244 ,  H03F3/187 ,  H03M3/00 ,  G01P15/125 ,  H04R29/00

CPC classification number: H04R3/06 ,  G01D3/02 ,  G01D5/24 ,  G01D5/24476 ,  G01P15/125 ,  G01P2015/0865 ,  H03M1/0609 ,  H03M1/12 ,  H03M3/352 ,  H03M3/458 ,  H04R19/005 ,  H04R19/04 ,  H04R29/004 ,  H04R2201/003 ,  H04R2499/11

Abstract: This application relates to circuitry for processing sense signals generated by MEMS capacitive transducers for compensating for distortion in such sense signals. The circuitry has a signal path between an input (204) for receiving the sense signal and an output (205) for outputting an output signal based on said sense signal. Compensation circuitry (206, 207) is configured to monitor the signal at a first point along the signal path and generate a correction signal (S corr ); and modify the signal at at least a second point along said signal path based on said correction signal. The correction signal is generated as a function of the value of the signal at the first point along the signal path so as to introduce compensation components into the output signal that compensate for distortion components in the sense signal. The first point in the signal path may be before or after the second point in the signal path. The monitoring may be performed in an analogue or a digital part of the signal path and in either case the modification may be applied in an analogue or a digital part of the signal path.

Abstract translation: 本申请涉及用于处理由MEMS电容换能器产生的感测信号以补偿这种感测信号中的失真的电路。 电路具有用于接收感测信号的输入端（204）和用于基于所述感测信号输出输出信号的输出（205）之间的信号路径。 补偿电路（206,207）被配置为在沿着信号路径的第一点处监视信号并产生校正信号（Scorr）; 并且基于所述校正信号沿着所述信号路径在至少第二点处修改信号。 校正信号作为沿着信号路径的第一点处的信号的值的函数产生，以便将补偿分量引入到补偿感测信号中的失真分量的输出信号中。 信号路径中的第一点可以在信号路径中的第二点之前或之后。 可以在信号路径的模拟或数字部分中执行监视，并且在任一情况下，修改可以应用于信号路径的模拟或数字部分。

公开(公告)号：WO2013012537A1

公开(公告)日：2013-01-24

申请号：PCT/US2012/044702

申请日：2012-06-28

Applicant: QUALCOMM INCORPORATED ,  DHANASEKARAN, Vijayakumar

Inventor： DHANASEKARAN, Vijayakumar

IPC: H03F1/30 ,  H03F3/72 ,  H03F3/187 ,  H03F3/30 ,  H03G3/34

CPC classification number: H03F1/305 ,  H03F3/187 ,  H03F3/3022 ,  H03F3/72 ,  H03F2200/381 ,  H03F2200/411 ,  H03F2200/453 ,  H03F2203/45136 ,  H03F2203/7236 ,  H03G3/348

Abstract: An amplifier with improved click and pop noise reduction is disclosed In one implementation, an amplifier (100) is provided that includes a main output stage (106) configured to output an amplified signal at a main output terminal (112), a secondary output stage (108) con¬ figured to output a copy of the amplified signal at a secondary out¬ put terminal (116), and a signal coupler (118) configured to provide a variable resistance coupling between the secondary output termi¬ nal (116) and the main output terminal (112) to reduce click and pop noise at the main output terminal (112).

Abstract translation: 公开了具有改进的点击和弹奏噪声降低的放大器在一个实施方式中，提供了一种放大器（100），其包括被配置为在主输出端子（112）输出放大信号的主输出级（106），辅助输出级 （108）被配置为在辅助输出端子（116）处输出放大信号的副本，以及信号耦合器（118），其被配置为在次级输出端子（116）和 主输出端（112），以减少主输出端（112）处的点击和弹出噪声。