Abstract:
A collector boost circuit is disclosed for providing a first voltage in a first mode of operation to a power amplifier, and another voltage in a second mode of operation to the power amplifier. The collector boost circuit uses an indicator signal derived by an RF detector to switch between the first and the second mode of operation. The another voltage is a boosted voltage greater than the first voltage and is provided when required during peak excursions to prevent amplifier clipping through a boost capacitor. The another voltage is continuous and varies in accordance with the detected peak signal amplitude.
Abstract:
According to an exemplary embodiment, an amplification module includes a power control circuit. The amplification module further includes a power amplifier coupled to the power control circuit and configured to draw a supply current and receive a supply voltage from the power control circuit. The power control circuit is configured to control a DC power provided to the power amplifier by controlling a product of a sense current, which is a mirror current of the supply current, and the supply voltage. The power control circuit includes a feedback voltage that corresponds to the product of the sense current and the supply voltage. The power control circuit further includes an analog multiplier circuit configured to receive the sense current and the supply voltage and generate the feedback voltage. The power control circuit further includes a differential error amplifier configured to compare the feedback voltage to a control voltage.
Abstract:
According to an exemplary embodiment, an amplification module includes a power control circuit. The amplification module further includes a power amplifier coupled to the power control circuit and configured to draw a supply current and receive a supply voltage from the power control circuit. The power control circuit is configured to control a DC power provided to the power amplifier by controlling a product of a sense current, which is a mirror current of the supply current, and the supply voltage. The power control circuit includes a feedback voltage that corresponds to the product of the sense current and the supply voltage. The power control circuit further includes an analog multiplier circuit configured to receive the sense current and the supply voltage and generate the feedback voltage. The power control circuit further includes a differential error amplifier configured to compare the feedback voltage to a control voltage.
Abstract:
A circuit according to the present invention improves the power supply rejection ratio for a pulse width modulated digital amplifier and can be used as a compressor and/or limiter. The circuit preferably operates by using voltage level translation to vary the amplitude of a triangle wave in response to changes in power supply voltage prior to input of the wave into a comparator of the PWM device. Because the circuit operates to improve power supply rejection, little or no distortion is introduced into the signal when used as a compressor and/or limiter. Additionally, the circuit is optionally implemented in a Class D amplifier, and provides a lower cost of implementation than conventional designs in such implementations.
Abstract:
An amplifier includes a Darlington transistor pair (110, 120) and a biasing network to increase bias currents in an input transistor (110). Circuit (100) includes in put transistor (110), second transistior (120), radio frequency (RF) choke (112), degeneration inductor (122), capacitopr (132) and voltage controlled current source (130). Input transistor (110) and second transistor (120) are coupled to form a Darlington transistor pair with the collectors coupled together at node (142), and the emitter of input transistor (120) at node (111).