Abstract:
본 발명의 스위칭 레귤레이터에서 역전류 검출기의 오동작을 방지하는 역전류 검출기 오동작 방지회로에 관한 것으로, 역전류 검출기를 통해 검출된 역전류 검출신호를 하나의 주기에 한번의 신호만을 출력하는 역전류 검출신호 전달부와, 역전류 검출신호 전달부의 출력이 정확한 정보인지를 확인하는 역전류 검출신호 검증부, 및 역전류 검출신호 전달부와 상기 역전류 검출신호 검증부의 신호를 전송받아 역전류 검출신호를 생성하는 역전류 검출신호 생성부를 포함하는 것을 특징으로 한다.
Abstract:
A method of queuing access to a power supply shared by a set of electrical access points. The access points turn on independently from one another and thus have independent power draws. Each access point has a specific power draw when on. The on state and associated power draw of each of access point is identified, and a load duration curve for each access point is normalized (i.e., combined with load duration curve(s)) from the other access points) into a probability distribution function. The probability distribution function is a normalized load duration curve that thus accounts for a varying set of "operating states" that may occur with respect to the set of access points (when viewed collectively). Each operating state has an associated probability of occurrence. As the operating state of the set (of access points) changes, access to the power supply is selectively queued, or de-queued (if previously queued).
Abstract:
A voltage regulating circuit (28) is provided for regulating an output voltage in order to minimize an absolute difference between a level of said output voltage (VDDG) and a reference level (BGREF). The voltage regulating circuit (28) comprises a voltage regulator (42) and a reference level generator (60). The reference level generator (60) generates an internal reference level (MREF) on the basis of said output voltage level (VDDG) and said reference level (BGREF) such that said internal reference level (MREF) does not exceed said output voltage level (VDDG) by more than a maximum allowed increment. The voltage regulator (42) regulates said output voltage in order to minimize an absolute difference between said output voltage level (VDDG) and said internal reference level (MREF). A method of regulating an output voltage is also disclosed.
Abstract:
An example method of controlling a fuel cell power plant based on provided power includes selectively varying an electrical resistance of the variable resistive device responsive to at least one of a power provided by the fuel cell power plant, a current provided by the fuel cell power plant, or a voltage decay rate.
Abstract:
A system and method to measure and control power usage within a residential or commercial building plurality having of electrical circuits electrically connected to an over-current protection device to ensure optimum energy usage therein. The system and method includes a power measurement and control device electrically connected to one of the electrical circuits by which a load draws power that is operable to (i) measure an electrical parameter of the electrical circuits, (ii) compare the measured electrical parameter to an ideal electrical parameter, and (iii) adjust power supplied to one or more of the electrical circuits based on the comparison of the measured electrical parameter and the ideal electrical parameter via a wall socket. The adjustment of power may be automatic or manual deactivation, decrease, and/or increase of power supplied to the electrical circuits via the wall socket so that such is equivalent to or less than the ideal electrical parameter.
Abstract:
A common (ground) of a low voltage regulator is connected to a virtual common (ground) of an integrated circuit device that is also connected to transistor sources but isolated from a true ground connected to the substrate of the integrated circuit device. The regulated output voltage from the low voltage regulator rises the same as the virtual ground voltage rises when back-biased sufficient to reduce leakage current to an acceptable level in a given process technology. Therefore, the output of the low voltage regulator will maintain a normal operating voltage for the logic during a power saving back-biased condition.
Abstract:
Supply voltage sequencing circuitry includes a first sequencer (10-1) that produces an active level of a Power Good signal PG if a first supply voltage VOUTI exceeds an upper threshold V9o% while a control signal EN PG is active, and produces an inactive level of PG if EN PG is inactive. The PG level is latched when a control signal EN is inactive. A Power Down signal PD is produced if VOUTI is less than a lower threshold Vio% while EN is inactive. An active level of PD is produced when EN is active. A power-up sequence of supply voltages VOUTI, VOUT2, and VOUT3 monitored by the first sequencer and similar second (10-2) and third (10-3) sequencers, respectively, is determined by connection of PG of each of the first and second sequencers to control the supply voltage monitored by the next sequencer. A desired power-down sequence of the supply voltages is determined by connections of the PDs of the first and second sequencers in the power-down sequence to EN PG inputs and EN inputs of other sequencers, respectively, in accordance with a predetermined power-down algorithm.
Abstract:
Supply voltage sequencing circuitry includes a first sequencer (10-1) that produces an active level of a Power Good signal PG if a first supply voltage VOUTI exceeds an upper threshold V9o% while a control signal EN PG is active, and produces an inactive level of PG if EN PG is inactive. The PG level is latched when a control signal EN is inactive. A Power Down signal PD is produced if VOUTI is less than a lower threshold Vio% while EN is inactive. An active level of PD is produced when EN is active. A power-up sequence of supply voltages VOUTI, VOUT2, and VOUT3 monitored by the first sequencer and similar second (10-2) and third (10-3) sequencers, respectively, is determined by connection of PG of each of the first and second sequencers to control the supply voltage monitored by the next sequencer. A desired power-down sequence of the supply voltages is determined by connections of the PDs of the first and second sequencers in the power-down sequence to EN PG inputs and EN inputs of other sequencers, respectively, in accordance with a predetermined power-down algorithm.
Abstract:
A current source with active common mode rejection uses a principle of having a branch for the generation of the required current, to the output (107) of which one end of the load (3) is connected; and a branch of the active compensation circuit (ACC) (200), to the output (203) of which the other end of the load (3) is connected. By means of at least one input (201) of the ACC (200), at least one signal is sensed on the load, and subsequently it is processed so that the result of processing of at least one signal from at least one input (201) preferentially represents the common mode voltage, which corresponds to the pair of voltages at the voltage terminals (1) and (2) of the load (3), or voltage close to the common mode voltage. This result is subsequently processed by the regulating circuits of the ACC (200), which compare it to the reference potential value (4), and using the negative feedback principle, set such voltage on the output (203), which, within the control accuracy, leads to the equivalence of the reference potential (4) and the potential corresponding to the result of processing of at least one signal from at least one input (201).