一种负阻特性恒流源电路
    81.
    发明申请

    公开(公告)号:WO2013131314A1

    公开(公告)日:2013-09-12

    申请号:PCT/CN2012/074871

    申请日:2012-04-28

    Inventor: 王保均

    CPC classification number: G05F3/22

    Abstract: 负阻特性恒流源电路,包括电压检测电路(501)、恒流源(502)、输出电路(503)。恒流源(502)向电压检测电路(501)和输出电路(503)提供电流,恒流源(502)中流过的电流为恒流源(502)向电压检测电路(501)提供的电流和恒流源(502)向输出电路(503)提供的电流之和。电压检测电路(501)随着工作电压上升,吸收电流越大。恒流源(502)向电压检测电路(501)提供的电流越多,向输出电路(503)提供的电流相应减小。输出电路(503)把恒流源(502)向输出电路(503)提供的电流直接输出,或把恒流源(502)向输出电路(503)提供的电流放大或缩小后输出。在工作电压较高时,由于提供的偏置电流较小,降低了电路功耗。

    역전류 검출기 오작동 방지회로
    82.
    发明申请
    역전류 검출기 오작동 방지회로 审中-公开
    用于防止反向电流检测器故障的电路

    公开(公告)号:WO2013122309A1

    公开(公告)日:2013-08-22

    申请号:PCT/KR2012/009632

    申请日:2012-11-15

    Inventor: 김민성 장기석

    CPC classification number: H02M1/32 H02M3/1588 H02M2001/0009 Y02B70/1466

    Abstract: 본 발명의 스위칭 레귤레이터에서 역전류 검출기의 오동작을 방지하는 역전류 검출기 오동작 방지회로에 관한 것으로, 역전류 검출기를 통해 검출된 역전류 검출신호를 하나의 주기에 한번의 신호만을 출력하는 역전류 검출신호 전달부와, 역전류 검출신호 전달부의 출력이 정확한 정보인지를 확인하는 역전류 검출신호 검증부, 및 역전류 검출신호 전달부와 상기 역전류 검출신호 검증부의 신호를 전송받아 역전류 검출신호를 생성하는 역전류 검출신호 생성부를 포함하는 것을 특징으로 한다.

    Abstract translation: 本发明涉及一种用于防止开关调节器中的反向电流检测器故障的电路,包括:反向电流检测信号发送单元,用于在一个周期内仅输出一个信号用于由反向电流检测器检测的反向电流检测信号 ; 反向电流检测信号验证单元,用于确认反向电流检测信号发送单元的输出是否是正确的信息; 以及反向电流检测信号生成单元,用于通过从反向电流检测信号验证单元接收信号来产生反向电流检测信号。

    QUEUING ACCESS TO A SHARED POWER SUPPLY
    83.
    发明申请
    QUEUING ACCESS TO A SHARED POWER SUPPLY 审中-公开
    排队访问共享电源

    公开(公告)号:WO2012116205A3

    公开(公告)日:2012-12-27

    申请号:PCT/US2012026355

    申请日:2012-02-23

    Applicant: ECURV INC

    Abstract: A method of queuing access to a power supply shared by a set of electrical access points. The access points turn on independently from one another and thus have independent power draws. Each access point has a specific power draw when on. The on state and associated power draw of each of access point is identified, and a load duration curve for each access point is normalized (i.e., combined with load duration curve(s)) from the other access points) into a probability distribution function. The probability distribution function is a normalized load duration curve that thus accounts for a varying set of "operating states" that may occur with respect to the set of access points (when viewed collectively). Each operating state has an associated probability of occurrence. As the operating state of the set (of access points) changes, access to the power supply is selectively queued, or de-queued (if previously queued).

    Abstract translation: 一种排队访问由一组电接入点共享的电源的方法。 接入点彼此独立开启,因此具有独立的功率消耗。 打开时,每个接入点都具有特定的功率消耗。 识别每个接入点的开启状态和相关联的功率消耗,并且将每个接入点的负载持续时间曲线归一化(即,与来自其他接入点的负载持续时间曲线相结合)为概率分布函数。 概率分布函数是标准化的负载持续时间曲线,因此说明了关于该组接入点(当共同观看时)可能发生的变化的一组“操作状态”。 每个运行状态都有相关的发生概率。 随着(接入点)集的操作状态发生变化,对电源的访问将有选择地排队或取消排队(如果先前排队)。

    VOLTAGE REGULATING CIRCUIT AND METHOD
    84.
    发明申请
    VOLTAGE REGULATING CIRCUIT AND METHOD 审中-公开
    电压调节电路和方法

    公开(公告)号:WO2012164341A1

    公开(公告)日:2012-12-06

    申请号:PCT/IB2011/052323

    申请日:2011-05-27

    Abstract: A voltage regulating circuit (28) is provided for regulating an output voltage in order to minimize an absolute difference between a level of said output voltage (VDDG) and a reference level (BGREF). The voltage regulating circuit (28) comprises a voltage regulator (42) and a reference level generator (60). The reference level generator (60) generates an internal reference level (MREF) on the basis of said output voltage level (VDDG) and said reference level (BGREF) such that said internal reference level (MREF) does not exceed said output voltage level (VDDG) by more than a maximum allowed increment. The voltage regulator (42) regulates said output voltage in order to minimize an absolute difference between said output voltage level (VDDG) and said internal reference level (MREF). A method of regulating an output voltage is also disclosed.

    Abstract translation: 提供电压调节电路(28)用于调节输出电压,以使所述输出电压(VDDG)的电平与参考电平(BGREF)之间的绝对差最小化。 电压调节电路(28)包括电压调节器(42)和参考电平发生器(60)。 参考电平发生器(60)基于所述输出电压电平(VDDG)和所述参考电平(BGREF)产生内部参考电平(MREF),使得所述内部参考电平(MREF)不超过所述输出电压电平 VDDG)超过允许的最大增量。 电压调节器(42)调节所述输出电压,以便最小化所述输出电压电平(VDDG)和所述内部参考电平(MREF)之间的绝对差。 还公开了一种调节输出电压的方法。

    SYSTEM AND METHOD TO MEASURE AND CONTROL POWER CONSUMPTION IN A RESIDENTIAL OR COMMERCIAL BUILDING VIA A WALL SOCKET TO ENSURE OPTIMUM ENERGY USAGE THEREIN
    86.
    发明申请
    SYSTEM AND METHOD TO MEASURE AND CONTROL POWER CONSUMPTION IN A RESIDENTIAL OR COMMERCIAL BUILDING VIA A WALL SOCKET TO ENSURE OPTIMUM ENERGY USAGE THEREIN 审中-公开
    通过墙壁插座测量和控制居住或商业建筑中的功率消耗以确保其中的最佳能量使用的系统和方法

    公开(公告)号:WO2012065078A3

    公开(公告)日:2012-10-04

    申请号:PCT/US2011060394

    申请日:2011-11-11

    CPC classification number: G06Q50/06 G06Q30/02

    Abstract: A system and method to measure and control power usage within a residential or commercial building plurality having of electrical circuits electrically connected to an over-current protection device to ensure optimum energy usage therein. The system and method includes a power measurement and control device electrically connected to one of the electrical circuits by which a load draws power that is operable to (i) measure an electrical parameter of the electrical circuits, (ii) compare the measured electrical parameter to an ideal electrical parameter, and (iii) adjust power supplied to one or more of the electrical circuits based on the comparison of the measured electrical parameter and the ideal electrical parameter via a wall socket. The adjustment of power may be automatic or manual deactivation, decrease, and/or increase of power supplied to the electrical circuits via the wall socket so that such is equivalent to or less than the ideal electrical parameter.

    Abstract translation: 一种用于测量和控制住宅或商业建筑物内的电力使用的系统和方法,其具有电连接到过电流保护装置的电路,以确保其中的最佳能量使用。 所述系统和方法包括电力测量和控制装置,所述电力测量和控制装置电连接到所述电路中的一个,通过所述电路负载汲取电力,所述电力可操作以(i)测量电路的电参数,(ii)将测量的电参数 (iii)基于经由壁插座对所测量的电参数和理想电参数的比较来调节供应到一个或多个电路的功率。 功率的调节可以是自动的或手动的去激活,减少和/或增加经由壁式插座供应到电路的功率,使得其等于或小于理想的电参数。

    USING LOW VOLTAGE REGULATOR TO SUPPLY POWER TO A SOURCE-BIASED POWER DOMAIN
    87.
    发明申请
    USING LOW VOLTAGE REGULATOR TO SUPPLY POWER TO A SOURCE-BIASED POWER DOMAIN 审中-公开
    使用低电压稳压器将电源供电到源极偏置的电源域

    公开(公告)号:WO2012122221A2

    公开(公告)日:2012-09-13

    申请号:PCT/US2012/027985

    申请日:2012-03-07

    CPC classification number: G11C5/147 H01L27/092

    Abstract: A common (ground) of a low voltage regulator is connected to a virtual common (ground) of an integrated circuit device that is also connected to transistor sources but isolated from a true ground connected to the substrate of the integrated circuit device. The regulated output voltage from the low voltage regulator rises the same as the virtual ground voltage rises when back-biased sufficient to reduce leakage current to an acceptable level in a given process technology. Therefore, the output of the low voltage regulator will maintain a normal operating voltage for the logic during a power saving back-biased condition.

    Abstract translation: 低压调节器的公共(地)连接到也连接到晶体管源但与连接到集成电路器件的衬底的真实接地隔离的集成电路器件的虚拟公共(接地)。 来自低电压调节器的调节输出电压上升到虚拟接地电压上升的相同,当反向偏置足以在给定的工艺技术中将泄漏电流降低到可接受的水平。 因此,在省电反向偏置状态期间,低压调节器的输出将保持逻辑的正常工作电压。

    ANALOG POWER SEQUENCER AND METHOD
    88.
    发明申请

    公开(公告)号:WO2012083116A3

    公开(公告)日:2012-06-21

    申请号:PCT/US2011/065367

    申请日:2011-12-16

    Inventor: NOGAWA, Masashi

    Abstract: Supply voltage sequencing circuitry includes a first sequencer (10-1) that produces an active level of a Power Good signal PG if a first supply voltage VOUTI exceeds an upper threshold V9o% while a control signal EN PG is active, and produces an inactive level of PG if EN PG is inactive. The PG level is latched when a control signal EN is inactive. A Power Down signal PD is produced if VOUTI is less than a lower threshold Vio% while EN is inactive. An active level of PD is produced when EN is active. A power-up sequence of supply voltages VOUTI, VOUT2, and VOUT3 monitored by the first sequencer and similar second (10-2) and third (10-3) sequencers, respectively, is determined by connection of PG of each of the first and second sequencers to control the supply voltage monitored by the next sequencer. A desired power-down sequence of the supply voltages is determined by connections of the PDs of the first and second sequencers in the power-down sequence to EN PG inputs and EN inputs of other sequencers, respectively, in accordance with a predetermined power-down algorithm.

    ANALOG POWER SEQUENCER AND METHOD
    89.
    发明申请
    ANALOG POWER SEQUENCER AND METHOD 审中-公开
    模拟电源序列和方法

    公开(公告)号:WO2012083116A2

    公开(公告)日:2012-06-21

    申请号:PCT/US2011065367

    申请日:2011-12-16

    Inventor: NOGAWA MASASHI

    Abstract: Supply voltage sequencing circuitry includes a first sequencer (10-1) that produces an active level of a Power Good signal PG if a first supply voltage VOUTI exceeds an upper threshold V9o% while a control signal EN PG is active, and produces an inactive level of PG if EN PG is inactive. The PG level is latched when a control signal EN is inactive. A Power Down signal PD is produced if VOUTI is less than a lower threshold Vio% while EN is inactive. An active level of PD is produced when EN is active. A power-up sequence of supply voltages VOUTI, VOUT2, and VOUT3 monitored by the first sequencer and similar second (10-2) and third (10-3) sequencers, respectively, is determined by connection of PG of each of the first and second sequencers to control the supply voltage monitored by the next sequencer. A desired power-down sequence of the supply voltages is determined by connections of the PDs of the first and second sequencers in the power-down sequence to EN PG inputs and EN inputs of other sequencers, respectively, in accordance with a predetermined power-down algorithm.

    Abstract translation: 如果在控制信号EN PG有效时第一电源电压VOUTI超过上阈值V9o%,则电源电压排序电路包括第一定序器(10-1),其产生电源良好信号PG的有效电平,并产生无效电平 的PG如果EN PG不活动。 当控制信号EN无效时,PG电平被锁存。 如果在EN不活动的情况下,如果VOUTI小于较低阈值Vio%,则产生掉电信号PD。 当EN活动时,产生PD的有效电平。 由第一定序器和类似的第二(10-2)和第三(10-3)个定序器分别监视的电源电压VOUTI,VOUT2和VOUT3的上电序列分别由第一和第 第二个定序器来控制下一个音序器监控的电源电压。 电源电压的所需掉电序列由下列顺序决定:按照预定的掉电功能,分别将断电序列中的第一和第二定序器的PD分别连接到EN PG输入端和其他定序器的EN输入端 算法。

    CURRENT SOURCE WITH ACTIVE COMMON MODE REJECTION
    90.
    发明申请
    CURRENT SOURCE WITH ACTIVE COMMON MODE REJECTION 审中-公开
    主动通用模式拒绝的电流源

    公开(公告)号:WO2012053992A1

    公开(公告)日:2012-04-26

    申请号:PCT/SK2011/050013

    申请日:2011-08-30

    Applicant: BATKO, Ivan

    Inventor: BATKO, Ivan

    Abstract: A current source with active common mode rejection uses a principle of having a branch for the generation of the required current, to the output (107) of which one end of the load (3) is connected; and a branch of the active compensation circuit (ACC) (200), to the output (203) of which the other end of the load (3) is connected. By means of at least one input (201) of the ACC (200), at least one signal is sensed on the load, and subsequently it is processed so that the result of processing of at least one signal from at least one input (201) preferentially represents the common mode voltage, which corresponds to the pair of voltages at the voltage terminals (1) and (2) of the load (3), or voltage close to the common mode voltage. This result is subsequently processed by the regulating circuits of the ACC (200), which compare it to the reference potential value (4), and using the negative feedback principle, set such voltage on the output (203), which, within the control accuracy, leads to the equivalence of the reference potential (4) and the potential corresponding to the result of processing of at least one signal from at least one input (201).

    Abstract translation: 具有有源共模抑制的电流源使用具有用于产生所需电流的分支到负载(3)的一端连接到其输出端(107)的原理; 和有源补偿电路(ACC)(200)的一个分支到负载(3)的另一端所连接的输出端(203)。 借助于ACC(200)的至少一个输入(201),在负载上感测至少一个信号,并且随后对其进行处理,使得处理来自至少一个输入(201)的至少一个信号的结果 )优选地表示与负载(3)的电压端子(1)和(2)处的电压对或接近共模电压的电压对应的共模电压。 该结果随后由ACC(200)的调节电路处理,其将其与参考电位值(4)进行比较,并且使用负反馈原理,在输出端(203)上设置这样的电压,其在控制器 准确性导致参考电势(4)的等价性和与来自至少一个输入(201)的至少一个信号的处理结果相对应的电势。

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