Abstract:
A wireless communication technique enables fast Fourier transfonns (FFTs) and inverse fast Fourier transfonns (IFFTs) to be perfonned with reduced latency and reduced memory requirements. In particular, an FFT/IFFT unit (36) receives input data representative of a communication symbol. The FFT/IFFT unit (36) applies an FFT operation to the input data to generate intermediate data. The FFT/IFFT unit (36) stores the intermediate data in a random access memory (RAM) (70). The intermediate data stored in the RAM (70) may override data used as input to the FFT operation. The FFT/IFFT unit (36) selectively addresses the RAM (70)to retrieve the intermediate data in a desired output order. For example, the FFT/IFFT unit (36) may output the intermeediate data in the same sequential order as the FFT/IFFT unit (36) received the input data.
Abstract:
Digital communication signals that encode information in the phase may be susceptible to phase error from many sources. The invention corrects for carrier and sampling phase errors generated by a set of loop filters and VCOs (50 and 54), respectively, using a phase correction circuit (42). A digital phase locked loop (30) simultaneously tracks the carrier phase error and the sampling phase error and corrects the signal in the frequency domain. The invention may use the sampling phase error to advance or delay the sampling window (34) used to convert the signal from the time to frequency domain.
Abstract:
A wireless communication technique enables equalization, soft mapping (86) and phase error estimation (74) functions to be performed jointly based on multiple observations of a transmitted symbol in wireless communication systems employing receive diversity. Multiple observations of a symbol are obtained from multiple antenna paths in a wireless receiver. Equalization, soft demapping (86), and phase error estimation (74) functions can be integrated within shared hardware, rather than distributed among separate hardware blocks, promoting reduced size, complexity and cost in a wireless receiver.
Abstract:
A decoder rescales state metric values to avoid overflow by resetting a bit in state metric registers (66) that store the state metric values for each state. For example, the decoder (40) may monitor a most significant bit (MSB) of the state metric registers (66) to determine when the state metric values for all of the states exceed a threshold value. Upon exceeding the threshold value, the decoder may rescale the state metric values to avoid overflow. For instance, when the state metric values exceed the threshold value, the MSBs of the state metric registers may be reset. Resetting the MSBs is equivalent to subtracting half of the maximum value of the state metric register. The rescaling technique can prevent state metric value overflow while offering reduced complexity and reduced latency.
Abstract:
A technique for enhanced frequency domain equalization in an OFDM communication receiver enables derivation of a more accurate estimate of channel gain fluctuation by adding an additional frequency tone observation to the estimate. For example, the technique may involve estimation of an unknown, complex, channel-induced gain A based on observation of complex amplitude values for first and second preamble symbols (62, 64) transmitted in an OFDM frame, plus the complex amplitude value for a signal field (66) in the OFDM frame. The enhanced frequency domain equalization technique may be especially useful in a network conforming to the IEEE 802.11a standard.
Abstract:
A MAC architecture (Fig 2, 24) for WLAN (Fig1, 14) stations (Fig 1, 16) partitions functionality between a software-based MAC component (Fig3, 24A) and a hardware-based MAC component (Fig3, 24B) that work together to balance function and performance (Fig 8). In general, the fulcrum for this balance centers on timing requirements (Fig 12). Accordingly, the hardware-based MAC component is designed to handle many of the functions that are processor-intensive and/or must be performed under strict timing constraints (Fig 6). The software-based MAC component is designed to handle many of the functions that are memory-intensive, but present more lenient timing requirements (Fig 7). The software-based MAC component may be configured to provide an efficient and robust interface to the hardware-based MAC component (Fig 5, 25). In particular, the software-based MAC component may format and prioritize packets to be sent over the air interface (Fig 9) , and generate a command structure that provides instructions for the hardware-based MAC component to process the packet (Fig 10).
Abstract:
Architectures for decoding low density parity check codes permit varying degrees of hardware sharing to balance throughput, power consumption and area requirements. The LDPC decoding architectures may be useful in a variety of communication systems in which throughput, power consumption, and area are significant concerns. The decoding architectures implement an approximation of the standard message passing algorithm used for LDPC decoding, thereby reducing computational complexity. Instead of a fully parallel structure, this approximation permits at least a portion of the message passing structure between check and bit nodes to be implemented in a block-serial mode, providing reduced area without substantial added latency.
Abstract:
A digital front-end for a wireless communication system incorporates gain control (60), signal detection (66), frame synchronization (64) and carrier frequency offset (CFO) estimation (66) and correction (68A and 68B) features configured for use with multiple receive antennas. The digital front-end may be applied to a wireless communication system in which transmitted signals carry a repeated signal pattern, such as orthogonal frequency division multiplexing (OFDM) systems. An example of a repeated signal pattern is the preamble of a signal transmitted according to the IEEE 802.11a wireless local area network (WLAN) standard. The signal detection, frame synchronization, and CFO estimation techniques make use of signals received from multiple antenna paths to provide enhanced performance. The gain control feature may be configured to adjust the gain in steps. The frame synchronization technique may operate as a function of gain control, handling the input signal differently before and after gain adjustment.
Abstract:
The invention provides a multi-layer antenna structure for use in a wireless communication system. The antenna may be integrated within a multi-layer circuit structure such as a multi-layer printed circuit board. The multi-layer antenna structure may include, for example, a radiating component and a conductive strip feed-line that electromagnetically couples to the radiating component to directly feed the radiating component. The conductive strip feed-line may be fabricated to form a balun. The conductive strip feed-line may, for example, form a quarter-wavelength open circuit in order to realize the balun. The balun may perform signal transformations, e.g., unbalanced to balanced, as well as impedance transformations. The radiating component and the conductive strip feed-line forming the balun may be formed on different layers of a multi-layer circuit structure.
Abstract:
In general, the invention is directed to integration of passive radio frequency (RF) structures with at least one integrated circuit in a single integrated circuit (IC) package. An IC package in accordance with the invention may include, for example, a radio IC, a digital IC, a passive radio frequency balun as well as additional passive RF structures or ICs. Additionally, passive electronic components may further be incorporated in the IC package. For example, the IC package may include a resistor, capacitor, inductor or the like. The components of the IC package may be distributed throughout layers of a multilayer IC package, such as a multi-layer ceramic package. The different ICs and the passive RF structures may be electrically coupled via conductive traces, which may be varied in thickness and length in order to match input and output impedances of the different ICs and passive RF structures.