Abstract:
The present invention concerns a system for transmitting a plurality of modes of digital television signals within the same transmission channel where one transmission mode is more robust than another mode. The present invention also concerns a system for receiving and decoding such signals. More specifically, an aspect of the present invention involves a method and an apparatus for utilizing a proper length of preamble data (210, 215) for the improvement of reception. Furthermore, another aspect of the present invention involves a method and an apparatus for inserting a preamble into a proper place in a transmitted data stream (200) relative to the filed synchronization data. Another aspect of the present invention involves a method and an apparatus for decoding trellis-coded data, using the predetermined preamble data (210, 215).
Abstract:
A wide screen television apparatus comprises a video display (244) having a first format display ratio of width to height, for example approximately 16x9. A first video signal defines a first picture. A second video signal defines a second picture in a second format display ratio of width to height smaller than the first format display ratio, for example approximately 4x3. A video signal processor (301) asymmetrically compresses the second picture, for example 4:1 horizontally and 3:1 vertically. A video memory (420) stores lines of video of the asymmetrically compressed picture. Another video signal processor (300) combines portions of lines of video in the first video signal with the stored lines of video of the asymmetrically compressed picture for simultaneous display of the first and second pictures. The asymmetrically compressed second picture is displayed without aspect ratio distortion. The second picture can form an inset within the first picture. A single picture display can itself comprise a full screen of pictures from one source or from multiple sources.
Abstract:
A method and architecture for processing signal communications between an encoder and decoder operating according to the ATSC standard adapted for mobile handheld transmission is disclosed. The method and apparatus comprises embedding code rate identifiers in the packet ID and training sequences, using a chirp sequence as a training sequence and transmitting data in a single burst wherein the data is encoded according to multiple code rates.
Abstract:
A video display has a first format display ratio. A mapping circuit maps an adjustable picture display area on the video display. A signal processor generates first and second video signals from input video signals having one of different format display ratios. A switching circuit selectively couples video signal sources as the input video signals. The signal processor can manipulate data from the input video signals by selective interpolation and cropping. A synchronizing circuit synchronizes the first and second signal processors with the mapping circuit. A selecting circuit selects as an output video signal between one of the first and second processed video signals and a combination of the first and second processed video signals. A control circuit controls the mapping circuit, the first and second signal processors and the selecting circuit to adjust in format display ratio and image aspect ratio each picture represented in the output video signal. One of the different format display ratios of the input video signals can be the same as the first format display ratio of the video display. The mapping circuit can comprise a raster generating circuit for a cathode ray tube or an address matrix generator for a liquid crystal display.
Abstract:
A field synchronization system for asynchronous video signals, comprises a video display synchronized with a first video signal having a first line rate component and a first field rate component. A second video signal having a second line rate component is first stored in a field memory, having synchronous write and read ports. The second video signal is thereafter speeded up in a multiple line memory (354) having asynchronous write and read ports and independently resettable write and read pointers. The second video signal may be subsampled, written and read into and out of the field memory respectively and written into the multiple line memory, all synchronously with the second line rate component. The second video signal is read out of the multiple line memory (354) synchronously with the first line rate component. The write pointer is reset by a circuit (320) which samples the first field rate component with the second line rate component. The read pointer is reset by a circuit which samples the first field rate component with the first line rate component.
Abstract:
Information is transmitted indicating when a burst mode will take place which intervenes during a regular transmission mode. The information transmitted can also include information indicating how long such a burst mode will be and the contents of the burst mode where such contents can be identified as video, audio, system information, advertisements, or interactive content.
Abstract:
A video decoder (10) transcodes video data from various input formats to a predetermined output format. Input data may be standard definition (NTSC or PAL) data or MPEG2 compressed data. Standard definition data are rearranged into block format to be compatible with the decoder's (10) single display processor (40). The display processor selectively processes and conveys either MPEG2 format data or non-MPEG2 format data to a display device. A block based frame memory (20) stores MPEG2 and non-MPEG2 pixel block data, as well as standard definition data in raster line format during processing.
Abstract:
First and second field type detectors (702, 710) for first and second video signals have outputs indicating whether the video signals have first or second field types. The first video signal is synchronized with the second video signal for a combined display by a synchronous field memory (350) and an asynchronous multiple line memory (354). The field type of the second video signal is changed when necessary to match the field type of the first video signal to maintain interlace integrity in the combined display. A field type changing circuit (712, 714, 718) which controls the synchronizing, has a first mode of operation which delays writing a current field of the first field type by one horizontal line period, a second mode of operation which advances writing a current field of the second field type by one horizontal line period and a third mode of operation which maintains a current field type. A plurality of selectable interlace correction signals are generated, each being appropriate for one of the plurality of comparison outcomes.
Abstract:
The present invention concerns a system for transmitting a plurality of modes of digital television signals within the same transmission channel where one transmission mode is more robust than another mode. The present invention also concerns a system for receiving and decoding such signals. More specifically, an aspect of the present invention involves a method and an apparatus for utilizing a proper length of preamble data (210, 215) for the improvement of reception. Furthermore, another aspect of the present invention involves a method and an apparatus for inserting a preamble into a proper place in a transmitted data stream (200) relative to the filed synchronization data. Another aspect of the present invention involves a method and an apparatus for decoding trellis-coded data, using the predetermined preamble data (210, 215).
Abstract:
New capabilities will allow conventional broadcast transmission to be available to mobile devices. The present embodiments describe an apparatus and method for encoding and decoding signals. A method (1100) includes the steps of generating (1110) data blocks, encoding (1140) a first set of data blocks using a first encoding rate, encoding (1140) a second set of data blocks using a second encoding rate, and generating (1180) a control packet, the control packet identifying the first set of data blocks and the first encoding rate, and identifying the second set of data blocks and the second encoding rate. An apparatus (1200) includes a first decoder (1216) receiving data and decoding a first subset of the data, including a control packet, at a first decoding rate and a controller (1260) controlling the operation of the first decoder (1216) based on the decoded control packet.