公开(公告)号：WO2010045029A1

公开(公告)日：2010-04-22

申请号：PCT/US2009/059129

申请日：2009-09-30

Applicant: MICRON TECHNOLOGY, INC. ,  NOYES, Harold B ,  JURENKA, Mark ,  HUGGINS, Gavin

Inventor： NOYES, Harold B ,  JURENKA, Mark ,  HUGGINS, Gavin

IPC: G06F9/30 ,  G06F9/318

CPC classification number: G11C7/1036 ,  G06F9/3012 ,  G06F9/30138 ,  G06F9/34 ,  G06F12/0615 ,  G06F2212/656

Abstract: Systems and methods are provided for managing access to registers. In one embodiment, a system may include a processor and a plurality of registers. The processor and the plurality of registers may be integrated into a single device, or may be in separate devices. The plurality of registers may include a first set of registers that are directly accessible by the processor, and a second set of registers that are not directly accessible by the processor. The second set of registers may, however, be accessed indirectly by the processor via the first set of registers. In one embodiment, the first set of registers may include a register for selecting a register bank from the second set of registers, and a register for selecting a particular address within the register bank, to allow indirect access by the processor to the registers of the second set.

Abstract translation: 提供了系统和方法来管理对寄存器的访问。 在一个实施例中，系统可以包括处理器和多个寄存器。 处理器和多个寄存器可以集成到单个设备中，或者可以在单独的设备中。 多个寄存器可以包括可由处理器直接访问的第一组寄存器和不能由处理器直接访问的第二组寄存器。 然而，第二组寄存器可以由处理器经由第一组寄存器间接访问。 在一个实施例中，第一组寄存器可以包括用于从第二组寄存器中选择寄存器组的寄存器和用于选择寄存器组中的特定地址的寄存器，以允许处理器间接访问寄存器组的寄存器 第二集

公开(公告)号：WO2010045028A1

公开(公告)日：2010-04-22

申请号：PCT/US2009/059128

申请日：2009-09-30

Applicant: MICRON TECHNOLOGY, INC. ,  NOYES, Harold B. ,  JURENKA, Mark ,  HUGGINS, Gavin

Inventor： NOYES, Harold B. ,  JURENKA, Mark ,  HUGGINS, Gavin

IPC: G06F9/30 ,  G06F9/318

CPC classification number: G06F9/35 ,  G06F9/30098 ,  G06F9/3012 ,  G06F9/30138 ,  G06F9/34

Abstract: Systems and methods are provided for managing access to registers. A system may include a set of direct registers and a set of indirect registers. The indirect registers may be accessed through the direct registers, and the direct registers may provide various features to provide faster access to the indirect registers. One of the direct registers may indicate access modes for accessing the indirect registers. The access modes may include auto-increment, auto-decrement, auto-reset, and no change modes. Based on the access mode, the currently accessed address may be automatically modified after accessing the indirect register at the address.

Abstract translation: 提供了系统和方法来管理对寄存器的访问。 系统可以包括一组直接寄存器和一组间接寄存器。 间接寄存器可以通过直接寄存器访问，直接寄存器可以提供各种功能，以便更快地访问间接寄存器。 直接寄存器之一可能指示访问间接寄存器的访问模式。 访问模式可以包括自动递增，自动递减，自动复位，无改变模式。 基于访问模式，可以在访问地址上的间接寄存器后自动修改当前访问的地址。