公开(公告)号：WO2013003676A3

公开(公告)日：2013-04-25

申请号：PCT/US2012044820

申请日：2012-06-29

Applicant: NOVELLUS SYSTEMS INC ,  JENG ESTHER ,  CHANDRASHEKAR ANAND ,  HUMAYUN RAASHINA ,  DANEK MICHAL ,  POWELL RONALD

Inventor： JENG ESTHER ,  CHANDRASHEKAR ANAND ,  HUMAYUN RAASHINA ,  DANEK MICHAL ,  POWELL RONALD

IPC: H01L21/205 ,  H01L21/31

CPC classification number: H01L21/76877 ,  C23C16/045 ,  H01L21/28556 ,  H01L21/32136 ,  H01L21/76865 ,  H01L21/76879

Abstract: A method for filling a recessed feature of a substrate includes a) at least partially filling a recessed feature of a substrate with tungsten-containing film using at least one of chemical vapor deposition (CVD) and atomic layer deposition (ALD); b) at a predetermined temperature, using an etchant including activated fluorine species to selectively etch the tungsten-containing film more than an underlying material of the recessed feature without removing all of the tungsten-containing film at a bottom of the recessed feature; and c) filling the recessed feature using at least one of CVD and ALD.

Abstract translation: 一种用于填充衬底的凹陷结构的方法包括：a）使用化学气相沉积（CVD）和原子层沉积（ALD）中的至少一种至少部分地用含钨膜填充衬底的凹陷结构; b）在预定温度下，使用包括活化氟物质的蚀刻剂来选择性地蚀刻含钨膜，而不是在凹陷结构的底部处去除所有含钨膜; 以及c）使用CVD和ALD中的至少一种填充凹陷特征。

公开(公告)号：WO2013003676A2

公开(公告)日：2013-01-03

申请号：PCT/US2012/044820

申请日：2012-06-29

Applicant: NOVELLUS SYSTEMS, INC. ,  JENG, Esther ,  CHANDRASHEKAR, Anand ,  HUMAYUN, Raashina ,  DANEK, Michal ,  POWELL, Ronald

Inventor： JENG, Esther ,  CHANDRASHEKAR, Anand ,  HUMAYUN, Raashina ,  DANEK, Michal ,  POWELL, Ronald

CPC classification number: H01L21/76877 ,  C23C16/045 ,  H01L21/28556 ,  H01L21/32136 ,  H01L21/76865 ,  H01L21/76879

Abstract: A method for filling a recessed feature of a substrate includes a) at least partially filling a recessed feature of a substrate with tungsten-containing film using at least one of chemical vapor deposition (CVD) and atomic layer deposition (ALD); b) at a predetermined temperature, using an etchant including activated fluorine species to selectively etch the tungsten-containing film more than an underlying material of the recessed feature without removing all of the tungsten-containing film at a bottom of the recessed feature; and c) filling the recessed feature using at least one of CVD and ALD.

Abstract translation: 用于填充衬底的凹陷特征的方法包括：a）使用化学气相沉积（CVD）和原子层沉积（ALD）中的至少一种至少部分地用含钨膜填充衬底的凹陷特征; b）在预定温度下，使用包括活性氟物质的蚀刻剂来选择性地蚀刻含钨膜比凹陷特征的下层材料，而不去除凹陷特征底部的所有含钨膜; 以及c）使用CVD和ALD中的至少一种填充所述凹陷特征。

公开(公告)号：WO2013148880A1

公开(公告)日：2013-10-03

申请号：PCT/US2013/034167

申请日：2013-03-27

Applicant: NOVELLUS SYSTEMS, INC. ,  CHANDRASHEKAR, Anand ,  JENG, Esther ,  HUMAYUN, Raashina ,  DANEK, Michal ,  GAO, Juwen ,  WANG, Deqi

Inventor： CHANDRASHEKAR, Anand ,  JENG, Esther ,  HUMAYUN, Raashina ,  DANEK, Michal ,  GAO, Juwen ,  WANG, Deqi

IPC: H01L21/31 ,  H01L21/205

CPC classification number: H01L21/76879 ,  C23C16/045 ,  H01L21/28556 ,  H01L21/28562 ,  H01L21/321 ,  H01L21/32133 ,  H01L21/32136 ,  H01L21/7685 ,  H01L21/76865 ,  H01L21/76874 ,  H01L21/76876 ,  H01L21/76877 ,  H01L21/76883 ,  H01L21/76898 ,  H01L27/1052 ,  H01L27/10891

Abstract: Described herein are methods of filling features with tungsten and related systems and apparatus. The methods include inside-out fill techniques as well as conformal deposition in features. Inside-out fill techniques can include selective deposition on etched tungsten layers in features. Conformal and non-conformal etch techniques can be used according to various implementations. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) word lines. Examples of applications include logic and memory contact fill, DRAM buried word line fill, vertically integrated memory gate/word line fill, and 3-D integration with through-silicon vias (TSVs).

Abstract translation: 这里描述的是用钨和相关系统和装置填充特征的方法。 这些方法包括内向外填充技术以及特征中的共形沉积。 内向外填充技术可以包括在蚀刻钨层上的特征中的选择性沉积。 可以根据各种实施方式使用保形和非保形蚀刻技术。 本文描述的方法可用于填充垂直特征，例如钨通孔，以及水平特征，例如垂直NAND（VNAND）字线。 应用实例包括逻辑和存储器接触填充，DRAM掩埋字线填充，垂直集成存储器栅极/字线填充，以及与硅通孔（TSV）的3-D集成。

公开(公告)号：WO2013148444A1

公开(公告)日：2013-10-03

申请号：PCT/US2013/033174

申请日：2013-03-20

Applicant: NOVELLUS SYSTEMS, INC. ,  CHANDRASHEKAR, Anand ,  JENG, Esther ,  HUMAYUN, Raashina ,  DANEK, Michal ,  GAO, Juwen ,  WANG, Deqi

Inventor： CHANDRASHEKAR, Anand ,  JENG, Esther ,  HUMAYUN, Raashina ,  DANEK, Michal ,  GAO, Juwen ,  WANG, Deqi

IPC: H01L21/31 ,  H01L21/205

CPC classification number: H01L21/76877 ,  C23C16/045 ,  H01L21/28556 ,  H01L21/28562 ,  H01L21/321 ,  H01L21/76862 ,  H01L21/76874 ,  H01L21/76879 ,  H01L21/76898 ,  H01L27/1052 ,  H01L27/10891

Abstract: Described herein are methods of filling features with tungsten, and related systems and apparatus, involving inhibition of tungsten nucleation. In some embodiments, the methods involve selective inhibition along a feature profile. Methods of selectively inhibiting tungsten nucleation can include exposing the feature to a direct or remote plasma. In certain embodiments, the substrate can be biased during selective inhibition. Process parameters including bias power, exposure time, plasma power, process pressure and plasma chemistry can be used to tune the inhibition profile. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) wordlines. The methods may be used for both conformal fill and bottom-up/inside-out fill. Examples of applications include logic and memory contact fill, DRAM buried wordline fill, vertically integrated memory gate/wordline fill, and 3-D integration using through-silicon vias.

Abstract translation: 这里描述的是用钨填充特征的方法，以及涉及抑制钨成核的相关系统和装置。 在一些实施方案中，所述方法涉及沿特征轮廓的选择性抑制。 选择性地抑制钨成核的方法可以包括将特征暴露于直接或远程等离子体。 在某些实施方案中，可以在选择性抑制期间衬底被偏置。 可以使用包括偏置功率，曝光时间，等离子体功率，工艺压力和等离子体化学在内的工艺参数来调节抑制曲线。 本文描述的方法可用于填充诸如钨通孔的垂直特征，以及诸如垂直NAND（VNAND）字线的水平特征。 这些方法可以用于适形填充和自下而上/内向外填充。 应用实例包括逻辑和存储器触点填充，DRAM掩埋字线填充，垂直集成存储器栅极/字线填充以及使用硅通孔的3-D集成。