Abstract:
Disclosed herein is a method of ensuring security against the illegally altered data of Internet Explorer (IE) memory. The method includes a first step of entering data including text in a text field, a second step of encrypting the entered data character by character and entering a corresponding cryptogram in a hidden field, a third step of submitting the data and cryptogram to a server, and a fourth step of decrypting the cryptogram and checking whether the data has been altered. The first step includes a step of selecting one or more pieces of stored data from stored data so as to enter the selected data in the text field and a step of separating the selected stored data into individual characters and detecting the text of the selected stored data. At the second step, the character-by-character encryption of the selected stored data is performed using an event handler.
Abstract:
The present invention relates to a solar cell and a method for manufacturing the same. The solar cell comprises i) a first conductive layer, ii) a plurality of nanostructures which are located on the first conductive layer, are arranged in the direction crossing the plate surface of the first conductive layer, and are spaced apart from each other, iii) a resin layer which is located on the first conductive layer and fills in the space between the plurality of nanostructures, iv) one or more semiconductor layers which are located on the resin layer and cover the plurality of nanostructures, and v) a second conductive layer which covers the semiconductor layers and has a lower light transmittance than that of the first conductive layer.
Abstract:
The present invention relates to a solar battery with a reusable substrate, and to a manufacturing method thereof. The solar battery comprises i) a plurality of nanostructures spaced apart from each other and arranged in one direction, ii) a first conductor layer which covers one end of one or more nanostructures from among the plurality of nanostructures, iii) a second conductor layer which is spaced apart from the first conductor layer, and which covers the other end of the nanostructure, and iv) a dielectric layer interposed between the first conductor layer and the second conductor layer.
Abstract:
The present invention relates to a method for input information security wherein risk of unauthorized exposure is reduced by securing input key information. The method comprises a personal information input preparation step wherein personal information is written onto input blocks (13a, 13b, 13c) on web page (13) of installed security controller (120), and is transmitted from server (200) and output to client terminal (100); a virtual keyboard formation step wherein, upon outputting said input blocks (13a, 13b, 13c), security controller (120) displays two or more number rows randomly and forms a number dial (13e) such that the numbers displayed on input blocks (13a, 13b, 13c) are changed according to the manipulation information of direction key (15) equipped with number control key (15a) and location control key (15b), but number dial (13e) has its number of the number row selected based on manipulation of number control key (15a) changed, and a number row is selected based on manipulation of location control key (15b); a direction key manipulation step wherein said direction key (15) is manipulated to change and select number row and number; a key manipulation information verification step wherein said security controller (120) verifies direction key (15) manipulation information; and a personal information verification step wherein, at said client terminal (100) or server (200), manipulation information is applied based on the number that has been initially and randomly displayed on input blocks (13a, 13b, 13c) to verify the personal information that has been input into client terminal (100), and server (200) proceeds according to the verified personal information.
Abstract:
Various embodiments for improved power devices as well as their methods of manufacture, packaging and circuitry incorporating the same for use in a wide variety of power electronics are disclosed. One aspect of the invention combines a number of charge balancing techniques (311) and other techniques for reducing parasitic capacitance to arrive at different embodiments for power devices (300B) with improved voltage performance, higher switching speed, and lower on-resistance. Another aspect of the invention provides improved termination structures for low, medium and high voltage devices. Improved methods of fabrication for power devices (300B) are provided according to other aspects of the invention. Improvements to specific processing steps, such as formation of trenches (300, 302), formation of dielectric layers inside trenches (301, 302), formation of mesa structures and processes for reducing substrate thickness, among others, are presented. According to another aspect of the invention, charge balanced power devices (300B) incorporate temperature and current sensing elements such as diodes on the same die. Other aspects of the invention improve equivalent series resistance (ESR) for power devices, incorporate additional circuitry on the same chip as the power device (300B) and provide improvements to the packaging of charge balanced power devices.