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    ELECTRONIC SYNAPSES FOR REINFORCEMENT LEARNING
    2.
    发明申请
    ELECTRONIC SYNAPSES FOR REINFORCEMENT LEARNING 审中-公开
    用于加强学习的电子技术

    公开(公告)号：WO2012089360A1

    公开(公告)日：2012-07-05

    申请号：PCT/EP2011/068183

    申请日：2011-10-18

    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  IBM UNITED KINGDOM LIMITED ,  MODHA, Dharmendra, Shantilal ,  CHANG, Leland ,  MONTOYE, Robert, Kevin

    Inventor： MODHA, Dharmendra, Shantilal ,  CHANG, Leland ,  MONTOYE, Robert, Kevin

    IPC: G06N3/063

    CPC classification number: G06N3/08 ,  G06N3/063 ,  G06N3/0635 ,  G11C11/54

    Abstract: Embodiments of the invention provide electronic synapse devices for reinforcement learning. An electronic synapse is configured for interconnecting a pre-synaptic electronic neuron and a post-synaptic electronic neuron. The electronic synapse comprises memory elements configured for storing a state of the electronic synapse and storing meta information for updating the state of the electronic synapse. The electronic synapse further comprises an update module configured for updating the state of the electronic synapse based on the meta information in response to an update signal for reinforcement learning. The update module is configured for updating the state of the electronic synapse based on the meta information, in response to a delayed update signal for reinforcement learning based on a learning rule.

    Abstract translation: 本发明的实施例提供用于加强学习的电子突触装置。 配置电子突触以互连预突触电子神经元和突触后电子神经元。 电子突触包括配置用于存储电子突触的状态并存储用于更新电子突触的状态的元信息的存储器元件。 电子突变还包括更新模块，该更新模块被配置为响应于用于加强学习的更新信号，基于元信息来更新电子突触的状态。 更新模块被配置为响应于用于基于学习规则的加强学习的延迟更新信号，基于元信息来更新电子突触的状态。

    TERNARY CONTENT ADDRESSABLE MEMORY USING PHASE CHANGE DEVICES
    3.
    发明申请
    TERNARY CONTENT ADDRESSABLE MEMORY USING PHASE CHANGE DEVICES 审中-公开
    使用相位变更设备的内容可寻址存储器

    公开(公告)号：WO2010100000A1

    公开(公告)日：2010-09-10

    申请号：PCT/EP2010/050862

    申请日：2010-01-26

    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  IBM UNITED KINGDOM LIMITED ,  LAM, Chung, Hon ,  MONTOYE, Robert, Kevin ,  RAJENDRAN, Bipin ,  JI, Brian

    Inventor： LAM, Chung, Hon ,  MONTOYE, Robert, Kevin ,  RAJENDRAN, Bipin ,  JI, Brian

    IPC: G11C15/04

    CPC classification number: G11C15/046 ,  G11C13/0004

    Abstract: A content addressable memory device with a plurality of memory cells storing ternary data values of high, low, and don't care. An aspect of the content addressable memory device is the use of first memory elements and second memory elements in the memory cells. The first and second memory elements are electrically coupled in parallel circuit to a match-line. The first memory elements are coupled to first word-lines and the second memory elements are coupled to second word-lines. The first memory elements are configured to store low resistance states if the ternary data value is low and high resistance states if the ternary data value is either high or don't care. The second memory elements are configured to store the low resistance states if the ternary data value is high and the high resistance states if the ternary data value is either low or don't care.

    Abstract translation: 一种具有多个存储单元的内容可寻址存储器件，其存储高，低和不关心的三进制数据值。 内容可寻址存储器件的一个方面是在存储器单元中使用第一存储器元件和第二存储器元件。 第一和第二存储器元件以并联电路电耦合到匹配线。 第一存储器元件耦合到第一字线，并且第二存储器元件耦合到第二字线。 如果三进制数据值低，则第一存储器元件被配置为存储低电阻状态，并且如果三进制数据值高或不在乎，则高电阻状态。 如果三进制数据值高，则第二存储器元件被配置为存储低电阻状态，并且如果三进制数据值为低或不关心，则存在高电阻状态。

    SWITCHED CAPACITOR VOLTAGE CONVERTERS
    4.
    发明申请
    SWITCHED CAPACITOR VOLTAGE CONVERTERS 审中-公开
    开关电容电压转换器

    公开(公告)号：WO2010097274A1

    公开(公告)日：2010-09-02

    申请号：PCT/EP2010/051288

    申请日：2010-02-03

    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  IBM UNITED KINGDOM LIMITED ,  DENNARD, Robert, Heath ,  JI, Brian ,  MONTOYE, Robert, Kevin

    Inventor： DENNARD, Robert, Heath ,  JI, Brian ,  MONTOYE, Robert, Kevin

    IPC: G11C5/14 ,  H02M3/07

    CPC classification number: G11C5/145 ,  H02M3/07

    Abstract: An on-chip voltage conversion apparatus for integrated circuits includes a first capacitor; a first NFET device configured to selectively couple a first electrode of the first capacitor to a low side voltage rail of a first voltage domain; a first PFET device configured to selectively couple the first electrode of the first capacitor to a high side voltage rail of the first voltage domain; a second NFET device configured to selectively couple a second electrode of the first capacitor to a low side voltage rail of a second voltage domain, wherein the low side voltage rail of the second voltage domain corresponds to the high side voltage rail of the first voltage domain; and a second PFET device configured to selectively couple the second electrode of the first capacitor to a high side voltage rail of the second voltage domain.

    Abstract translation: 集成电路的片上电压转换装置包括第一电容器; 第一NFET器件被配置为选择性地将第一电容器的第一电极耦合到第一电压域的低侧电压轨; 第一PFET器件，被配置为选择性地将第一电容器的第一电极耦合到第一电压域的高侧电压轨; 第二NFET器件，被配置为选择性地将第一电容器的第二电极耦合到第二电压域的低侧电压轨，其中第二电压域的低侧电压轨对应于第一电压域的高侧电压轨 ; 以及第二PFET器件，被配置为选择性地将第一电容器的第二电极耦合到第二电压域的高侧电压轨。

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