公开(公告)号：WO2013171790A1

公开(公告)日：2013-11-21

申请号：PCT/JP2012/003188

申请日：2012-05-16

Applicant: HITACHI, LTD. ,  IKEDA, Yasuhiro ,  UEMATSU, Yutaka ,  MURAOKA, Satoshi

Inventor： IKEDA, Yasuhiro ,  UEMATSU, Yutaka ,  MURAOKA, Satoshi

IPC: G11C7/10

CPC classification number: G11C7/10 ,  G11C7/1057 ,  G11C7/1084

Abstract: To suppress power consumption and enhance signal quality as compared with the case where first and second semiconductor elements are terminated only by on-chip input termination resistor circuits. A first semiconductor element with a switching function and a second semiconductor element with a switching function are connected to each other with a substrate interconnection, and a resistor element is connected in parallel with the substrate interconnection. The resistor element is placed at an arbitrary position or a branch point on the signal interconnection.

Abstract translation: 与第一和第二半导体元件仅由片上输入终端电阻电路端接的情况相比，抑制功耗和提高信号质量。 具有开关功能的第一半导体元件和具有开关功能的第二半导体元件通过衬底互连彼此连接，并且电阻元件与衬底互连并联连接。 电阻元件放置在信号互连的任意位置或分支点处。