公开(公告)号：WO2011159390A1

公开(公告)日：2011-12-22

申请号：PCT/US2011/031964

申请日：2011-04-11

Applicant: CASCADE MICROTECH, INC. ,  SIMMONS, Michael, E. ,  NEGISHI, Kazuki ,  JENSEN, Roy ,  GARRISON, Ryan ,  WOLF, Philip

Inventor： SIMMONS, Michael, E. ,  NEGISHI, Kazuki ,  JENSEN, Roy ,  GARRISON, Ryan ,  WOLF, Philip

IPC: G01R31/26

CPC classification number: H01L21/6838 ,  G01R31/2601 ,  G01R31/2865 ,  G01R31/2874 ,  Y10T279/11 ,  Y10T279/34

Abstract: A chuck for testing an integrated circuit includes an upper conductive layer having a lower surface and an upper surface suitable to support a device under test. An upper insulating layer has an upper surface at least in partial face-to-face contact with the lower surface of the upper conductive layer, and a lower surface. A middle conductive layer has an upper surface at least in partial face-to-face contact with the lower surface of the upper insulating layer, and a lower surface.

Abstract translation: 用于测试集成电路的卡盘包括具有适于支撑被测器件的下表面和上表面的上导电层。 上绝缘层具有与上导电层的下表面至少部分地面对面接触的上表面和下表面。 中间导电层具有至少与上绝缘层的下表面部分地面对面接触的上表面和下表面。

公开(公告)号：WO2011103461A1

公开(公告)日：2011-08-25

申请号：PCT/US2011/025476

申请日：2011-02-18

Applicant: CASCADE MICROTECH, INC. ,  NEGISHI, Kazuki ,  SIMMONS, Michael ,  STORM, Christofer ,  SWE, Toenaing

Inventor： NEGISHI, Kazuki ,  SIMMONS, Michael ,  STORM, Christofer ,  SWE, Toenaing

IPC: G01R31/20

CPC classification number: G01R31/2889 ,  H01R13/6597 ,  H01R24/562 ,  H01R2201/20

Abstract: An adapter conductively interconects a chuck of a probe station and an instrument. The adapter includes a signal conductor conductively connected to the chuck and selectively connectable to a respective one of a ground potential, a bayonet connector output and a signal connection for the instrument. A guard potential conductor conductively connected to the chuck and selectively connectable to a one of a ground potential and a guard connection for the instrument; and a shield conductor connected to a ground potential.

Abstract translation: 适配器导电地相互连接探针台和仪器的卡盘。 适配器包括导体连接到卡盘并且可选地可连接到地面电位，卡口连接器输出和仪器的信号连接中的相应一个的信号导体。 导电连接到卡盘并且可选择地连接到仪器的接地电位和保护连接中的一个的保护电位导体; 以及连接到地电位的屏蔽导体。

公开(公告)号：WO2012054423A1

公开(公告)日：2012-04-26

申请号：PCT/US2011/056626

申请日：2011-10-18

Applicant: CASCADE MICROTECH, INC. ,  NEGISHI, Kazuki ,  HARRIS, Steve ,  STRID, Eric, W. ,  BOLT, Bryan

Inventor： NEGISHI, Kazuki ,  HARRIS, Steve ,  STRID, Eric, W. ,  BOLT, Bryan

IPC: G01R31/26

CPC classification number: G01J1/32 ,  G01J1/0242 ,  G01J1/0425 ,  G01J2001/0481 ,  G01J2001/4247 ,  G01R31/2635

Abstract: Systems and methods for simultaneous optical testing of a plurality of devices under test. These systems and methods may include the use of an optical probe assembly that includes a power supply structure that is configured to provide an electric current to a plurality of devices under test (DUTs) and an optical collection structure that is configured to simultaneously collect electromagnetic radiation that may be produced by the plurality of DUTs and to provide the collected electromagnetic radiation to one or more optical detection devices. The systems and methods also may include the use of the optical probe assembly in an optical probe system to evaluate one or more performance parameters of each of the plurality of DUTs.

Abstract translation: 用于同时光学测试多个待测设备的系统和方法。 这些系统和方法可以包括使用光学探针组件，该光学探针组件包括电源结构，该电源结构被配置为向被测试的多个被测设备（DUT）提供电流，以及被配置为同时收集电磁辐射的光学收集结构 其可以由多个DUT产生并且将收集的电磁辐射提供给一个或多个光学检测装置。 所述系统和方法还可以包括在光学探针系统中使用光学探针组件来评估多个DUT中的每一个的一个或多个性能参数。

公开(公告)号：WO2011156049A1

公开(公告)日：2011-12-15

申请号：PCT/US2011/031981

申请日：2011-04-11

Applicant: CASCADE MICROTECH, INC. ,  SIMMONS, Michael, E. ,  NEGISHI, Kazuki ,  JENSEN, Roy ,  GARRISON, Ryan ,  WOLF, Philip

Inventor： SIMMONS, Michael, E. ,  NEGISHI, Kazuki ,  JENSEN, Roy ,  GARRISON, Ryan ,  WOLF, Philip

IPC: G01R31/26

CPC classification number: H01L21/6838 ,  G01R31/2601 ,  G01R31/2865 ,  G01R31/2874 ,  Y10T279/11 ,  Y10T279/34

Abstract: A chuck for testing an integrated circuit includes an upper conductive layer having a lower surface and an upper surface suitable to support a device under test. An upper insulating layer has an upper surface at least in partial face-to-face contact with the lower surface of the upper conductive layer, and a lower surface. A middle conductive layer has an upper surface at least in partial face-to-face contact with the lower surface of the upper insulating layer, and a lower surface.

Abstract translation: 用于测试集成电路的卡盘包括具有适于支撑被测器件的下表面和上表面的上导电层。 上绝缘层具有至少部分面对面地与上导电层的下表面接触的上表面以及下表面。 中间导电层具有至少部分面对面地与上绝缘层的下表面接触的上表面和下表面。