METHOD AND APPARATUS FOR TESTING FOR LATCH-UP IN INTEGRATED CIRCUITS
    1.
    发明申请
    METHOD AND APPARATUS FOR TESTING FOR LATCH-UP IN INTEGRATED CIRCUITS 审中-公开
    用于集成电路中的锁定的测试方法和装置

    公开(公告)号:WO0235249A3

    公开(公告)日:2002-07-18

    申请号:PCT/US0132626

    申请日:2001-10-24

    Inventor: ORBAN RICHARD

    CPC classification number: G01R31/311

    Abstract: A circuit is tested for latch-up by scanning an optical beam across the surface, supplying power to the integrated circuit, monitoring the power of the power supply, and detecting latch-up in the integrated circuit by capturing an image of the integrated circuit when the power reaches a predetermined threshold. The captured image is compared with a baseline image to determine where latch-up occurs in the circuit.

    Abstract translation: 通过在表面上扫描光束来测试电路的闩锁,向集成电路供电,监控电源的功率,以及通过捕获集成电路的图像来检测集成电路的闩锁,当捕获集成电路的图像时 功率达到预定阈值。 拍摄的图像与基线图像进行比较,以确定电路中闩锁发生的位置。

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