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    METHOD AND APPARATUS FOR PARALLEL PROCESSING TURBO DECODER
    1.
    发明申请
    METHOD AND APPARATUS FOR PARALLEL PROCESSING TURBO DECODER 审中-公开

    公开(公告)号：WO2011071250A3

    公开(公告)日：2011-06-16

    申请号：PCT/KR2010/008136

    申请日：2010-11-17

    Applicant: SAMSUNG ELECTRONICS CO., LTD. ,  PISEK, Eran ,  WANG, Yan

    Inventor： PISEK, Eran ,  WANG, Yan

    IPC: H04B7/08

    Abstract: A receiver capable of decoding encoded transmissions. The receiver includes a number of receive antennas configured to receive data; a plurality of memory units that store the received data; and a plurality of decoders configured to perform a Turbo decoding operation. Each of the plurality of decoders decodes at least a portion of the received data using at least a portion of a decoding matrix. The receiver also includes a data switch coupled between the plurality of decoders and the plurality of memory units. The data switch configured to vary a decode operation from an long term evolution (LTE) based operation to a Wideband Code Division Multiple Access (WCDMA) operation.

    HIGH THROUGHPUT LDPC DECODER
    2.
    发明申请
    HIGH THROUGHPUT LDPC DECODER 审中-公开
    高速LDPC解码器

    公开(公告)号：WO2012154002A3

    公开(公告)日：2013-01-24

    申请号：PCT/KR2012003704

    申请日：2012-05-11

    Applicant: SAMSUNG ELECTRONICS CO LTD ,  PISEK ERAN

    Inventor： PISEK ERAN

    IPC: H03M13/11

    CPC classification number: H03M13/114 ,  H03M13/112 ,  H03M13/1137 ,  H03M13/116 ,  H03M13/1165 ,  H03M13/6544 ,  H03M13/6561 ,  H03M13/658

    Abstract: According to one embodiment, a wireless communications device includes a low-density parity check (LDPC) decoder configured to receive a codeword associated with a parity check H-matrix. The LDPC decoder includes multiple processing elements coupled to a memory for storing the parity check H-matrix comprising R rows and C columns. Each processing element is configured to perform LDPC decoding on one of a plurality of first rows of the H-matrix during a first sub-iteration and perform LDPC decoding on one of a plurality of second rows of the H-matrix during a second sub-iteration. Each of the first rows is different from one another, and each of the second rows is different from one another and from the plurality of first rows. A first portion of the processing elements are configured to process one of the second rows in an upward direction in the H-matrix relative to the decoded one of the first rows and a second portion of the processing elements are configured to process one of the second rows in a downward direction in the H-matrix relative to the decoded one of the first rows.

    Abstract translation: 根据一个实施例，无线通信设备包括被配置为接收与奇偶校验H矩阵相关联的码字的低密度奇偶校验（LDPC）解码器。 LDPC解码器包括耦合到存储器的多个处理元件，用于存储包含R行和C列的奇偶校验H矩阵。 每个处理单元被配置为在第一次迭代期间对H矩阵的多个第一行中的一个执行LDPC解码，并且在第二子迭代期间对H矩阵的多个第二行中的一个执行LDPC解码， 迭代。 第一行中的每一行彼此不同，并且每个第二行彼此不同且与多个第一行不同。 处理元件的第一部分被配置为相对于解码的第一行之一在H矩阵中向上的方向处理第二行中的一个，并且处理元件的第二部分被配置为处理第二行中的第二行之一 在H矩阵中相对于解码的第一行之一向下的行。

    HIGH THROUGHPUT LDPC DECODER
    3.
    发明申请
    HIGH THROUGHPUT LDPC DECODER 审中-公开
    高速LDPC解码器

    公开(公告)号：WO2012154002A2

    公开(公告)日：2012-11-15

    申请号：PCT/KR2012/003704

    申请日：2012-05-11

    Applicant: SAMSUNG ELECTRONICS CO., LTD. ,  PISEK, Eran

    Inventor： PISEK, Eran

    IPC: H03M13/11

    CPC classification number: H03M13/114 ,  H03M13/112 ,  H03M13/1137 ,  H03M13/116 ,  H03M13/1165 ,  H03M13/6544 ,  H03M13/6561 ,  H03M13/658

    Abstract: According to one embodiment, a wireless communications device includes a low-density parity check (LDPC) decoder configured to receive a codeword associated with a parity check H-matrix. The LDPC decoder includes multiple processing elements coupled to a memory for storing the parity check H-matrix comprising R rows and C columns. Each processing element is configured to perform LDPC decoding on one of a plurality of first rows of the H-matrix during a first sub-iteration and perform LDPC decoding on one of a plurality of second rows of the H-matrix during a second sub-iteration. Each of the first rows is different from one another, and each of the second rows is different from one another and from the plurality of first rows. A first portion of the processing elements are configured to process one of the second rows in an upward direction in the H-matrix relative to the decoded one of the first rows and a second portion of the processing elements are configured to process one of the second rows in a downward direction in the H-matrix relative to the decoded one of the first rows.

    Abstract translation: 根据一个实施例，无线通信设备包括被配置为接收与奇偶校验H矩阵相关联的码字的低密度奇偶校验（LDPC）解码器。 LDPC解码器包括耦合到存储器的多个处理元件，用于存储包含R行和C列的奇偶校验H矩阵。 每个处理单元被配置为在第一次迭代期间对H矩阵的多个第一行中的一个执行LDPC解码，并且在第二子迭代期间对H矩阵的多个第二行中的一个执行LDPC解码， 迭代。 第一行中的每一行彼此不同，并且每个第二行彼此不同且与多个第一行不同。 处理元件的第一部分被配置为相对于解码的第一行之一在H矩阵中向上的方向处理第二行中的一个，并且处理元件的第二部分被配置为处理第二行中的第二行之一 在H矩阵中相对于解码的第一行之一向下的行。

    METHOD AND APPARATUS FOR PARALLEL PROCESSING TURBO DECODER
    6.
    发明申请
    METHOD AND APPARATUS FOR PARALLEL PROCESSING TURBO DECODER 审中-公开
    并行处理涡轮解码器的方法和装置

    公开(公告)号：WO2011071250A2

    公开(公告)日：2011-06-16

    申请号：PCT/KR2010008136

    申请日：2010-11-17

    Applicant: SAMSUNG ELECTRONICS CO LTD ,  PISEK ERAN ,  WANG YAN

    Inventor： PISEK ERAN ,  WANG YAN

    IPC: H04B7/08

    CPC classification number: H04L5/0007 ,  H03M13/2739 ,  H03M13/2978 ,  H03M13/2987 ,  H03M13/3972 ,  H03M13/6519 ,  H03M13/6525 ,  H03M13/6561 ,  H04L1/005 ,  H04L1/0052 ,  H04L1/0066 ,  H04L25/03171

    Abstract: A receiver capable of decoding encoded transmissions. The receiver includes a number of receive antennas configured to receive data; a plurality of memory units that store the received data; and a plurality of decoders configured to perform a Turbo decoding operation. Each of the plurality of decoders decodes at least a portion of the received data using at least a portion of a decoding matrix. The receiver also includes a data switch coupled between the plurality of decoders and the plurality of memory units. The data switch configured to vary a decode operation from an long term evolution (LTE) based operation to a Wideband Code Division Multiple Access (WCDMA) operation.

    Abstract translation: 一种能够解码编码的传输的接收机。 接收机包括被配置为接收数据的多个接收天线; 存储接收到的数据的多个存储单元; 以及多个解码器，被配置为执行Turbo解码操作。 多个解码器中的每一个使用解码矩阵的至少一部分来解码所接收的数据的至少一部分。 接收机还包括耦合在多个解码器和多个存储器单元之间的数据开关。 数据交换机被配置为将解码操作从基于长期演进（LTE）的操作改变为宽带码分多址（WCDMA）操作。

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