公开(公告)号：WO2012042292A1

公开(公告)日：2012-04-05

申请号：PCT/IB2010/003017

申请日：2010-09-30

申请人： FREESCALE SEMICONDUCTOR, INC. ,  RENAUD, Philippe ,  SERRANO, Roland

发明人： RENAUD, Philippe ,  SERRANO, Roland

IPC分类号： H01L21/02 ,  H01L21/302 ,  H01L21/78

CPC分类号： H01L21/0254 ,  H01L21/02005 ,  H01L21/02389 ,  H01L21/02658 ,  H01L21/302 ,  H01L21/78 ,  H01L29/2003

摘要： A method for processing a semiconductor wafer comprises providing the semiconductor wafer, which has a curvature in at least one direction. The curvature is reduced, which comprises providing in inactive areas of the semiconductor wafer multiple trench lines extending at least partially in a stressed layer of the semiconductor wafer and in parallel with the surface of the stressed layer. The multiple trench lines having a depth less than the thickness of the semiconductor wafer. A semiconductor wafer, comprising multiple active areas suitable for providing semiconductor devices or circuits. Inactive areas separate the active areas from each other. The wafer has a stressed layer with a first surface, and another layer which is in contact with the stressed layer along a second surface of the stressed layer, opposite to the first surface. Multiple trench lines, extend in parallel to the first surface of the stressed layer in an inactive area and have a depth less than the thickness of the semiconductor wafer.

摘要翻译： 一种用于处理半导体晶片的方法包括提供在至少一个方向上具有曲率的半导体晶片。 曲率减小，其包括在半导体晶片的非活性区域中提供至少部分地延伸到半导体晶片的应力层中并与应力层的表面平行延伸的多个沟槽线。 多个沟槽线的深度小于半导体晶片的厚度。 一种半导体晶片，包括适于提供半导体器件或电路的多个有源区。 非活动区域将活动区域彼此分开。 晶片具有带有第一表面的应力层，以及与应力层的与第一表面相对的第二表面与应力层接触的另一层。 多个沟槽线在非活性区域中平行于应力层的第一表面延伸并且具有小于半导体晶片的厚度的深度。