FREQUENCY SYNTHESIZER
    1.
    发明申请
    FREQUENCY SYNTHESIZER 审中-公开
    频率合成器

    公开(公告)号:WO2007114054A9

    公开(公告)日:2008-02-21

    申请号:PCT/JP2007055774

    申请日:2007-03-14

    Abstract: A frequency synthesizer enabling fine setting of frequency in a wide band according to a new principle and having a wide frequency acquisition range. By using specific solving means, the sinusoidal signal of output frequency of a voltage-controlled oscillating section is subjected to quadrature detection, a vector rotating at a frequency (rotation speed) which is the difference between the output frequency and the frequency of the frequency signal used for the detection is created, the frequency of the vector of when the output frequency becomes a set value is computed in advance, a voltage signal corresponding to the difference between the vector frequency and the computed frequency is fed back to the voltage-controlled oscillating section when the voltage-controlled oscillating section is driven so as to make the difference zero, thereby forming a PLL. Therefore, when the PLL is locked, the output frequency is adjusted to a set frequency. After the PLL is locked and if the difference between the output frequency and the set frequency becomes large, the set value is integrated by an integrating circuit section and the integral is added to the control voltage.

    Abstract translation: 一种频率合成器,能够根据新的原理精细设置宽频带的频率,并且具有宽的频率采集范围。 通过使用具体的解决方法,对压控振荡部分的输出频率的正弦信号进行正交检测,以频率(转速)旋转的矢量作为频率信号的输出频率和频率之间的差 用于检测的情况下,预先计算输出频率成为设定值时的矢量的频率,将与矢量频率和计算出的频率之间的差对应的电压信号反馈到电压振荡 当压控振荡部分被驱动以使差值为零时,形成PLL。 因此,当PLL被锁定时,输出频率被调整到设定的频率。 PLL锁定后,如果输出频率和设定频率之间的差异变大,则设定值由积分电路部分积分,积分加到控制电压上。

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