APPARATUS FOR ETCHING SEMICONDUCTOR WAFERS
    1.
    发明申请
    APPARATUS FOR ETCHING SEMICONDUCTOR WAFERS 审中-公开
    用于蚀刻半导体波长的装置

    公开(公告)号:WO2009140153A3

    公开(公告)日:2010-04-01

    申请号:PCT/US2009043261

    申请日:2009-05-08

    CPC classification number: H01L21/67126 H01L21/6838 Y10T279/23

    Abstract: A wafer pedestal of a semiconductor apparatus is provided. The wafer pedestal is capable of supporting a substrate. The wafer pedestal includes a pedestal having at least one purge opening configured to flow a purge gas and at least one chucking opening configured to chuck the substrate over the pedestal. The pedestal includes a sealing band disposed between the at least one purge opening and the at least one chucking opening. The sealing band is configured to support the substrate.

    Abstract translation: 提供半导体装置的晶片基座。 晶片基座能够支撑基板。 晶片基座包括具有至少一个净化开口的基座,该至少一个净化开口构造成流过净化气体;以及至少一个夹紧开口,其构造成将衬底夹在基座上。 基座包括设置在至少一个吹扫开口和至少一个夹紧开口之间的密封带。 密封带构造成支撑基底。

    APPARATUS FOR ETCHING SEMICONDUCTOR WAFERS
    3.
    发明申请
    APPARATUS FOR ETCHING SEMICONDUCTOR WAFERS 审中-公开
    用于蚀刻半导体波长的装置

    公开(公告)号:WO2009140153A2

    公开(公告)日:2009-11-19

    申请号:PCT/US2009/043261

    申请日:2009-05-08

    CPC classification number: H01L21/67126 H01L21/6838 Y10T279/23

    Abstract: A wafer pedestal of a semiconductor apparatus is provided. The wafer pedestal is capable of supporting a substrate. The wafer pedestal includes a pedestal having at least one purge opening configured to flow a purge gas and at least one chucking opening configured to chuck the substrate over the pedestal. The pedestal includes a sealing band disposed between the at least one purge opening and the at least one chucking opening. The sealing band is configured to support the substrate.

    Abstract translation: 提供半导体装置的晶片基座。 晶片基座能够支撑基板。 晶片基座包括具有至少一个净化开口的基座,该至少一个净化开口构造成流过净化气体;以及至少一个夹紧开口,其构造成将基板夹在基座上。 基座包括设置在至少一个吹扫开口和至少一个夹紧开口之间的密封带。 密封带构造成支撑基底。

    CERAMIC SHOWERHEADS WITH CONDUCTIVE ELECTRODES

    公开(公告)号:WO2020146069A1

    公开(公告)日:2020-07-16

    申请号:PCT/US2019/064834

    申请日:2019-12-06

    Abstract: Exemplary semiconductor processing chamber showerheads may include a dielectric plate characterized by a first surface and a second surface opposite the first surface. The dielectric plate may define a plurality of apertures through the dielectric plate. The dielectric plate may define a first annular channel in the first surface of the dielectric plate, and the first annular channel may extend about the plurality of apertures. The dielectric plate may define a second annular channel in the first surface of the dielectric plate. The second annular channel may be formed radially outward from the first annular channel. The showerheads may also include a conductive material embedded within the dielectric plate and extending about the plurality of apertures without being exposed by the apertures. The conductive material may be exposed at the second annular channel.

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