公开(公告)号：WO2012117374A1

公开(公告)日：2012-09-07

申请号：PCT/IB2012/050977

申请日：2012-03-01

Applicant: TECHNION R&D FOUNDATION ,  NAZARATHY, Moshe ,  TSELNIKER, Igor ,  SIGRON, Netta

Inventor： NAZARATHY, Moshe

IPC: H04L25/03

CPC classification number: H04B10/613 ,  H04B10/612 ,  H04B10/6165 ,  H04J14/002 ,  H04L25/03019 ,  H04L27/0014 ,  H04L27/2331 ,  H04L27/38 ,  H04L2027/0024

Abstract: A receiver and a multi-symbol-differential-detection (MSDD) module, the MSDD may include an input node for receiving an input signal having a noisy phase; a summation and rotation unit; and an output unit; wherein the output unit is arranged to output an output signal and a normalized output signal; wherein the output signal represents the input signal but has a reconstructed phase; wherein the summation and rotation unit is arranged to receive the input signal and the output signal and to provide a reference signal that reflects a weighted sum of phase rotated and delayed previously received input signals; wherein the output unit comprises a phase difference calculator, a slicer, a delay unit and a normalizer; wherein the phase difference calculator is arranged to generate a difference signal indicative of a phase difference between the reference signal and the input signal; wherein the slicer and the delay unit are arranged to generate the output signal by slicing the difference signal to provide a sliced signal and by delaying the sliced signal; and wherein the normalizer is arranged to normalize the output signal to provide the normalized output signal.

Abstract translation: 一种接收机和多符号差分检测（MSDD）模块，MSDD可以包括用于接收具有噪声相位的输入信号的输入节点; 总和和旋转单元; 和输出单元; 其中所述输出单元被布置成输出输出信号和归一化输出信号; 其中所述输出信号表示所述输入信号，但具有重构相位; 其中所述求和和旋转单元被布置为接收所述输入信号和所述输出信号，并且提供反映相位旋转和延迟的先前接收的输入信号的加权和的参考信号; 其中所述输出单元包括相位差计算器，限幅器，延迟单元和归一化器; 其中所述相位差计算器被配置为产生指示所述参考信号和所述输入信号之间的相位差的差信号; 其中所述限幅器和所述延迟单元被布置为通过对所述差分信号进行限幅来产生所述输出信号以提供分片信号并通过延迟所述分片信号; 并且其中所述归一化器被布置成使输出信号归一化以提供归一化的输出信号。

公开(公告)号：WO2011010314A3

公开(公告)日：2011-10-13

申请号：PCT/IL2010000590

申请日：2010-07-25

Applicant: TECHNION RES & DEV FOUNDATION ,  NAZARATHY MOSHE ,  TSELNIKER IGOR

Inventor： NAZARATHY MOSHE ,  TSELNIKER IGOR

IPC: H03M1/36 ,  H03M1/14 ,  H03M1/16 ,  H03M1/46 ,  H03M1/74 ,  H03M3/02 ,  H03M3/04

CPC classification number: H03M1/145 ,  G02F7/00 ,  H03M1/146 ,  H03M1/168 ,  H03M1/361 ,  H03M1/46 ,  H03M1/74 ,  H03M3/402 ,  H03M3/424 ,  H03M3/43 ,  H03M3/434 ,  H03M3/456

Abstract: A ultra high speed photonic Analog to Digital Converted (ADC) for sampling and quantizing an electrical voltage signal, internally enabled by photonics uses coherent optical detection architectures for photonic quantization. Coherent light is phase modulated by the test signal. Using an interferometer, or an array of interferometers the phase of modulated light is compared with a reference light. Flash ADC, successive approximation ADC and delta-sigma ADC configurations are presented.

Abstract translation: 用于采样和量化电压信号的超高速光子模数转换（ADC），在光子学内部使用，使用相干光学检测架构进行光子量子化。 相干光由测试信号进行相位调制。 使用干涉仪或干涉仪阵列，将调制光的相位与参考光进行比较。 Flash ADC，逐次逼近ADC和Δ-ΣADC配置。