公开(公告)号：WO2012143759A1

公开(公告)日：2012-10-26

申请号：PCT/IB2011/051728

申请日：2011-04-20

Applicant: FREESCALE SEMICONDUCTOR, INC. ,  PRIEL, Michael ,  TZYTKIN, Dov ,  SOFER, Sergey

Inventor： PRIEL, Michael ,  TZYTKIN, Dov ,  SOFER, Sergey

IPC: G06F1/04 ,  G06F1/26

CPC classification number: G01R21/133 ,  G06F1/10 ,  G06F1/28 ,  G06F1/30 ,  G06F1/3237 ,  Y02D10/128

Abstract: An electronic device (10) comprises one or more functional units (22, 24, 26), each functional unit (22, 24, 26) being clocked by a respective clock signal (CKG_A; CKG_B; CKG_C). The electronic device (10) further comprises a monitoring unit (40) for providing a real-time estimate (l_ES) of an electrical current consumed by the functional units (22, 24, 26). The monitoring unit (40) provides the real-time estimate on the basis of characteristic signals. The characteristic signals may comprise one or more of said clock signals (CKG_A, CKG_B, CKG_C), or one or more clock generating signals used to generate said clock signals. The electronic device (10) may further comprise a power regulator (14) responsive to the real-time estimate (l_ES). A method of estimating in real-time an electrical current consumed by one or more functional units is also described.

Abstract translation: 电子设备（10）包括一个或多个功能单元（22,24,26），每个功能单元（22,24,26）由相应的时钟信号（CKG_A; CKG_B; CKG_C）计时。 电子设备（10）还包括监视单元（40），用于提供由功能单元（22,24,26）消耗的电流的实时估计（1_ES）。 监视单元（40）基于特征信号提供实时估计。 特征信号可以包括一个或多个所述时钟信号（CKG_A，CKG_B，CKG_C）或用于产生所述时钟信号的一个或多个时钟产生信号。 电子设备（10）还可以包括响应于实时估计（1_ES）的功率调节器（14）。 还描述了实时估计一个或多个功能单元消耗的电流的方法。

公开(公告)号：WO2010096100A1

公开(公告)日：2010-08-26

申请号：PCT/US2009/058130

申请日：2009-09-24

Applicant: FREESCALE SEMICONDUCTOR INC. ,  SOFER, Sergey ,  GOLDMAN, Vlad ,  TZYTKIN, Dov

Inventor： SOFER, Sergey ,  GOLDMAN, Vlad ,  TZYTKIN, Dov

IPC: G05F1/10

CPC classification number: H02J1/14 ,  H03K19/0016 ,  H03K19/00361

Abstract: A system that has low power recovery capabilities, the system includes: a switch that is adapted to provide a gated power supply to a power gated circuit in response to a control current; and a control signal generator adapted to control an intensity of the control current in response to a reception of a low power period end indicator, a value of the continuous supply voltage at a port of the control signal generator, a value of the gated supply voltage and an output signal of a high switching point buffer that is inputted by the gated supply voltage.

Abstract translation: 一种具有低功率恢复能力的系统，该系统包括：开关，适于响应于控制电流向门电路提供门控电源; 以及控制信号发生器，其适于响应于低功率周期结束指示器的接收来控制控制电流的强度，控制信号发生器端口处的连续电源电压的值，门控电源电压的值 以及由门控电源电压输入的高切换点缓冲器的输出信号。

公开(公告)号：WO2011132023A1

公开(公告)日：2011-10-27

申请号：PCT/IB2010/051767

申请日：2010-04-22

Applicant: FREESCALE SEMICONDUCTOR, INC. ,  SOFER, Sergey ,  PRIEL, Michael ,  TZYTKIN, Dov

Inventor： SOFER, Sergey ,  PRIEL, Michael ,  TZYTKIN, Dov

IPC: H03K19/0185

CPC classification number: H03K3/356113

Abstract: A voltage level shifter (10) for translating a binary input signal (IN_L) representing a binary sequence to a binary output signal (OUT_H) representing the same binary sequence. The voltage level shifter comprises an input port (12) for receiving the binary input signal as an input voltage varying between a first input voltage level (VSS) and a second input voltage level (VDD). An output port (14) is connected to a node (16) for outputting the binary output signal as an output voltage varying between a first output voltage level (VBB) and a second output voltage level (VPP). A supply voltage node (18) connectable to a voltage supply, can provide the second output voltage level (VPP). A first switch (22) is arranged to couple the supply voltage node (18) to the node (16) and to decouple the supply voltage node (18) from the node (16) based on a voltage at the node (16). A feedback voltage loop (40) is connected to the node (16) for providing a feedback voltage (VFB) based on the voltage at the node (16). A second switch (42) is connected to the feedback voltage loop and arranged to couple the input port (12) to the node (16) based on a voltage at the input port and the feedback voltage (VFB). A decoupler and a voltage shifting method are also disclosed.

Abstract translation: 一种用于将表示二进制序列的二进制输入信号（IN_L）转换为表示相同二进制序列的二进制输出信号（OUT_H）的电压电平移位器（10）。 电压电平移位器包括用于接收二进制输入信号作为在第一输入电压电平（VSS）和第二输入电压电平（VDD）之间变化的输入电压的输入端口（12）。 输出端口（14）连接到节点（16），用于输出二进制输出信号作为在第一输出电压电平（VBB）和第二输出电压电平（VPP）之间变化的输出电压。 可连接到电源的电源电压节点（18）可以提供第二输出电压电平（VPP）。 第一开关（22）布置成将电源电压节点（18）耦合到节点（16），并且基于节点（16）处的电压将电源电压节点（18）与节点（16）去耦。 反馈电压回路（40）连接到节点（16），用于基于节点（16）处的电压提供反馈电压（VFB）。 第二开关（42）连接到反馈电压回路并且被布置为基于输入端口处的电压和反馈电压（VFB）将输入端口（12）耦合到节点（16）。 还公开了解耦器和电压移位方法。

公开(公告)号：WO2010131078A1

公开(公告)日：2010-11-18

申请号：PCT/IB2009/052022

申请日：2009-05-14

Applicant: FREESCALE SEMICONDUCTOR, INC. ,  SOFER, Sergey ,  FEFER, Yefim - Haim ,  TZYTKIN, Dov

Inventor： SOFER, Sergey ,  FEFER, Yefim - Haim ,  TZYTKIN, Dov

IPC: H01L27/04 ,  H01L23/60

CPC classification number: H01L27/0285 ,  H01L23/60 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

Abstract: An integrated circuit (1 ), comprises a power supply node (10) being connectable to a voltage supply (Vdd); a ground node (11 ) connectable to ground (GND); and an electrostatic discharge protection structure (13) for diverting an electrostatic discharge away from protected parts of the integrated circuit. A gated domain (14) is present which is supply gated and/or ground gated with respect to the power supply node and/or the ground node, as well as a gating switch (15) for gating the gated domain relative to the power supply node and/or the ground node. The gating switch enables in a connecting state, and in a disconnecting state inhibits, an electrical connection between the gated domain and at least one of: the power supply node and the ground node. The integrated circuit includes ESD gating control circuitry (130) for controlling in case of an electrostatic discharge event the gated domain to be electrically connected to the power supply node and/or the ground node.

Abstract translation: 集成电路（1）包括可连接到电压源（Vdd）的电源节点（10）; 可接地（GND）的接地节点（11）; 以及用于将静电放电转移离开集成电路的受保护部分的静电放电保护结构（13）。 存在门控域（14），其相对于电源节点和/或接地节点供电门控和/或接地门控，以及用于相对于电源门控门控开关（15） 节点和/或接地节点。 门控开关使得能够处于连接状态，并且在断开状态下禁止门控域与电源节点和接地节点中的至少一个之间的电连接。 集成电路包括ESD选通控制电路（130），用于在静电放电事件的情况下控制门控域电连接到电源节点和/或接地节点。

公开(公告)号：WO2012131435A1

公开(公告)日：2012-10-04

申请号：PCT/IB2011/051360

申请日：2011-03-30

Applicant: FREESCALE SEMICONDUCTOR, INC. ,  PRIEL, Michael ,  FLESHEL, Leonid ,  ROZEN, Anton ,  TZYTKIN, Dov

Inventor： PRIEL, Michael ,  FLESHEL, Leonid ,  ROZEN, Anton ,  TZYTKIN, Dov

IPC: H01L27/092 ,  H01L21/8238

CPC classification number: H01L27/0629 ,  H01L27/0928

Abstract: There is provided a semiconductor Integrated Circuit device having forward well biasing, in which at least one protection device is connected between a supply voltage (Vdd/Vss) and a forward well bias voltage (pwb/nwb).

Abstract translation: 提供了具有正向阱偏压的半导体集成电路器件，其中至少一个保护器件连接在电源电压（Vdd / Vss）和正向阱偏置电压（pwb / nwb）之间。

公开(公告)号：WO2011132022A1

公开(公告)日：2011-10-27

申请号：PCT/IB2010/051766

申请日：2010-04-22

Applicant: FREESCALE SEMICONDUCTOR, INC. ,  PRIEL, Michael ,  SOFER, Sergey ,  TZYTKIN, Dov

Inventor： PRIEL, Michael ,  SOFER, Sergey ,  TZYTKIN, Dov

IPC: H03K19/0185

CPC classification number: H03K19/018521

Abstract: A voltage level shifter (10) is used to translate a binary input signal (IN_L) representing a binary sequence to a binary output signal (OUT_H) representing the same binary sequence. The input signal is provided by an input voltage (VIN) varying between a first input voltage level (VSS) and a second input voltage level (VDD). The output signal is provided by an output voltage (VOUT) varying between a first output voltage level (VBB) and a second output voltage level (VPP). The output signal has a delay relative to the input signal, and the voltage level shifter has a leakage current. The voltage level shifter has a first operating mode and a second operating mode. In the second operating mode, the delay is shorter while the leakage current is higher than in the first operating mode.

Abstract translation: 电压电平移位器（10）用于将表示二进制序列的二进制输入信号（IN_L）转换为表示相同二进制序列的二进制输出信号（OUT_H）。 输入信号由在第一输入电压电平（VSS）和第二输入电压电平（VDD）之间变化的输入电压（VIN）提供。 输出信号由在第一输出电压电平（VBB）和第二输出电压电平（VPP）之间变化的输出电压（VOUT）提供。 输出信号相对于输入信号具有延迟，电压电平移位器具有漏电流。 电压电平移位器具有第一操作模式和第二操作模式。 在第二操作模式中，延迟较短，而漏电流高于第一操作模式。