公开(公告)号：WO2019199472A1

公开(公告)日：2019-10-17

申请号：PCT/US2019/024647

申请日：2019-03-28

Applicant: APPLE INC.

Inventor： DABRAL, Sanjay ,  KILIC, Bahattin ,  ZHAO, Jie-Hua ,  HU, Kunzhong ,  RYU, Suk-Kyu

IPC: H01L23/00 ,  H01L25/065 ,  G06F13/40 ,  G06F15/78

Abstract: Multi-chip systems (100) and structures for modular scaling are described. In some embodiments an interfacing bar (150) is utilized to couple adjacent chips (102, 104). For example, a communication bar (150) may utilized to coupled logic chips (104), and memory bar (150) may be utilized to couple multiple memory chips (102) to a logic chip (104).