公开(公告)号：WO2015100345A2

公开(公告)日：2015-07-02

申请号：PCT/US2014/072197

申请日：2014-12-23

Applicant: ESS TECHNOLOGY, INC.

Inventor： MALLINSON, A., Martin

IPC: G05F1/575

CPC classification number: G05F1/575 ,  G05F1/618

Abstract: A voltage regulator for providing a constant voltage to a circuit is described in which a series regulator acts as the current source for a shunt regulator and the series regulator in turn is controlled by the current diverted from the output by the shunt regulator. The current being diverted by the shunt regulator is measured, either directly or by measuring a related operating parameter. When current below or above a certain desired amount is being diverted from the load by the shunt regulator, a signal is sent to the series regulator causing the series regulator to provide more or less current respectively, so that the shunt regulator again diverts the desired amount of current and the output voltage remains constant. This configuration results in efficiency near that of a series regulator while maintaining the better frequency response of a shunt regulator.

Abstract translation: 描述了一种用于向电路提供恒定电压的电压调节器，其中串联调节器用作分流调节器的电流源，而串联调节器又由来自输出端的电流控制 通过分流调节器。 直接或通过测量相关操作参数来测量由分流调节器转移的电流。 当低于或高于特定期望值的电流被分流调节器从负载转移时，信号被发送到串联调节器，使得串联调节器分别提供更多或更少的电流，使得分流调节器再次转移期望的量 的电流和输出电压保持不变。 这种配置的效率接近串联稳压器的效率，同时保持并联稳压器的更好的频率响应。

公开(公告)号：WO2015021209A1

公开(公告)日：2015-02-12

申请号：PCT/US2014/050020

申请日：2014-08-06

Applicant: ESS TECHNOLOGY, INC.

Inventor： BLAIR, Robert, L. ,  RISLER, Daniel, A. ,  MALLINSON, A., Martin

IPC: G06F17/50

CPC classification number: G06F17/5072 ,  G06F17/5045 ,  G06F17/5068 ,  G06F17/5077 ,  G06F17/5081 ,  H01L27/0207

Abstract: An improved method for the placement and routing of compound elements, each comprising a series/parallel combination of nominally identical elements, is disclosed. The method treats each compound element as a separate cell (the sub-circuit construct commonly used in silicon chip design) so as to treat as a unit all the nominally identical elements that make up a compound value, and place them as a single group in the design of a chip. This results in the compound elements being placed as units and routed in such a way that all of the nominal elements are located together and any effects between compound values are thus relatively localized and optimally isolated.

Abstract translation: 公开了一种用于放置和布线化学元件的改进方法，每个复合元件包括名义上相同的元件的串联/并联组合。 该方法将每个复合元素作为单独的单元（通常用于硅芯片设计的子电路构造）来处理，以便将作为单位的所有名义上相同的元素作为单元处理，并将它们作为单个组 芯片的设计。 这导致复合元素被放置为单元并以这样的方式布线，使得所有标称元素位于一起，并且化合物值之间的任何影响因此相对局部化并且被最佳隔离。

公开(公告)号：WO2014210192A1

公开(公告)日：2014-12-31

申请号：PCT/US2014/044146

申请日：2014-06-25

Applicant: ESS TECHNOLOGY, INC.

Inventor： MALLINSON, A., Martin

IPC: H03H11/26

CPC classification number: H03K19/00315 ,  H03K5/133 ,  H03K5/14 ,  H03K5/15046 ,  H03K19/00361 ,  H03K19/00369 ,  H03K19/018521

Abstract: A delay circuit in which the delay is independent of variations in the power supply which powers the logic gates of the delay circuit is disclosed. By separating the CMOS transistors that form each logic gate by additional CMOS bias transistors which are biased at a controlled voltage, variations in the gate delay of the inverter transistors due to variations in the power supply voltage for the inverter transistors may he minimized, in one embodiment, the constant bias voltage may be provided by a constant current source comprising a series of amplifiers each having a gain significantly less than one connected to a triple cascode.

Abstract translation: 公开了一种延迟电路，其延迟与为延迟电路的逻辑门供电的电源的变化无关。 通过将偏置在受控电压的附加CMOS偏置晶体管分离形成每个逻辑门的CMOS晶体管，由于逆变器晶体管的电源电压的变化，反相晶体管的栅极延迟的变化可能在一个 恒定偏置电压可以由包括一系列放大器的恒定电流源提供，每个放大器具有明显小于连接到三重共源共栅的一个的增益。

公开(公告)号：WO2016065206A1

公开(公告)日：2016-04-28

申请号：PCT/US2015/057013

申请日：2015-10-22

Applicant: ESS TECHNOLOGY, INC.

Inventor： MALLINSON, A., Martin ,  FORMAN, Dustin, Dale ,  BLAIR, Robert, Lynn ,  FRITH, Peter, John

IPC: G06F13/28

CPC classification number: H04R1/1041 ,  H04M1/6058 ,  H04R5/04 ,  H04R2420/09

Abstract: An apparatus is disclosed for inputting digital data on the output channel(s) of an audio subsystem in an audio device, without interfering with normal operation of the audio subsystem. The described circuit includes a resistive element in parallel with the expected load device, such as a headphone or speaker. The resistive element receives a modulated digital signal from a data source or a switch, and the instantaneous current through the resistive element due to the modulated digital signal is reflected in a current feedback mechanism of the audio subsystem. Demodulation logic retrieves the digital signal from the current measured by the current feedback mechanism. A capacitor is provided to prevent the current in the resistive element from the digital signal from impacting the average DC current that the feedback mechanism uses to evaluate the load device.

Abstract translation: 公开了一种用于在音频设备中的音频子系统的输出通道上输入数字数据而不干扰音频子系统的正常操作的装置。 所描述的电路包括与期望的负载装置（例如耳机或扬声器）并联的电阻元件。 电阻元件从数据源或开关接收调制的数字信号，并且由于调制的数字信号引起的通过电阻元件的瞬时电流被反映在音频子系统的电流反馈机制中。 解调逻辑从当前反馈机制测量的电流中检索数字信号。 提供电容器以防止电阻元件中的电流数字信号影响反馈机构用于评估负载装置的平均DC电流。

公开(公告)号：WO2013067465A1

公开(公告)日：2013-05-10

申请号：PCT/US2012/063468

申请日：2012-11-03

Applicant: ESS TECHNOLOGY, INC.

Inventor： FORMAN, Dustin, Dale ,  MALLINSON, A., Martin ,  BLAIR, Robert, Lynn

IPC: H04B1/10

CPC classification number: H03D7/18 ,  H03D7/165 ,  H03D2200/0062 ,  H03D2200/0068 ,  H03D2200/0072

Abstract: A method and system is disclosed tor designing a radio for down- converting RF signals to IF signals by sampling the signals in a round-robin sampling circuit and multiplying the samples by coefficients that are changed at a fixed rate equal to the rate of operation of each of the sampling circuits. The circuit is able to down-convert multiple channels simultaneously to adjacent positions in the IF band,, while rejecting unwanted image signals. The method and system avoids the difficulty and cost of directly digitizing the RF signal, allowing each component to operate at a greatly reduced speed. The coefficients are selected to provide the desired transfer function while keeping the output signal centered at a desired frequency.

Abstract translation: 公开了一种方法和系统，其设计用于通过对循环抽样电路中的信号进行采样来将RF信号下变频到IF信号的无线电装置，并将样本乘以以等于 每个采样电路。 该电路能够将多个信道同时下变频到IF频带中的相邻位置，同时拒绝不需要的图像信号。 该方法和系统避免了直接数字化RF信号的困难和成本，从而允许每个组件以大大降低的速度运行。 选择系数以提供期望的传递函数，同时将输出信号保持在期望频率的中心。

公开(公告)号：WO2012129296A1

公开(公告)日：2012-09-27

申请号：PCT/US2012/029928

申请日：2012-03-21

Applicant: ESS TECHNOLOGY, INC.

Inventor： MALLINSON, A., Martin

IPC: G06F7/00

CPC classification number: H03H17/06 ,  H03H15/00

Abstract: A finite impulse response (FIR) filter having a differential output and capable of having negative coefficients, and a method of designing the filter, is disclosed. In contrast to the prior art, in which two output signals requires the use of two identical sets of impedance devices corresponding to the Fourier coefficients that create the desired response of the filter, the described method and system uses only a single set of impedance devices, and thus approximately one-half of the number of impedance devices used in the prior art. This is accomplished by appropriately selecting which resistors contribute to which output, so that a differential output may be obtained that is substantially the same as if impedance devices corresponding to all of the coefficients were used for each signal.

Abstract translation: 公开了一种具有差分输出且能够具有负系数的有限脉冲响应（FIR）滤波器，以及一种设计滤波器的方法。 与现有技术相比，其中两个输出信号需要使用与产生滤波器的期望响应的傅里叶系数对应的两组相同的阻抗装置，所描述的方法和系统仅使用一组阻抗装置， 因此约为现有技术中使用的阻抗装置数量的一半。 这通过适当地选择哪些电阻有助于哪个输出来实现，使得可以获得基本上相同的差分输出，如同对于每个信号使用对应于所有系数的阻抗器件一样。

公开(公告)号：WO2015017574A2

公开(公告)日：2015-02-05

申请号：PCT/US2014/048952

申请日：2014-07-30

Applicant: ESS TECHNOLOGY, INC.

Inventor： MALLINSON, A., Martin

IPC: G06F17/50

CPC classification number: G06F17/5045 ,  G06F17/5063 ,  G06F2217/02 ,  G06F2217/06

Abstract: [0080] A.method and system for generating and.matching complex series and/or parallel combinations of nominally Identical initial elements to achieve an arbitrary compound value is disclosed. A recursive algorithm successively adds one or more similar nominal two-terminal elements to generate a series and/or parallel compound combination of nominal elements, the compound combination having a desired impedance. The compound value, and thus the ratio between two compound values, can be determined to almost any desired, degree of accuracy, with potential errors greatly reduced from those typical in the construction of individual elements of different values. Since the initial elements are nominally identical, the compound value, and the ratio between values, depends primarily upon the connections of. the initial elements, rather than their geometry, and thus remain virtually constant regardless of variations in the manufacturing process.

Abstract translation: 公开了用于产生和复制名义上相同的初始元素以实现任意化合物值的复杂串联和/或并联组合的方法和系统。 递归算法连续地添加一个或多个相似的标称两端元件以产生具有期望阻抗的复合组合的标称元件的串联和/或并联复合组合。 可以将化合物值以及因此两个化合物值之间的比率确定为几乎任何所需的准确度，其中潜在误差比在不同值的各个元素的构造中典型地降低。 由于初始元素名义上相同，所以复合值和值之间的关系主要取决于连接。 初始元件，而不是它们的几何形状，并且因此保持实质上恒定，而与制造过程中的变化无关。

公开(公告)号：WO2007038474A2

公开(公告)日：2007-04-05

申请号：PCT/US2006/037399

申请日：2006-09-26

Applicant: ESS TECHNOLOGY, INC. ,  MALLINSON, A., Martin ,  FORMAN, Dustin, D. ,  DAMPHOUSSE, Simon

Inventor： MALLINSON, A., Martin ,  FORMAN, Dustin, D. ,  DAMPHOUSSE, Simon

IPC: G06F17/00

CPC classification number: H03M7/302 ,  H03M3/504 ,  H03M3/506

Abstract: The present invention relates to digital-to-analog conversion. In particular, it has application to conversion of pulse code modulated signals, such as used in CDs and DVDs5 to a pulse width modulated or analog signal.

Abstract translation: 本发明涉及数模转换。 具体地说，它适用于将诸如在CD和DVD中使用的脉冲编码调制信号5转换成脉冲宽度调制或模拟信号。

公开(公告)号：WO2007038472A3

公开(公告)日：2007-04-05

申请号：PCT/US2006/037397

申请日：2006-09-26

Applicant: ESS TECHNOLOGY, INC. ,  FORMAN, Dustin, D. ,  MALLINSON, A., Martin ,  DAMPHOUSSE, Simon

Inventor： FORMAN, Dustin, D. ,  MALLINSON, A., Martin ,  DAMPHOUSSE, Simon

IPC: H03M1/66

Abstract: The present invention relates to multi-bit to pulse width modulated signal conversion, with extensions to digital-to-analog conversion. In particular, it has application to conversion of pulse code modulated signals, such as used in CDs and DVDs, to audio output.

公开(公告)号：WO2016004416A1

公开(公告)日：2016-01-07

申请号：PCT/US2015/039148

申请日：2015-07-03

Applicant: ESS TECHNOLOGY, INC.

Inventor： MALLINSON, A., Martin

IPC: H03M3/00

CPC classification number: H03H15/02

Abstract: A system and method is disclosed for placing some of the elements of a FIR filter into a high impedance state in certain situations. When it is detected that the signal to an impedance element is the same as the previous value, then the driver of that impedance element is "turned off" or goes into a high impedance state, so that no current flows through that impedance element, and it no longer contributes to the filter output. Alternatively, if the impedance elements are the same between two adjacent taps of the delay line, the driver of one of those impedance elements may be turned off or go into a high impedance state. The technique may be particularly useful in differential output filters. Turning off a driver effectively removes the attached impedance element from the filter and reduces current flow and power consumption, thus extending battery life in mobile devices.

Abstract translation: 公开了一种用于在某些情况下将FIR滤波器的一些元件置于高阻抗状态的系统和方法。 当检测到阻抗元件的信号与先前的值相同时，则该阻抗元件的驱动器被“关闭” 或进入高阻抗状态，使得没有电流流过该阻抗元件，并且不再有助于滤波器输出。 或者，如果阻抗元件在延迟线的两个相邻抽头之间相同，则这些阻抗元件之一的驱动器可以被关断或进入高阻抗状态。 该技术在差分输出滤波器中可​​能特别有用。 关闭驱动器可有效去除滤波器附带的阻抗元件，并降低电流和功耗，从而延长移动设备的电池寿命。