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    SIGNAL AMPLIFICATION AND TRANSMISSION BASED ON COMPLEX DELTA SIGMA MODULATOR
    2.
    发明申请
    SIGNAL AMPLIFICATION AND TRANSMISSION BASED ON COMPLEX DELTA SIGMA MODULATOR 审中-公开
    基于复合DELTA SIGMA调制器的信号放大和传输

    公开(公告)号：WO2015198092A1

    公开(公告)日：2015-12-30

    申请号：PCT/IB2014/062544

    申请日：2014-06-23

    Applicant: TELEFONAKTIEBOLAGET L M ERICSSON (PUBL) ,  EBRAHIMI, Mojtaba ,  HELAOUI, Mohamed ,  GHANNOUCHI, Fadhel ,  ELSAYED, Fahmi ,  MORRIS, Bradley John

    Inventor： EBRAHIMI, Mojtaba ,  HELAOUI, Mohamed ,  GHANNOUCHI, Fadhel ,  ELSAYED, Fahmi ,  MORRIS, Bradley John

    IPC: H03M7/30

    CPC classification number: H04B1/0475 ,  H03F3/19 ,  H03F3/245 ,  H03F2200/451 ,  H03M7/3015 ,  H03M7/302 ,  H04L27/2614

    Abstract: Apparatuses and methods for power amplification and signal transmission using complex delta-sigma modulation are disclosed. In one embodiment, a complex delta sigma modulator unit comprising a complex polar quantizer within an integrator loop is disclosed. The complex polar quantizer quantizes the envelope of a complex integrated signal and produces a complex quantized output signal of substantially constant envelope. The complex quantized output signal is used in deriving a complex feedback signal within the integrator loop of the complex DSM. The complex quantized output signal may be used in driving a power amplifier substantially at saturation. In some embodiments, an adjacent channel power ratio (ACPR) enhancement technique is used to reduce the quantization noise in the complex quantized output signal.

    Abstract translation: 公开了使用复数Δ-Σ调制的功率放大和信号传输的装置和方法。 在一个实施例中，公开了一种在积分器环路内包括复极化量化器的复数ΔΣ调制器单元。 复极化量化器量化复合积分信号的包络并产生基本恒定包络的复数量化输出信号。 复数量化输出信号用于在复数DSM的积分器环路内导出复数反馈信号。 复数量化输出信号可以用于基本上饱和地驱动功率放大器。 在一些实施例中，使用相邻信道功率比（ACPR）增强技术来减少复数量化输出信号中的量化噪声。

    NOISE SHAPERS WITH SHARED AND INDEPENDENT FILTERS AND MULTIPLE QUANTIZERS AND DATA CONVERTERS
    3.
    发明申请
    NOISE SHAPERS WITH SHARED AND INDEPENDENT FILTERS AND MULTIPLE QUANTIZERS AND DATA CONVERTERS 审中-公开
    具有共享和独立滤波器和多个量子和数据转换器的噪声形状

    公开(公告)号：WO2004013972A3

    公开(公告)日：2004-03-18

    申请号：PCT/US0323462

    申请日：2003-07-29

    Applicant: CIRRUS LOGIC INC

    Inventor： MELANSON JOHN LAURENCE

    IPC: H03M3/02 ,  H03M3/04 ,  H03M7/36 ,  H03M3/00

    CPC classification number: H03M7/3006 ,  H03M3/35 ,  H03M3/42 ,  H03M3/452 ,  H03M7/302 ,  H03M7/3037

    Abstract: A noise shaper including first and second quantizers and first and second feedback paths each providing feedback from a corresponding quantizer output. A loop filter system implements a plurality of transfer functions including a first non-zero transfer function between the first feedback path and an input of the first quantizer, a second non-zero transfer function between the first feedback path and an input of the second quantizer, a third non-zero transfer function between the second feedback path and the input of the first quantizer and a fourth non-zero transfer between the second feedback path and the input the second quantizer.

    Abstract translation: 一种噪声整形器，包括第一和第二量化器以及第一和第二反馈路径，每个反馈路径提供来自相应量化器输出的反馈。 环路滤波器系统实现多个传递函数，包括在第一反馈路径和第一量化器的输入之间的第一非零传递函数，第一反馈路径和第二量化器的输入之间的第二非零传递函数 在所述第二反馈路径和所述第一量化器的输入之间的第三非零传递函数和所述第二反馈路径与所述第二量化器的输入之间的第四非零传递。

    NOISE SHAPERS WITH SHARED AND INDEPENDENT FILTERS AND MULTIPLE QUANTIZERS AND DATA CONVERTERS AND METHODS USING THE SAME
    4.
    发明申请
    NOISE SHAPERS WITH SHARED AND INDEPENDENT FILTERS AND MULTIPLE QUANTIZERS AND DATA CONVERTERS AND METHODS USING THE SAME 审中-公开
    具有共享和独立滤波器和多个量化器的噪声形成器以及使用该滤波器和数据转换器的数据转换器和方法

    公开(公告)号：WO2004013972A2

    公开(公告)日：2004-02-12

    申请号：PCT/US2003/023462

    申请日：2003-07-29

    Applicant: CIRRUS LOGIC, INC.

    Inventor： MELANSON, John, Laurence

    IPC: H03M3/00

    CPC classification number: H03M7/3006 ,  H03M3/35 ,  H03M3/42 ,  H03M3/452 ,  H03M7/302 ,  H03M7/3037

    Abstract: A noise shaper including first and second quantizers and first and second feedback paths each providing feedback from a corresponding quantizer output. A loop filter system implements a plurality of transfer functions including a first non-zero transfer function between the first feedback path and an input of the first quantizer, a second non-zero transfer function between the first feedback path and an input of the second quantizer, a third non-zero transfer function between the second feedback path and the input of the first quantizer and a fourth non-zero transfer between the second feedback path and the input the second quantizer.

    Abstract translation: 包括第一和第二量化器以及第一和第二反馈路径的噪声整形器，每个反馈路径提供来自对应量化器输出的反馈。 环路滤波器系统实现多个传递函数，包括第一反馈路径与第一量化器的输入之间的第一非零传递函数，第一反馈路径与第二量化器的输入之间的第二非零传递函数 ，第二反馈路径与第一量化器的输入之间的第三非零传递函数，以及第二反馈路径与第二量化器的输入之间的第四非零传递。

    LEVEL DE-MULTEPLEXED DELTA SIGMA MODULATOR BASED TRANSMITTER
    5.
    发明申请
    LEVEL DE-MULTEPLEXED DELTA SIGMA MODULATOR BASED TRANSMITTER 审中-公开
    基于水平的多路复用的基于三角形信号调制器的发射机

    公开(公告)号：WO2015015476A3

    公开(公告)日：2015-07-02

    申请号：PCT/IB2014063685

    申请日：2014-08-04

    Applicant: ERICSSON TELEFON AB L M ,  MOJTABA EBRAHIMI ,  MORRIS BRADLEY JOHN ,  ELSAYED FAHMI ,  HELAOUI MOHAMED ,  GHANNOUCHI FADHEL

    Inventor： MOJTABA EBRAHIMI ,  MORRIS BRADLEY JOHN ,  ELSAYED FAHMI ,  HELAOUI MOHAMED ,  GHANNOUCHI FADHEL

    IPC: H03M7/36 ,  H03M3/04

    CPC classification number: H04B1/0475 ,  H03F1/02 ,  H03F3/24 ,  H03M3/02 ,  H03M3/50 ,  H03M7/302 ,  H03M7/3026 ,  H03M7/304 ,  H04B1/02 ,  H04B2001/045

    Abstract: This specification discloses a level de-multiplexed DSM based transmitter and a method for providing the same. Broadly embodiments of the present specification enable wireless transmitters that are based on multi-level de-multiplexed DSM. A three-level de- multiplexed DSM based transmitter is disclosed as an example. More generally, the use of m-level de-multiplexed DSM is also taught, the specification thereby being enabling for broader applications to a person skilled in the art. At least one of the efficiency and linearity of transmitters can be enhanced as required for specific applications by a person of skill in the art in view of this specification and the teachings of its disclosed embodiments.

    Abstract translation: 本说明书公开了一种基于水平解复用DSM的发射机及其提供方法。 本说明书的广义实施例使得能够基于多级解复用DSM的无线发射机。 作为示例公开了基于三电平解复用DSM的发射机。 更通常地，还教导了使用m级解复用DSM，因此说明书可以为本领域技术人员提供更广泛的应用。 考虑到本说明书及其公开的实施例的教导，可以根据本领域技术人员的特定应用的要求来增强发射机的效率和线性度中的至少一个。

    LEVEL DE-MULTEPLEXED DELTA SIGMA MODULATOR BASED TRANSMITTER
    6.
    发明申请
    LEVEL DE-MULTEPLEXED DELTA SIGMA MODULATOR BASED TRANSMITTER 审中-公开
    基于DE-MULTEPLEXED DELTA SIGMA调制器的发射机

    公开(公告)号：WO2015015476A2

    公开(公告)日：2015-02-05

    申请号：PCT/IB2014/063685

    申请日：2014-08-04

    Applicant: TELEFONAKTIEBOLAGET L M ERICSSON (PUBL) ,  MOJTABA, Ebrahimi ,  MORRIS, Bradley John ,  ELSAYED, Fahmi ,  HELAOUI, Mohamed ,  GHANNOUCHI, Fadhel

    Inventor： MOJTABA, Ebrahimi ,  MORRIS, Bradley John ,  ELSAYED, Fahmi ,  HELAOUI, Mohamed ,  GHANNOUCHI, Fadhel

    CPC classification number: H04B1/0475 ,  H03F1/02 ,  H03F3/24 ,  H03M3/02 ,  H03M3/50 ,  H03M7/302 ,  H03M7/3026 ,  H03M7/304 ,  H04B1/02 ,  H04B2001/045

    Abstract: This specification discloses a level de-multiplexed DSM based transmitter and a method for providing the same. Broadly embodiments of the present specification enable wireless transmitters that are based on multi-level de-multiplexed DSM. A three-level de- multiplexed DSM based transmitter is disclosed as an example. More generally, the use of m-level de-multiplexed DSM is also taught, the specification thereby being enabling for broader applications to a person skilled in the art. At least one of the efficiency and linearity of transmitters can be enhanced as required for specific applications by a person of skill in the art in view of this specification and the teachings of its disclosed embodiments.

    Abstract translation: 本说明书公开了一种基于电平解复用的基于DSM的发射机及其提供方法。 本说明书的广义实施例使得基于多级解复用DSM的无线发射机成为可能。 作为例子公开了三电平解复用基于DSM的发射机。 更一般地讲，还教导了使用m级解复用DSM，因此该说明书使得本领域技术人员能够进行更广泛的应用。 鉴于本说明书及其公开实施例的教导，本领域技术人员根据具体应用的需要可以增强发射器的效率和线性中的至少一个。

    PARALLEL MASH DELTA SIGMA MODULATOR
    8.
    发明申请
    PARALLEL MASH DELTA SIGMA MODULATOR 审中-公开
    并行MASH DELTA SIGMA调制器

    公开(公告)号：WO2011148359A3

    公开(公告)日：2012-02-23

    申请号：PCT/IB2011053289

    申请日：2011-07-22

    Applicant: ST ERICSSON SA ,  HOSSAIN RAZAK ,  POZSGAY ANDRAS

    Inventor： HOSSAIN RAZAK ,  POZSGAY ANDRAS

    IPC: H03M7/00

    CPC classification number: H03M7/302

    Abstract: A parallel, multi-stage noise shaping (MASH) de!fa-sigma (?S) modulator reduces the required operating frequency by predicting the inputs to later stages of a serial MASH modulator to be multiples of the MASH input. An Nth order parallel MASH ?S modulator generates N outputs (one from each stage) in a single modulator cycle. Accordingly, the Nth order parallel MASH ?S modulator may be operated at 1/N the frequency of a corresponding prior art Nth order serial MASH ?S modulator.

    Abstract translation: 通过将串行MASH调制器的后级的输入预测为MASH输入的倍数，并行多级噪声整形（MASH）de-fa-sigma（？S）调制器可以降低所需的工作频率。 第N级并联MASH？S调制器在单个调制器周期中产生N个输出（每级一个）。 因此，第N级并联MASH？S调制器可以以相应的现有技术的N阶串行MASH？S调制器的频率为1 / N。

    GENERATING BIT-STREAMS WITH HIGHER COMPRESSION GAINS
    10.
    发明申请
    GENERATING BIT-STREAMS WITH HIGHER COMPRESSION GAINS 审中-公开
    生成具有较高压缩增益的位流

    公开(公告)号：WO2005036756A1

    公开(公告)日：2005-04-21

    申请号：PCT/IB2004/052031

    申请日：2004-10-08

    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V. ,  JANSSEN, Erwin ,  REEFMAN, Derk

    Inventor： JANSSEN, Erwin ,  REEFMAN, Derk

    IPC: H03M7/00

    CPC classification number: H03M7/3006 ,  H03M3/35 ,  H03M3/458 ,  H03M3/50 ,  H03M7/302

    Abstract: A system (10) and method that generate bit-streams that result in higher compression gains. The system is akin to a normal 1-bit SDM. Internally, the system (10) tries to find the best possible bit sequence by tracing N possible solutions at every time instant. In an implementation, the system has N > I trellis path structures (20). Every path is used to track a possible output bitstream. The quality of a bitstream is determined by measuring the (frequency weighted) difference between input and output; it is this measure that is reduced or minimized.

    Abstract translation: 产生导致更高压缩增益的比特流的系统（10）和方法。 该系统类似于正常的1位SDM。 在内部，系统（10）尝试通过在每个时刻跟踪N个可能的解来找到最佳可能的位序列。 在一个实现中，系统具有N> I网格路径结构（20）。 每个路径用于跟踪可能的输出比特流。 通过测量输入和输出之间的（频率加权）差异来确定比特流的质量; 这是减少或最小化的措施。

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