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公开(公告)号：WO2020086850A2
公开(公告)日：2020-04-30
申请号：PCT/US2019/057869
申请日：2019-10-24
Applicant: FUNGIBLE, INC.
Inventor： GOYAL, Rajan , DIKSHIT, Abhishek Kumar , KUO, Chris Chinchia
Abstract: This disclosure describes a programmable device, referred to generally as a data processing unit, having multiple processing units for processing streams of information, such as network packets or storage packets. This disclosure also describes techniques that include enabling data durability coding on a network. In some examples, such techniques may involve storing data in fragments across multiple fault domains in a manner that enables efficient recovery of the data using only a subset of the data. Further, this disclosure describes techniques that include applying a unified approach to implementing a variety of durability coding schemes. In some examples, such techniques may involve implementing each of a plurality of durability coding and/or erasure coding schemes using a common matrix approach, and storing, for each durability and/or erasure coding scheme, an appropriate set of matrix coefficients.
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公开(公告)号：WO2020014392A1
公开(公告)日：2020-01-16
申请号：PCT/US2019/041246
申请日：2019-07-10
Applicant: FUNGIBLE, INC.
Inventor： BILLA, Satyanarayana Lakshmipathi , GOYAL, Rajan , DIKSHIT, Abhishek Kumar , YANG, Yi-Hua Edward , LADHANI, Sandipkumar J.
IPC: G06F9/448
Abstract: An example processing device includes a memory including a non-deterministic finite automata (NFA) buffer configured to store a plurality of instructions defining an ordered sequence of instructions of at least a portion of an NFA graph, the portion of the NFA graph comprising a plurality of nodes arranged along a plurality of paths. The NFA engine determines a current symbol and one or more subsequent symbols of a payload segment that satisfy a match condition specified by a subset of instructions of the plurality of instructions for a path of the plurality of paths and in response to determining the current symbol and the one or more subsequent symbols of the payload segment that satisfy the match condition, outputs an indication that the payload data has resulted in a match.
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公开(公告)号：WO2020092795A2
公开(公告)日：2020-05-07
申请号：PCT/US2019/059203
申请日：2019-10-31
Applicant: FUNGIBLE, INC.
Inventor： DIKSHIT, Abhishek Kumar , CRUZ-RIOS, Jorge , GOYAL, Rajan , BILLA, Satyanarayana Lakshmipathi
IPC: H04N19/13 , H04N19/91 , H04N19/436 , H04N19/42 , H04N19/18
Abstract: A device includes a memory configured to store image data and an image coding unit implemented in circuitry. The image coding unit is configured to code a first value of a first instance of a first syntax element of a first block of image data and determine a first context for coding a second value of a second instance of the first syntax element of a second block of the image data. The image coding unit is configured to context-based code the second value of the second instance of the first syntax element of the second block of the image data after coding the first value of the first instance of the first syntax element using the first context and code a third value of a first instance of a second syntax element of the first block in parallel with coding the second value or after coding the second value.
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公开(公告)号：WO2020092788A2
公开(公告)日：2020-05-07
申请号：PCT/US2019/059194
申请日：2019-10-31
Applicant: FUNGIBLE, INC.
Abstract: A highly programmable data processing unit includes multiple processing units for processing streams of information, such as network packets or storage packets. The data processing unit includes one or more specialized hardware accelerators configured to perform acceleration for various data-processing functions. The data processing unit is configured to retrieve speculative probability values for range coding a plurality of bits with a single read instruction to an on-chip memory that stores a table of probability values. The data processing unit is configured to store state information used for context-coding packets of a data stream so that the state information is available after switching between data streams.
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公开(公告)号：WO2020086850A3
公开(公告)日：2020-04-30
申请号：PCT/US2019/057869
申请日：2019-10-24
Applicant: FUNGIBLE, INC.
Inventor： GOYAL, Rajan , DIKSHIT, Abhishek Kumar , KUO, Chris Chinchia
Abstract: This disclosure describes a programmable device, referred to generally as a data processing unit, having multiple processing units for processing streams of information, such as network packets or storage packets. This disclosure also describes techniques that include enabling data durability coding on a network. In some examples, such techniques may involve storing data in fragments across multiple fault domains in a manner that enables efficient recovery of the data using only a subset of the data. Further, this disclosure describes techniques that include applying a unified approach to implementing a variety of durability coding schemes. In some examples, such techniques may involve implementing each of a plurality of durability coding and/or erasure coding schemes using a common matrix approach, and storing, for each durability and/or erasure coding scheme, an appropriate set of matrix coefficients.
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Patent Agency Ranking6.发明申请
公开(公告)号：WO2020106968A1
公开(公告)日：2020-05-28
申请号：PCT/US2019/062630
申请日：2019-11-21
Applicant: FUNGIBLE, INC.
Inventor： GOYAL, Rajan , BILLA, Satyanarayana Lakshmipathi
IPC: G06F9/50
Abstract: This disclosure describes techniques that include establishing a service chain of operations that are performed on a network packet as a sequence of operations. In one example, this disclosure describes a method that includes storing, by a data processing unit integrated circuit, a plurality of work unit frames in a work unit stack representing a plurality of service chain operations, including a first service chain operation, a second service chain operation, and a third service chain operation; executing, by the data processing unit integrated circuit, the first service chain operation, wherein executing the first service chain operation generates operation data; determining, by the data processing unit integrated circuit and based on the operation data, whether to perform the second service chain operation; and executing, by the data processing unit integrated circuit, the third service chain operation after skipping the second service chain operation.
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7.发明申请
公开(公告)号：WO2020106626A1
公开(公告)日：2020-05-28
申请号：PCT/US2019/062026
申请日：2019-11-18
Applicant: FUNGIBLE, INC.
Inventor： BECKMAN, Edward David , BILLA, Satyanarayana Lakshmipathi , GOYAL, Rajan , LADHANI, Sandipkumar J.
IPC: H03M7/30 , H04L29/08 , G06F9/54 , G06F12/08 , G06F15/173 , G06F16/903
Abstract: A highly programmable device, referred to generally as a data processing unit, having multiple processing units for processing streams of information, such as network packets or storage packets, is described. The data processing unit includes one or more specialized hardware accelerators configured to perform acceleration for various data-processing functions. This disclosure describes a hardware-based programmable data compression accelerator for the data processing unit including a pipeline for performing string substitution. The disclosed string substitution pipeline, referred to herein as a "search block," is configured to perform string search and replacement functions to compress an input data stream. In some examples, the search block is a part of a compression process performed by the data compression accelerator. The search block may support single and multi-thread processing, and multiple levels of compression effort. To achieve high-throughput, the search block processes multiple input bytes per clock cycle per thread.
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公开(公告)号：WO2020092795A3
公开(公告)日：2020-05-07
申请号：PCT/US2019/059203
申请日：2019-10-31
Applicant: FUNGIBLE, INC.
Inventor： DIKSHIT, Abhishek Kumar , CRUZ-RIOS, Jorge , GOYAL, Rajan , BILLA, Satyanarayana Lakshmipathi
IPC: H04N19/13 , H04N19/91 , H04N19/436 , H04N19/42 , H04N19/18 , G06F16/901 , H04N19/423
Abstract: A device includes a memory configured to store image data and an image coding unit implemented in circuitry. The image coding unit is configured to code a first value of a first instance of a first syntax element of a first block of image data and determine a first context for coding a second value of a second instance of the first syntax element of a second block of the image data. The image coding unit is configured to context-based code the second value of the second instance of the first syntax element of the second block of the image data after coding the first value of the first instance of the first syntax element using the first context and code a third value of a first instance of a second syntax element of the first block in parallel with coding the second value or after coding the second value.
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公开(公告)号：WO2019014237A1
公开(公告)日：2019-01-17
申请号：PCT/US2018/041464
申请日：2018-07-10
Applicant: FUNGIBLE, INC.
Inventor： SINDHU, Pradeep , FRAILONG, Jean-Marc , SERLET, Bertrand , NOUREDDINE, Wael , MARTI, Felix A. , GOEL, Deepak , KIM, Paul , GOYAL, Rajan , ZHOU, Aibing
IPC: H04L12/931 , H04L12/933 , H04L12/46 , H04L12/937
Abstract: A highly-programmable access node is described that can be configured and optimized to perform input and output (I/O) tasks, such as storage and retrieval of data to and from storage devices (such as solid state drives), networking, data processing, and the like. For example, the access node may be configured to execute a large number of data I/O processing tasks relative to a number of instructions that are processed. The access node may be highly programmable such that the access node may expose hardware primitives for selecting and programmatically configuring data processing operations. As one example, the access node may be used to provide high-speed connectivity and I/O operations between and on behalf of computing devices and storage components of a network, such as for providing interconnectivity between those devices and a switch fabric of a data center.
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10.发明申请
公开(公告)号：WO2020150379A1
公开(公告)日：2020-07-23
申请号：PCT/US2020/013726
申请日：2020-01-15
Applicant: FUNGIBLE, INC.
Inventor： THOMAS, Philip A. , BECKMAN, Edward David , GOYAL, Rajan , BILLA, Satyanarayana Lakshmipathi
Abstract: A highly programmable device, referred to generally as a data processing unit, having multiple processing units for processing streams of information, such as network packets or storage packets, is described. The data processing unit includes one or more specialized hardware accelerators configured to perform acceleration for various data-processing functions. This disclosure describes a parallel decoding of codewords within input data stream based on a codeword type and position.
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