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公开(公告)号:WO2016105720A1
公开(公告)日:2016-06-30
申请号:PCT/US2015/061616
申请日:2015-11-19
申请人: INTEL CORPORATION
发明人: KEPPEL, David , KELM, John
CPC分类号: G06F9/48 , G06F8/52 , G06F9/3004 , G06F9/30043 , G06F12/1009
摘要: A processor includes a binary translator, a memory management unit, and a monitor unit. The binary translator includes logic to translate a region of code and to reorder translated instructions within the region to produce a transaction. The memory management unit includes logic to receive a memory instruction from the transaction to access an address in memory, determine whether the address is associated with a previous page table walk during execution of the transaction based on bits set for addresses during the previous page table walk, and allow execution of the memory instruction based upon the determination whether the address is associated with the previous page table walk. The monitor unit includes logic to specify whether a given address is associated with the previous page table walk during execution of the transaction.
摘要翻译: 处理器包括二进制转换器,存储器管理单元和监视器单元。 二进制翻译器包括翻译代码区域并重新排序该区域内的翻译指令以产生事务的逻辑。 存储器管理单元包括用于接收来自事务的存储器指令以访问存储器中的地址的逻辑,基于在前一页表步行期间为地址设置的位来确定该地址是否在执行事务期间与先前的页表行走相关联 并且基于确定地址是否与先前的页表行走相关联来允许执行存储器指令。 监视器单元包括用于指定在执行交易期间给定地址是否与前一页表行走相关联的逻辑。
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公开(公告)号:WO2018118271A1
公开(公告)日:2018-06-28
申请号:PCT/US2017/061422
申请日:2017-11-14
申请人: INTEL CORPORATION
IPC分类号: G06F11/30
CPC分类号: H04L49/901 , H04L43/022 , H04L43/08 , H04L43/10 , H04L43/16
摘要: Particular embodiments described herein provide for a network element that can be configured to receive a request message, wherein the request message includes a read trigger, an indicator selector, and a completion trigger, determine an indicator that relates to the indicator selector, and perform an action when the read trigger is activated.
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公开(公告)号:WO2017112260A1
公开(公告)日:2017-06-29
申请号:PCT/US2016/063342
申请日:2016-11-22
申请人: INTEL CORPORATION
发明人: ZAK, Robert C. , KEPPEL, David , DINAN, James
IPC分类号: H04L12/26
CPC分类号: H04L43/106 , H04L43/028 , H04L43/04 , H04L43/0876 , H04L45/26
摘要: Technologies for tracing network performance include a network computing device configured to receive a network packet from a source endpoint node, process the received network packet, capture trace data corresponding to the network packet as it is processed by the network computing device, and transmit the received network packet to a target endpoint node. The network computing device is further configured to generate a trace data network packet that includes at least a portion of the captured trace data and transmit the trace data network packet to the destination endpoint node. The destination endpoint node is configured to monitor performance of the network by reconstructing a trace of the network packet based on the trace data of the trace data network packet. Other embodiments are described herein.
摘要翻译: 用于跟踪网络性能的技术包括网络计算设备,该网络计算设备被配置为从源端点节点接收网络分组,处理所接收的网络分组,捕获与由网络分组处理的网络分组相对应的跟踪数据 网络计算设备,并且将接收到的网络分组传输到目标端点节点。 网络计算设备还被配置为生成包括捕获的跟踪数据的至少一部分的跟踪数据网络分组,并将跟踪数据网络分组发送到目的地端点节点。 目标端点节点被配置为通过基于跟踪数据网络分组的跟踪数据重建网络分组的跟踪来监视网络的性能。 这里描述了其他实施例。 p>
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公开(公告)号:WO2017112301A1
公开(公告)日:2017-06-29
申请号:PCT/US2016/063592
申请日:2016-11-23
申请人: INTEL CORPORATION
发明人: KEPPEL, David , DINAN, James , ZAK, Robert C.
IPC分类号: H04L12/26 , H04L12/801 , H04L12/861
CPC分类号: H04L43/062 , H04L43/028 , H04L43/12 , H04L49/25 , H04L69/22
摘要: Technologies for tracing network performance in a high performance computing (HPC) network include a network computing device configured to receive a network packet from a source endpoint node and store the header and trace data of the received network packet to a trace buffer of the network computing device. The network computing device is further configured to retrieve updated trace data from the trace buffer and update the trace data portion of the network packet to include the retrieved updated trace data from the trace buffer. Additionally, the network computing device is configured to transmit the updated network packet to a target endpoint node, in which the trace data of the updated network packet is usable by the target endpoint node to determine inline performance of the network relative to a flow of the network packet. Other embodiments are described and claimed herein.
摘要翻译: 用于在高性能计算(HPC)网络中跟踪网络性能的技术包括网络计算设备,该网络计算设备被配置为从源端点节点接收网络分组并且存储所接收的网络分组的头部和跟踪数据 到网络计算设备的跟踪缓冲器。 网络计算设备还被配置为从跟踪缓冲器中检索更新的跟踪数据,并更新网络分组的跟踪数据部分以包括来自跟踪缓冲器的检索的更新跟踪数据。 此外,网络计算设备被配置为将更新的网络分组传输到目标端点节点,其中更新的网络分组的追踪数据可由目标端点节点使用以确定网络相对于 网络数据包。 这里描述和要求保护其他实施例。 p>
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公开(公告)号:WO2017052973A1
公开(公告)日:2017-03-30
申请号:PCT/US2016/048682
申请日:2016-08-25
申请人: INTEL CORPORATION
发明人: DINAN, James , KEPPEL, David
IPC分类号: H04L12/26
CPC分类号: H04L43/0876 , H04L43/0864 , H04L43/10 , H04L43/106 , H04L43/12 , H04L67/10 , H04L67/1004 , H04L67/22 , H04L69/40
摘要: Technologies for monitoring communication performance of a high performance computing (HPC) network include a performance probing engine of a source endpoint node of the HPC network. The performance probing engine is configured to generate a probe request that includes a timestamp of the probe request and transmit the probe request to a destination endpoint node of the HPC network communicatively coupled to the source endpoint node via the HPC network. The performance probing engine is additionally configured to receive a probe response from the destination endpoint node via the HPC network and to generate another timestamp that corresponds to the probe request having been received. Further, the performance probing engine is configured to determine a round-trip latency as a function of the probe request and probe response timestamps. Other embodiments are described and claimed.
摘要翻译: 用于监视高性能计算(HPC)网络的通信性能的技术包括HPC网络的源端点节点的性能探测引擎。 性能探测引擎被配置为生成包括探测请求的时间戳的探测请求,并且经由HPC网络将探测请求发送到通信地耦合到源端点节点的HPC网络的目的地端点节点。 性能探测引擎还被配置为经由HPC网络从目的地端点节点接收探测响应,并且生成对应于已经接收的探测请求的另一时间戳。 此外,性能探测引擎被配置为根据探测请求和探测响应时间戳确定往返延迟。 描述和要求保护其他实施例。
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公开(公告)号:WO2017112346A1
公开(公告)日:2017-06-29
申请号:PCT/US2016/063795
申请日:2016-11-26
申请人: INTEL CORPORATION
IPC分类号: G06F13/40
CPC分类号: H04L49/35 , G06F15/17331
摘要: In an example, there is disclosed a compute node, comprising: first one or more logic elements comprising a data producer engine to produce a datum; and a host fabric interface to communicatively couple the compute node to a fabric, the host fabric interface comprising second one or more logic elements comprising a data pulling engine, the data pulling engine to: publish the datum as available; receive a pull request for the datum, the pull request comprising a node identifier for a data consumer; and send the datum to the data consumer via the fabric. There is also disclosed a method of providing a data pulling engine.
摘要翻译: 在一个示例中,公开了一种计算节点,包括:第一个或多个逻辑元件,包括数据生成器引擎以生成数据; 以及将所述计算节点通信地耦合到结构的主机结构接口,所述主机结构接口包括第二一个或更多个逻辑元件,所述第二一个或更多个逻辑元件包括数据牵引引擎,所述数据牵引引擎:将所述数据公布为可用; 接收对所述数据的拉取请求,所述拉取请求包括数据消费者的节点标识符; 并通过结构将数据发送给数据使用者。 还公开了一种提供数据牵引引擎的方法。 p>
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公开(公告)号:WO2017105558A3
公开(公告)日:2017-06-22
申请号:PCT/US2016/048162
申请日:2016-08-23
申请人: INTEL CORPORATION
IPC分类号: H04L12/26 , H04L12/863
摘要: Technologies for aggregation-based message processing include multiple computing nodes in communication over a network. A computing node receives a message from a remote computing node, increments an event counter in response to receiving the message, determines whether an event trigger is satisfied in response to incrementing the counter, and writes a completion event to an event queue if the event trigger is satisfied. An application of the computing node monitors the event queue for the completion event. The application may be executed by a processor core of the computing node, and the other operations may be performed by a host fabric interface of the computing node. The computing node may be a target node and count one-sided messages received from an initiator node, or the computing node may be an initiator node and count acknowledgement messages received from a target node. Other embodiments are described and claimed.
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公开(公告)号:WO2021162787A1
公开(公告)日:2021-08-19
申请号:PCT/US2020/066484
申请日:2020-12-21
申请人: INTEL CORPORATION
发明人: FARGO, Farah E. , DIAMOND, Mitchell , KEPPEL, David , SURY, Samantika S. , PHAM, Binh , VISSAPRAGADA, Shobha
IPC分类号: G06F12/1027
摘要: Examples described herein relate to a computing system supporting custom page sized ranges for an application to map contiguous memory regions instead of many smaller sized pages. An application can request a custom range size. An operating system can allocate a contiguous physical memory region to a virtual address range by specifying a custom range sizes that are larger or smaller than the normal general page sizes. Virtual-to-physical address translation can occur using an address range circuitry and translation lookaside buffer in parallel. The address range circuitry can determine if a custom entry is available to use to identify a physical address translation for the virtual address. Physical address translation can be performed by transforming the virtual address in some examples.
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公开(公告)号:WO2017172216A1
公开(公告)日:2017-10-05
申请号:PCT/US2017/020229
申请日:2017-03-01
申请人: INTEL CORPORATION
CPC分类号: H04L67/1008
摘要: Technologies for dynamic work queue management include a producer computing device communicatively coupled to a consumer computing device. The consumer computing device is configured to transmit a pop request (e.g., a one-sided pull request) that includes consumption constraints indicating an amount of work (e.g., a range of acceptable fraction of work elements to return from a work queue of the producer computing device) to pull from the producer computing device. The producer computing device is configured to determine whether the pop request can be satisfied and generate a response that includes an indication of the result of the determination and one or more producer metrics usable by the consumer computing device to determine a subsequent action to be performed by the consumer computing device upon receipt of the response message. Other embodiments are described and claimed herein.
摘要翻译: 用于动态工作队列管理的技术包括通信地耦合到消费者计算设备的生产者计算设备。 消费者计算设备被配置为传输包括指示工作量(例如,从生产者的工作队列返回的工作元素的可接受部分的范围)的消耗约束的弹出请求(例如,单侧拉取请求) 计算设备)从生产者计算设备拉出。 生产者计算设备被配置为确定是否可以满足弹出请求并且生成包括确定结果的指示和消费者计算设备可用于确定将由(多个)生成器执行的后续动作的一个或多个生成器度量的响应 消费者计算设备一旦接收到响应消息。 这里描述和要求保护其他实施例。 p>
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公开(公告)号:WO2017105558A2
公开(公告)日:2017-06-22
申请号:PCT/US2016/048162
申请日:2016-08-23
申请人: INTEL CORPORATION
IPC分类号: H04L12/26 , H04L12/863
摘要: Technologies for aggregation-based message processing include multiple computing nodes in communication over a network. A computing node receives a message from a remote computing node, increments an event counter in response to receiving the message, determines whether an event trigger is satisfied in response to incrementing the counter, and writes a completion event to an event queue if the event trigger is satisfied. An application of the computing node monitors the event queue for the completion event. The application may be executed by a processor core of the computing node, and the other operations may be performed by a host fabric interface of the computing node. The computing node may be a target node and count one-sided messages received from an initiator node, or the computing node may be an initiator node and count acknowledgement messages received from a target node. Other embodiments are described and claimed.
摘要翻译: 用于基于聚合的消息处理的技术包括通过网络进行通信的多个计算节点。 计算节点接收来自远程计算节点的消息,响应于接收到消息而增加事件计数器,响应于增加计数器来确定是否满足事件触发器,并且如果事件触发器将事件队列写入到事件队列 满意。 计算节点的应用程序监视完成事件的事件队列。 应用可以由计算节点的处理器核心执行,并且其他操作可以由计算节点的主机结构接口执行。 计算节点可以是目标节点并且计数从发起者节点接收到的单侧消息,或者计算节点可以是发起者节点并且计数从目标节点接收的确认消息。 描述并要求保护其他实施例。 p>
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