SCALABLE MPEG-2 VIDEO DECODER
    1.
    发明申请
    SCALABLE MPEG-2 VIDEO DECODER 审中-公开
    SCALABLE MPEG-2视频解码器

    公开(公告)号:WO0239750A3

    公开(公告)日:2002-09-19

    申请号:PCT/EP0112902

    申请日:2001-11-02

    CPC classification number: H04N19/577 H04N19/156 H04N19/42 H04N19/61 H04N19/90

    Abstract: A system and method for scaling an MPEG-2 video decoder subject to a resource constraint. A decoder system is provided for decoding compressed video data arranged in a group of pictures, wherein the group of pictures include I pictures, P pictures and B pictures. The system comprises a processing path for decoding an error residual associated with the group of pictures, and a filtering system for preventing the error residual associated with B pictures from being decoded by the processing path. The decoder system may further comprise a system for selectively enabling the filtering system for B pictures having a DC coefficient that is below a predetermined threshold.

    Abstract translation: 用于缩放受资源约束的MPEG-2视频解码器的系统和方法。 解码器系统被提供用于解码排列在一组图像中的压缩视频数据,其中图像组包括I图像,P图像和B图像。 该系统包括用于解码与该组图像相关联的错误残差的处理路径,以及用于防止与B图像相关联的错误残差被处理路径解码的滤波系统。 解码器系统还可以包括用于选择性地使能具有低于预定阈值的DC系数的B图像的滤波系统的系统。

    EFFICIENT VIDEO DATA ACCESS USING FIXED RATIO COMPRESSION
    2.
    发明申请
    EFFICIENT VIDEO DATA ACCESS USING FIXED RATIO COMPRESSION 审中-公开
    使用固定比例压缩的高效视频数据访问

    公开(公告)号:WO0182628A3

    公开(公告)日:2002-02-28

    申请号:PCT/EP0103942

    申请日:2001-04-06

    Inventor: PENG SHAOMIN

    CPC classification number: H04N19/98

    Abstract: A data organization and access scheme for permitting easier location of a reference macroblock during motion compensation and for providing a video output system with output data. The frames are segmented into coding blocks comprising a small number of horizontally adjunct blocks compressed to a fixed length. Within each coding block, only two quantization strategies are employed so that the start and end position of any coding block is easily ascertained as well as the location of any individual block within the coding block.

    Abstract translation: 一种数据组织和访问方案,用于在运动补偿期间更容易地定位参考宏块,并为视频输出系统提供输出数据。 帧被分割成包括被压缩到固定长度的少量水平附加块的编码块。 在每个编码块内,仅采用两种量化策略,使得容易确定任何编码块的开始和结束位置以及编码块内的任何单独块的位置。

    AN APPROXIMATE IDCT FOR SCALABLE VIDEO DECODING
    3.
    发明申请
    AN APPROXIMATE IDCT FOR SCALABLE VIDEO DECODING 审中-公开
    用于可扩展视频解码的大量IDCT

    公开(公告)号:WO0251160A3

    公开(公告)日:2003-01-03

    申请号:PCT/IB0102309

    申请日:2001-12-05

    Abstract: A method of scaling image and video processing computational complexity in accordance with maximum available quantities of computational resource units, the method including the steps of: performing a plurality of data multiplications which processes digital image and video data, each data multiplication having a data dependent value multiplied by data independent value, the performance of each data multiplication requiring a predetermined quantity of computational resource units; selecting one of the data multiplications; selecting a shift/add-, a shift/subtract or a shift-operation using the data independent value associated with the selected multiplication that requires a quantity of computational resource units which is less than the predetermined quantity of computational resource units required for performing the selected multiplication; and performing the selected multiplication with the selected operation. Also, a decoder which scales video and still image decoding computational complexity with available computational resources. The decoder includes a variable length decoder; an inverse quantizer which dequantizes signals received from the variable length decoder; an approximate inverse discrete cosine transform that scales decoding computational complexity in accordance with the above method; and a motion compensator.

    Abstract translation: 一种根据计算资源单元的最大可用量来缩放图像和视频处理计算复杂度的方法,所述方法包括以下步骤:执行处理数字图像和视频数据的多个数据乘法,每个数据乘法具有数据相关值 乘以数据独立值,每次数据乘法的性能需要预定量的计算资源单元; 选择一个数据乘法; 使用与选择的乘法相关联的与数据无关的值来选择移位/加法,移位/减法或移位操作,其需要少于执行所选择的所需的计算资源单元的预定量的计算资源单元 乘法; 以及用所选择的操作执行所选择的乘法。 另外,一种使用可用的计算资源来缩放视频和静止图像解码计算复杂度的解码器。 解码器包括可变长度解码器; 逆量化器,其对从可变长度解码器接收的信号进行去量化; 根据上述方法缩放解码计算复杂度的近似离散余弦变换; 和运动补偿器。

    METHOD OF RUNNING AN ALGORITHM AND A SCALABLE PROGRAMMABLE PROCESSING DEVICE
    4.
    发明申请
    METHOD OF RUNNING AN ALGORITHM AND A SCALABLE PROGRAMMABLE PROCESSING DEVICE 审中-公开
    运行算法的方法和可扩展的可编程处理设备

    公开(公告)号:WO0219095A3

    公开(公告)日:2002-06-13

    申请号:PCT/EP0109691

    申请日:2001-08-22

    Abstract: Nowadays, programmable components (1304), rather than dedicated single-function components can perform continuous media processing in consumer devices, like digital television sets (1310), set-top boxes, PCs, or VCRs. The media processing algorithms that are written for those programmable components (1304), must be designed to provide a plurality of output quality levels in exchange for required processing resources. Since resources are finite, the media processing algorithms must be controlled in their resource usage and the output quality level they provide. Users of consumer devices do not like to see major changes in the quality of, for example, a video they are watching. Therefore, typical algorithm characteristics like the functions an algorithm comprises, the resource usage per function and the quality level per function are used to provide smoother quality transitions.

    Abstract translation: 如今,可编程组件(1304)而不是专用单功能组件可以在消费者设备(如数字电视机(1310),机顶盒,PC或VCR)中执行连续媒体处理。 为这些可编程组件(1304)编写的媒体处理算法必须被设计成提供多个输出质量等级以交换所需的处理资源。 由于资源有限,媒体处理算法必须控制其资源使用情况和它们提供的输出质量水平。 消费者设备的用户不喜欢看到他们正在观看的视频的质量发生重大变化。 因此,典型的算法特征(例如算法的功能包括),每个功能的资源使用和每个功能的质量水平被用于提供更平滑的质量转换。

    SCALABLE MPEG-2 VIDEO DECODER WITH SELECTIVE MOTION COMPENSATION
    5.
    发明申请
    SCALABLE MPEG-2 VIDEO DECODER WITH SELECTIVE MOTION COMPENSATION 审中-公开
    具有选择性运动补偿的可扩展MPEG-2视频解码器

    公开(公告)号:WO02080571A3

    公开(公告)日:2003-01-09

    申请号:PCT/IB0200801

    申请日:2002-03-15

    Abstract: A decoder system having a motion compensation system that scales the processing of B pictures in order to save computational resources. The motion compensation system has a first scaling system that comprises: a system for comparing a motion vector magnitude of each macroblock in a B picture with a predetermined threshold; a system for performing a routine decoding operation for each macroblock in which the motion vector magnitude is greater than the predetermined threshold; and a system for copying a corresponding macroblock from a previous picture for each macroblock in which the motion vector magnitude is less than or equal to the predetermined threshold. The motion compensation system has a second scaling system that comprises: a system for calculating an average motion vector magnitude for a first B picture; and a system for replacing a next contiguous B picture with the first B picture if the average motion vector magnitude is less than or equal to a predetermined threshold. The second scaling system may also comprise: a system for calculating an average motion vector magnitude for a reference picture; and a system for replacing a B picture with the reference picture if the average motion vector magnitude is less than or equal to a predetermined threshold.

    Abstract translation: 一种具有运动补偿系统的解码器系统,其对B图像的处理进行缩放以节省计算资源。 运动补偿系统具有第一缩放系统,其包括:用于将B图像中的每个宏块的运动矢量幅度与预定阈值进行比较的系统; 用于对运动矢量幅度大于预定阈值的每个宏块执行例程解码操作的系统; 以及用于从运动矢量幅度小于或等于预定阈值的每个宏块复制来自前一图像的对应宏块的系统。 运动补偿系统具有第二缩放系统,其包括:用于计算第一B图像的平均运动矢量幅度的系统; 以及如果平均运动矢量幅度小于或等于预定阈值,则用第一B图像替换下一连续B图像的系统。 第二缩放系统还可以包括:用于计算参考图片的平均运动矢量幅度的系统; 以及如果平均运动矢量幅度小于或等于预定阈值,则用参考图像替换B图像的系统。

    MATRIX STRUCTURE BASED LED ARRAY
    6.
    发明申请
    MATRIX STRUCTURE BASED LED ARRAY 审中-公开
    基于矩阵结构的LED阵列

    公开(公告)号:WO0173735A3

    公开(公告)日:2001-12-20

    申请号:PCT/EP0101964

    申请日:2001-02-21

    CPC classification number: H05B33/0821 H05B33/0803 Y10S362/80

    Abstract: A matrix structure-based light-emitting diode array includes a plurality of input resistances connected in parallel to one terminal of a current source, and a plurality of output resistances connected in parallel to another terminal of a current source. Light-emitting diodes are then used to connect each of the input resistances to each of the output resistances. Arranged as such, no two light-emitting diodes are connected in parallel and, as such, the failure of any one light-emitting diode does not extinguish any of the other light-emitting diodes.

    Abstract translation: 基于矩阵结构的发光二极管阵列包括并联连接到电流源的一个端子的多个输入电阻以及与电流源的另一个端子并联连接的多个输出电阻。 然后使用发光二极管将每个输入电阻连接到每个输出电阻。 像这样布置,没有两个发光二极管并联连接,因此,任何一个发光二极管的故障都不会熄灭任何其他发光二极管。

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