公开(公告)号：WO1995006936A1

公开(公告)日：1995-03-09

申请号：PCT/US1994009892

申请日：1994-09-01

Applicant: MEDIA VISION, INC.

Inventor： MEDIA VISION, INC. ,  COLVIN, Bryan, J., Sr. ,  COOK, Perry, R.

IPC: G10H01/02

CPC classification number: G10H5/007 ,  G10H2210/271 ,  G10H2250/441 ,  G10H2250/521

Abstract: Synthesizer models for emulating musical instruments are improved to take into account sympathetic string vibrations. One embodiment of the present invention scales an output signal from a sound synthesis model (220) and uses the scaled signal as an input signal for a number of single-string emulators (201-212) causing the single-string emulators to produce sound signals corresponding to sympathetic string vibrations. The output signals from the synthesis model (220) and from all of the single-string emulators (201-212) are added together. Another embodiment employs an octave's worth of single-string emulators to emulate the lower strings of an emulated instrument. Still another embodiment is a synthesizer which includes an input bus (220A) for accepting a sound signal, scaling means (244), a plurality of single-string emulators, and means for summing output signals from the string emulators. Embodiments preferably employ waveguide synthesis or the plucked string model to emulate single strings.

Abstract translation: 用于仿真乐器的合成器模型得到改进，以考虑到同情弦的振动。 本发明的一个实施例对来自声音合成模型（220）的输出信号进行缩放，并且将缩放的信号用作多个单串模拟器（201-212）的输入信号，从而使单串模拟器产生声音信号 对应于交感神经刺激。 来自合成模型（220）和所有单串模拟器（201-212）的输出信号被加在一起。 另一个实施例使用八度音阶的单串仿真器来模拟仿真乐器的较低弦。 另一个实施例是一种合成器，其包括用于接收声音信号的输入总线（220A），缩放装置（244），多个单串仿真器，以及用于对来自串式仿真器的输出信号求和的装置。 实施例优选地采用波导合成或采摘串模型来模拟单个串。

公开(公告)号：WO1995027940A1

公开(公告)日：1995-10-19

申请号：PCT/US1995004356

申请日：1995-04-06

Applicant: MEDIA VISION, INC.

Inventor： MEDIA VISION, INC. ,  COOK, Perry, R. ,  COLVIN, Bryan, J., Sr.

IPC: G06F07/556

CPC classification number: G06F7/556 ,  G10H1/0575 ,  G10H7/12

Abstract: Exponential and pseudo-exponential decay function values are generated by scaling a fractional decrease per sampling period by a previous decay function value and then subtracting the scaled fractional decrease from the previous decay function value. In one embodiment, a multiplier multiplies the fractional decrease by the previous decay function value and provides a product signal representing the scaled fractional decrease. An adder subtracts the scaled fractional decrease from the previous decay function value. In another embodiment, a shift block replaces the multiplier and approximates multiplication by a binary shift of the fractional decrease. The size of the shift is determined by the previous magnitude of the decay function as indicated by a priority encoder. Shifting generates a pseudo-exponential decay function which is suitable for music synthesis and can be generated quickly using less expensive hardware.

Abstract translation: 指数和伪指数衰减函数值是通过以前一个衰减函数值缩放每个采样周期的分数下降，然后从前一个衰减函数值中减去缩放的分数下降来生成的。 在一个实施例中，乘法器将分数减小乘以先前衰减函数值，并提供表示缩放分数下降的乘积信号。 加法器从前一个衰减函数值中减去缩放的分数下降。 在另一个实施例中，移位块代替乘法器并通过分数减小的二进制移位近似乘法。 移位的大小由优先级编码器指示的衰减函数的先前幅度确定。 移位产生适合于音乐合成的伪指数衰减函数，可以使用较便宜的硬件快速生成。

公开(公告)号：WO1995027939A1

公开(公告)日：1995-10-19

申请号：PCT/US1995004354

申请日：1995-04-06

Applicant: MEDIA VISION, INC.

Inventor： MEDIA VISION, INC. ,  COLVIN, Bryan, J., Sr. ,  GOCHNAUER, Daniel, B. ,  COOK, Perry, R.

IPC: G06F07/38

CPC classification number: G10H7/004 ,  G06F15/7857 ,  G10H2250/211

Abstract: A self-contained fully programmable digital signal processor (100) has two processors (101, 102) sharing, in parallel interleave fashion, a math unit (103) such as a multiply-and-accumulate circuit. A background processor (102) controls an external dram and preprocesses the information for a foreground processor (101). On-chip sram (107, 110) stores program parameters for both the foreground and background processors and facilitate information transfer between the foreground and background processors. The sram is time-multiplexed to permit access by the foreground processor, the background processor, and external devices without the expense of multiport sram. Flip-flops maintain data signals to the math unit while the sram is being accessed. The foreground processor has a custom instruction set that optimizes the implementation of complex music synthesis filter structures. An on-chip white noise generator quickly provides pseudorandom data for some of the instructions.

Abstract translation: 独立的完全可编程数字信号处理器（100）具有以并行交错方式共享诸如乘法和累加电路的数学单元（103）的两个处理器（101,102）。 背景处理器（102）控制外部电视并预处理前景处理器（101）的信息。 片上sram（107,110）存储前台和后台处理器的程序参数，并促进前台和后台处理器之间的信息传输。 sram被时分复用以允许前台处理器，后台处理器和外部设备的访问，而不需要多端口sram的费用。 触发器在访问sram时将数据信号保留到数学单元。 前台处理器具有自定义指令集，可以优化复杂音乐合成滤波器结构的实现。 片上白噪声发生器可以快速提供某些指令的伪随机数据。

公开(公告)号：WO1995006859A1

公开(公告)日：1995-03-09

申请号：PCT/US1994009887

申请日：1994-09-01

Applicant: MEDIA VISION, INC.

Inventor： MEDIA VISION, INC. ,  COLVIN, Bryan, J., Sr. ,  COOK, Perry, R. ,  GOCHNAUER, Daniel

IPC: G01H01/12

CPC classification number: G10H1/057 ,  G10H1/125

Abstract: Synthesizer models for emulating musical instruments can be improved using an analysis model that compares the output signal (Y') of the model to a recording (S) of a desired sound and derives a residual signal (delta) that can be used to correct the model. When the original model is a good one, the residual signal is small and takes much less memory to store than is required for a sampled sound.

Abstract translation: 可以使用将模型的输出信号（Y'）与期望声音的记录（S）进行比较的分析模型来改进用于模拟乐器的合成器模型，并且导出可用于校正乐谱的残差信号（delta） 模型。 当原始模型是好的时候，剩余信号很小，并且比采样声音需要的存储空间要少得多。