公开(公告)号：WO1995027939A1

公开(公告)日：1995-10-19

申请号：PCT/US1995004354

申请日：1995-04-06

Applicant: MEDIA VISION, INC.

Inventor： MEDIA VISION, INC. ,  COLVIN, Bryan, J., Sr. ,  GOCHNAUER, Daniel, B. ,  COOK, Perry, R.

IPC: G06F07/38

CPC classification number: G10H7/004 ,  G06F15/7857 ,  G10H2250/211

Abstract: A self-contained fully programmable digital signal processor (100) has two processors (101, 102) sharing, in parallel interleave fashion, a math unit (103) such as a multiply-and-accumulate circuit. A background processor (102) controls an external dram and preprocesses the information for a foreground processor (101). On-chip sram (107, 110) stores program parameters for both the foreground and background processors and facilitate information transfer between the foreground and background processors. The sram is time-multiplexed to permit access by the foreground processor, the background processor, and external devices without the expense of multiport sram. Flip-flops maintain data signals to the math unit while the sram is being accessed. The foreground processor has a custom instruction set that optimizes the implementation of complex music synthesis filter structures. An on-chip white noise generator quickly provides pseudorandom data for some of the instructions.

Abstract translation: 独立的完全可编程数字信号处理器（100）具有以并行交错方式共享诸如乘法和累加电路的数学单元（103）的两个处理器（101,102）。 背景处理器（102）控制外部电视并预处理前景处理器（101）的信息。 片上sram（107,110）存储前台和后台处理器的程序参数，并促进前台和后台处理器之间的信息传输。 sram被时分复用以允许前台处理器，后台处理器和外部设备的访问，而不需要多端口sram的费用。 触发器在访问sram时将数据信号保留到数学单元。 前台处理器具有自定义指令集，可以优化复杂音乐合成滤波器结构的实现。 片上白噪声发生器可以快速提供某些指令的伪随机数据。