公开(公告)号：WO2020185248A1

公开(公告)日：2020-09-17

申请号：PCT/US2019/043106

申请日：2019-07-23

Applicant: MICROSEMI SOC CORP.

Inventor： XUE, Fengliang ,  DHAOUI, Fethi ,  SINGARAJU, Pavan ,  NGUYEN, Victor ,  MCCOLLUM, John, L. ,  HECHT, Volker

IPC: G11C11/412 ,  G11C5/00 ,  G11C13/00 ,  G11C14/00 ,  G11C11/00 ,  G11C29/00 ,  G11C29/42 ,  G11C29/44 ,  G11C29/52 ,  H01L45/00 ,  G11C29/04

Abstract: A single-event-upset (SEU) stabilized memory cell includes a latch portion including a cross-coupled latch, and at least one cross coupling circuit path in the latch portion including a first series-connected pair of vertical resistors.

公开(公告)号：WO2019112906A1

公开(公告)日：2019-06-13

申请号：PCT/US2018/063428

申请日：2018-11-30

Applicant: MICROSEMI SOC CORP.

Inventor： MCCOLLUM, John ,  DHAOUI, Fethi ,  SINGARAJU, Pavan

IPC: H01L21/8234 ,  H01L27/088 ,  H01L21/8238 ,  H01L27/092

Abstract: An integrated circuit includes a plurality of low-voltage FinFET transistors each having a channel length l and a channel width w, the low-voltage FinFET transistors having a first threshold voltage channel implant and a first gate dielectric thickness. The integrated circuit also includes a plurality of high-voltage FinFET transistors each having the channel length / and the channel width w , the high-voltage FinFET transistors having a second threshold voltage channel implant greater than the first threshold voltage channel implant and second gate dielectric thickness greater than the first gate dielectric thickness.