公开(公告)号：WO2004003925A2

公开(公告)日：2004-01-08

申请号：PCT/US0314261

申请日：2003-05-01

Applicant: MOTOROLA INC

Inventor： NAHAS JOSEPH J ,  ANDRE THOMAS W ,  GARNI BRADLEY J ,  SUBRAMANIAN CHITRA K

IPC: G11C7/06 ,  G11C7/14 ,  G11C11/14 ,  G11C11/16

CPC classification number: G11C11/14 ,  G11C7/067 ,  G11C7/14 ,  G11C2207/063

Abstract: In a memory (10), a sensing system (14) detects bit states using one data (54) and two reference (64, 75) inputs, to sense a difference in conductance of a selected memory bit cell (77) and a midpoint reference conductance. Reference conductance is generated as the average conductance of a memory cell (78) in the high conductance state and a memory cell (79) in the low conductance state. The data input (54) is coupled to the selected memory bit cell (77). The two reference inputs are respectively coupled to memory cells in high and low conductance memory states. The sense amplifiers use either current biasing or voltage biasing to apply a sensing voltage within a predetermined voltage range across the bit cells. Capacitance coupled to complementary outputs of the sense amplifiers is balanced by the circuit designs. In one form, the two reference inputs are internally connected. One of several gain stages (90, 150, 110, 130) amplifies the sense amplifier output without injecting parasitic errors.

Abstract translation: 在存储器（10）中，感测系统（14）使用一个数据（54）和两个参考（64,75）输入来检测位状态，以感测所选择的存储位单元（77）的电导差和中点 参考电导。 产生参考电导作为高电导状态的存储单元（78）的平均电导和低电导状态的存储单元（79）。 数据输入（54）耦合到选择的存储位单元（77）。 两个参考输入分别以高和低电导存储器状态耦合到存储器单元。 读出放大器使用电流偏置或电压偏置来在位单元之间的预定电压范围内施加感测电压。 耦合到读出放大器的互补输出的电容由电路设计来平衡。 在一种形式中，两个参考输入是内部连接的。 几个增益级（90,150,110,130）中的一个放大了读出放大器输出而不会注入寄生错误。