公开(公告)号：WO03015180A2

公开(公告)日：2003-02-20

申请号：PCT/US0224782

申请日：2002-08-05

Applicant: SILICONIX INC

Inventor： DARWISH MOHAMED N ,  YUE CHRISTINA ,  GILES FREDERICK P ,  LUI KAM HONG ,  CHEN KUO-IN ,  TERRILL KYLE ,  PATTANAYAK DEVA N

IPC: H01L21/28 ,  H01L21/336 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/51 ,  H01L29/78

CPC classification number: H01L29/42368 ,  H01L21/28185 ,  H01L21/28194 ,  H01L29/0878 ,  H01L29/7813

Abstract: A trench MOSFET (40) includes active corner regions (25) and a thick insulative layer (33) centrally located at the bottom of the trench (19). A thin gate insulative layer (15) lines the sidewall and peripheral portion of the bottom surface of the trench (19). A gate (14) fills the trench, adjacent to the thin insulative layer (15). The gate (14) is adjacent to the sides and top of the thick insulative layer (33). The thick insulative layer (33) separates the gate (14) from the drain conductive region (13) at the bottom of the trench (19) yielding a reduced gate-to-drain capacitance and making the MOSFET (40) particularly suitable for high frequency applications.

Abstract translation: 沟槽MOSFET（40）包括中心位于沟槽（19）的底部的有源角区域（25）和厚绝缘层（33）。 薄栅绝缘层（15）将沟槽（19）的底表面的侧壁和周边部分排列。 栅极（14）填充与薄绝缘层（15）相邻的沟槽。 栅极（14）与厚绝缘层（33）的侧面和顶部相邻。 厚的绝缘层（33）在沟槽（19）的底部处将栅极（14）与漏极导电区域（13）分离，产生降低的栅极 - 漏极电容，并使MOSFET（40）特别适用于高 频率应用。