公开(公告)号：WO2016053720A1

公开(公告)日：2016-04-07

申请号：PCT/US2015/051788

申请日：2015-09-23

Applicant: XILINX, INC.

Inventor： YEH, Ping-Chin ,  JENNINGS, John, K. ,  NATHANAEL, Rhesa ,  CHONG, Nui ,  CHANG, Cheng-Whang ,  CHUNG, Daniel, Y.

IPC: G01R31/28 ,  G01R31/3167

CPC classification number: G01R31/2851 ,  G01R31/2837 ,  G01R31/2843 ,  G01R31/3167

Abstract: In an example implementation, an integrated circuit (IC) (102) includes: a plurality of transistors (122) disposed in a plurality of locations (120) on a die of the IC; conductors (124) coupled to terminals of each of the plurality of transistors; a digital-to-analog converter (DAC) (108), coupled to the conductors, to drive voltage signals to the plurality of transistors in response to a digital input; and an analog-to-digital converter (ADC) (110), coupled to at least a portion of the conductors, to generate samples in response to current signals induced in the plurality of transistors in response to the voltage signals, the samples being indicative of at least one electrostatic characteristic for the plurality of transistors.

Abstract translation: 在示例实现中，集成电路（IC）（102）包括：设置在IC的管芯上的多个位置（120）中的多个晶体管（122） 耦合到所述多个晶体管中的每一个的端子的导体（124）; 耦合到所述导体的数模转换器（DAC）（108），以响应于数字输入来驱动到所述多个晶体管的电压信号; 以及耦合到所述导体的至少一部分的模数转换器（110），以响应于所述电压信号响应于在所述多个晶体管中感应的电流信号而生成样本，所述样本是指示性的 对于多个晶体管具有至少一个静电特性。