公开(公告)号：WO2021138794A1

公开(公告)日：2021-07-15

申请号：PCT/CN2020/070614

申请日：2020-01-07

Applicant: YANGTZE MEMORY TECHNOLOGIES CO., LTD.

Inventor： HE, Jialan

IPC: H01L21/98 ,  H01L21/78 ,  H01L25/18 ,  H01L2224/08145 ,  H01L2224/80006 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2225/06524 ,  H01L24/08 ,  H01L24/80 ,  H01L25/0657 ,  H01L25/50 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/14511

Abstract: A method includes providing a structure including a carrier wafer, and a first device wafer with an adhesion layer between the carrier wafer and the first device wafer; and forming a plurality of first ablation structures in the structure, each of the plurality of first ablation structures extending through the first device wafer, the adhesion layer and a portion of the carrier wafer. Each of the plurality of first ablation structures has a portion inside the carrier wafer with a depth no greater than one half of a thickness of the carrier wafer. The first device wafer includes a plurality of first dies, each pair of adjacent first dies being separated by one of the plurality of first ablation structures. The plurality of first ablation structures are formed by either laser grooving or mechanical sawing.

公开(公告)号：WO2021174415A1

公开(公告)日：2021-09-10

申请号：PCT/CN2020/077611

申请日：2020-03-03

Applicant: YANGTZE MEMORY TECHNOLOGIES CO., LTD.

Inventor： HE, Jialan

IPC: H01L23/00 ,  H01L23/60

Abstract: Semiconductor chips and fabrication methods thereof are disclosed. A semiconductor chip (400) includes a main chip region (402) and a protection structure (404) surrounding the main chip region (402) in a plan view. The protection structure (404) includes a dielectric layer (412) and a conductive portion (414) in the dielectric layer (412). The conductive portion (414) includes a conductive layer (506) and a core (508) having a material different from that of the conductive layer (506).