公开(公告)号：WO2022126017A2

公开(公告)日：2022-06-16

申请号：PCT/US2021/063095

申请日：2021-12-13

申请人： QORVO US, INC.

发明人： MAXIM, George ,  COSTA, Julio C. ,  LEIPOLD, Dirk Robert Walter ,  SCOTT, Baker

IPC分类号： H01L25/065 ,  H01L25/03 ,  H01L23/66 ,  H01L23/367 ,  H01Q1/22 ,  H01L23/373 ,  H01L23/31 ,  H01L2223/6644 ,  H01L2223/6677 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06568 ,  H01L2225/06589 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/3677 ,  H01L23/3736 ,  H01L23/3738 ,  H01L25/0652 ,  H01L25/0657 ,  H01Q1/2283 ,  H01Q21/065

摘要： The present disclosure relates to a three-dimensional (3D) package that has a die-on-die configuration, and includes a first die and at least one second die deposed underneath the first die. The first die includes a back-end-of-line (BEOL) portion, a device region over the BEOL portion, a substrate over the device region, and a substrate tie structure that extends through the device region and at least extends into the substrate. The substrate and the substrate tie structure each has a high thermal conductivity higher than 50W/mK. The at least one second die is configured to be coupled to the BEOL portion of the first die, such that heat generated by the second die can propagate through the BEOL portion and the substrate tie structure, and radiate out of the first substrate.

公开(公告)号：WO2022031446A1

公开(公告)日：2022-02-10

申请号：PCT/US2021/042703

申请日：2021-07-22

申请人： MICRON TECHNOLOGY, INC.

发明人： KALE, Poorna

IPC分类号： G06N3/063 ,  G06N3/04 ,  G06F3/0604 ,  G06F3/0659 ,  G06F3/0679 ,  G06N3/08 ,  H01L2225/06541 ,  H01L2225/06582 ,  H01L25/0657

摘要： Systems, devices, and methods related to a Deep Learning Accelerator and memory are described. For example, an integrated circuit device may be configured to execute instructions with matrix operands and configured with random access memory. The random access memory is configured to store a plurality of inputs from a plurality of sensors respective, parameters of an Artificial Neural Network, and instructions executable by the Deep Learning Accelerator to perform matrix computation to generate outputs of the Artificial Neural Network, including first outputs generated using the sensors separately and a second output generated using a combination of the sensors.

公开(公告)号：WO2022029722A1

公开(公告)日：2022-02-10

申请号：PCT/IB2021/057284

申请日：2021-08-06

申请人： MULTEK TECHNOLOGIES LIMITED

发明人： BERKEL, Jan ,  ROBINSON, Todd

IPC分类号： H05K1/02 ,  H05K1/11 ,  H01L23/498 ,  H01L23/00 ,  H05K3/46 ,  H01L21/4857 ,  H01L21/50 ,  H01L23/13 ,  H01L23/367 ,  H01L23/3677 ,  H01L23/488 ,  H01L23/49822 ,  H01L24/03 ,  H01L24/04 ,  H01L24/05 ,  H01L25/0657 ,  H05K1/0203 ,  H05K13/0465

摘要： Embodiments for a circuit board comprising a plurality of electrically conductive layers and a plurality of electrically non-conductive layers in a laminated stack are provided. The laminated stack defines a front face and a back face. A thermal conductive heat body extends from a die bond pad on the front face to an electrically conductive layer on the back face. The die bond pad is configured for a bare die to be mounted thereon. A bonding agent disposed around the thermal conductive heat body adhering the thermal conductive heat body to walls of an opening of the laminated stack and at least one of the plurality of electrically non- conductive layers are a monolithic structure. A plurality of wire bond pads on the front face adjacent to the die bond pad have a surface finish material thereon. The surface finish material is configured for wire bonding thereto.

公开(公告)号：WO2021150346A1

公开(公告)日：2021-07-29

申请号：PCT/US2020/066913

申请日：2020-12-23

申请人： MICRON TECHNOLOGY, INC.

发明人： CHUN, Hyunsuk

IPC分类号： H01L21/822 ,  H01L25/065 ,  H01L27/06 ,  H01L23/48 ,  H01L21/76831 ,  H01L21/8221 ,  H01L2224/03002 ,  H01L2224/0346 ,  H01L2224/03849 ,  H01L2224/0401 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/08145 ,  H01L2224/11002 ,  H01L2224/1146 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/80013 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2224/92125 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L23/481 ,  H01L23/5384 ,  H01L23/5389 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/73 ,  H01L24/80 ,  H01L25/0657 ,  H01L25/50 ,  H01L27/0694

摘要： Semiconductor devices may include a die (102) including a semiconductor material. The die may include a first active surface (108) including first integrated circuitry (114) on a first side of the die and a second active surface (110) including second integrated circuitry (122) on a second, opposite side of the die. In some embodiments, the die may include two die portions: a first die portion including the first active surface and a second die portion including the second active surface. The first die portion and the second die portion may be joined together with the first active surface facing away from the second active surface.

公开(公告)号：WO2021133826A1

公开(公告)日：2021-07-01

申请号：PCT/US2020/066664

申请日：2020-12-22

申请人： MICRON TECHNOLOGY, INC.

发明人： KEETH, Brent ,  ROSS, Frank F. ,  MURPHY, Richard C.

IPC分类号： G06N3/063 ,  G06N3/04 ,  G06N3/08 ,  G11C11/54 ,  G06F13/1668 ,  G06N3/004 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/18

摘要： Apparatus and methods are disclosed, including memory devices and systems. Example memory devices, systems and methods include a stack of memory dies, a controller die, and a buffer. Example memory devices, systems and methods include one or more neuromorphic layers logically coupled between one or more dies in the stack of memory dies and a host interface of the controller die.

公开(公告)号：WO2023278971A1

公开(公告)日：2023-01-05

申请号：PCT/US2022/073180

申请日：2022-06-27

申请人： MICRON TECHNOLOGY, INC.

发明人： SIMSEK-EGE, Fatma Arzum

IPC分类号： H01L25/065 ,  H01L27/108 ,  H01L23/00 ,  H01L25/18 ,  H01L2224/05147 ,  H01L2224/08146 ,  H01L2224/80896 ,  H01L2225/06524 ,  H01L2225/06544 ,  H01L23/481 ,  H01L24/05 ,  H01L24/08 ,  H01L24/80 ,  H01L25/0657 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/10897 ,  H01L2924/1431 ,  H01L2924/1436

摘要： A microelectronic device comprises a first microelectronic device structure, a second microelectronic device structure attached to the first microelectronic device structure. The first microelectronic device structure comprises a first memory array region comprising memory cells, each of the memory cells comprising an access device and a charge storage device operably coupled to the access device. The first microelectronic device structure further comprises a first base structure comprising first control logic devices configured to effectuate one or more control operations of the memory cells of the first memory array region. The second microelectronic device structure comprises a second memory array region comprising additional memory cells, each of the additional memory cells comprising an additional access device and an additional charge storage device operably coupled to the additional access device. The second microelectronic device further a second base structure comprising second control logic devices configured to effectuate one or more control operations of the additional memory cells of the second memory array region. Related microelectronic devices, electronic systems, and methods are also described.

公开(公告)号：WO2022240456A1

公开(公告)日：2022-11-17

申请号：PCT/US2022/013595

申请日：2022-01-25

申请人： SANDISK TECHNOLOGIES LLC

发明人： SHAO, Shiqian ,  TOYAMA, Fumiaki ,  RABKIN, Peter

IPC分类号： H01L23/522 ,  H01L23/00 ,  H01L2224/08145 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L24/08 ,  H01L24/80 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  H01L28/60 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/19041 ,  H01L2924/19104

摘要： A semiconductor structure includes a bonded assembly of a first semiconductor die including first metal bonding pads and a second semiconductor die including second metal bonding pads, and a capacitor structure including a first electrode, a second electrode, and a node dielectric. The first electrode includes first bonded pairs of metal bonding pads. The second electrode includes second bonded pairs of metal bonding pads. The node dielectric includes portions dielectric material layers laterally surrounding the metal bonding pads.

公开(公告)号：WO2021252188A1

公开(公告)日：2021-12-16

申请号：PCT/US2021/034194

申请日：2021-05-26

申请人： MICRON TECHNOLOGY, INC.

发明人： FAY, Owen R. ,  RICHARDS, Randon K. ,  LIMAYE, Aparna U. ,  LIM, Dong Soon ,  YOO, Chan H. ,  STREET, Bret K. ,  NAKANO, Eiichi ,  LUO, Shijian

IPC分类号： H01L25/10 ,  H01L25/065 ,  H01L23/00 ,  H01L25/00 ,  H01L23/552 ,  H01L23/66 ,  H01L23/34 ,  H01L25/18 ,  H01L25/16 ,  H01L2223/6677 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06572 ,  H01L2225/06575 ,  H01L2225/1047 ,  H01L23/49816 ,  H01L23/50 ,  H01L23/5384 ,  H01L24/10 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50

摘要： Disclosed are microelectronic device assemblies comprising a substrate having conductors exposed on a surface thereof. Two or more microelectronic devices are stacked on the substrate, each microelectronic device having bond pads operably coupled to conductive traces in contact with the microelectronic devices and extending over a dielectric material to conductive via locations beyond at least one side of the stack for routing power and ground/bias extending through the dielectric materials to contact exposed conductors of the substrate. Data signals are routed between and through microelectronic devices of the stack by structure for data signal communication. Methods of fabrication and related electronic systems are also disclosed.

公开(公告)号：WO2021202076A1

公开(公告)日：2021-10-07

申请号：PCT/US2021/021851

申请日：2021-03-11

申请人： CREE, INC.

发明人： NOORI, Basim ,  MARBELL, Marvin ,  LIM, Kwangmo, Chris ,  MU, Qianli

IPC分类号： H03F1/56 ,  H03F3/189 ,  H03F3/213 ,  H03F3/195 ,  H01L23/66 ,  H01L23/48 ,  H01L23/498 ,  H01L23/538 ,  H03F1/02 ,  H01L25/065 ,  H01L2223/6622 ,  H01L2223/6655 ,  H01L2223/6672 ,  H01L2223/6683 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L23/3677 ,  H01L23/4824 ,  H01L23/49861 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5386 ,  H01L23/64 ,  H01L25/0652 ,  H01L25/0657 ,  H01L29/1608 ,  H03F1/0288 ,  H03F1/565 ,  H03F2200/222 ,  H03F2200/387 ,  H03F2200/451 ,  H03F3/193

摘要： A radio frequency (RF) power amplifier device package includes a substrate and a first die attached to the substrate at a bottom surface of the first die. The first die includes top gate or drain contacts on a top surface of the first die opposite the bottom surface. At least one of the top gate or drain contacts is electrically connected to a respective bottom gate or drain contact on the bottom surface of the first die by a respective conductive via structure. An integrated interconnect structure, which is on the first die opposite the substrate, includes a first contact pad on the top gate contact or the top drain contact of the first die, and at least one second contact pad connected to a package lead, a contact of a second die, impedance matching circuitry, and/or harmonic termination circuitry.

公开(公告)号：WO2021196394A1

公开(公告)日：2021-10-07

申请号：PCT/CN2020/093970

申请日：2020-06-02

申请人： 华天科技（昆山）电子有限公司

发明人： 马书英 ,  王姣 ,  肖智轶

IPC分类号： H01L23/31 ,  H01L21/48 ,  H01L23/538 ,  H01L25/065 ,  H01L21/486 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/18 ,  H01L2224/32225 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2225/06548 ,  H01L23/3121 ,  H01L23/5389 ,  H01L25/0657

摘要： 本发明实施例提供了一种芯片内系统集成封装结构及其制作方法、立体堆叠器件，该芯片内系统集成封装结构包括：基板、芯片、第一电连接结构以及第二电连接结构，基板的正面侧开设有凹槽和导通孔焊垫，基板的背面侧开设有延伸至导通孔焊垫的导电通孔；芯片埋入凹槽中，芯片远离凹槽的底面的表面设有芯片焊垫；第一电连接结构形成于基板的正面侧，第二电连接结构形成于基板的背面侧，第一电连接结构与芯片焊垫电连接，且第一电连接结构通过导通孔焊垫和导电通孔与第二电连接结构电连接。不同的芯片之间可以通过第一电连接结构和第二电连接结构实现电连接，有利于形成高密度互连、封装小型化和轻薄化的立体堆叠结构。