Abstract:
The present invention relates to a plasma display apparatus. In an aspect, the plasma display apparatus includes a plasma display panel including a plurality of scan electrodes and sustain electrodes formed on an upper substrate, and a plurality of address electrodes formed on a lower substrate, and a driver for supplying driving signals to the plurality of electrodes. The plurality of scan electrodes may be divided into first and second groups. An address period may include first and second group scan periods in which scan signals are supplied to the first and second groups, respectively. Scan bias voltages supplied to the first and second groups in at least one of the first and second group scan periods may be different from each other. Time points at which data signals are supplied to first and second of the plurality of address electrodes in at least one of the first and second group scan periods may be different from each other.
Abstract:
the invention concerns a method for controlling the addressing of an AC plasma display panel, the implementation of which enables the use of low-cost components and the reduction of capacitive consumption. The panel comprises line electrodes (Y1 to Y6) intersecting with column electrodes (X1 to X6) the intersection points of which define cells (C1 to C36); maintenance signals (SE) are applied to the line electrodes by means of at least one control circuit (2). The method is characterised in that it consists in effecting the addressing of the cells (C1 to C36) by superposing supplementary voltage levels (PS1, PS2) on the maintenance signals (SE), then in superposing subsequently addressing pulses (IE, IS) on said supplementary levels. This method enables the reduction, with respect to prior art, of the amplitude of addressing pulses, resulting in less demand on the control circuit characteristics, which leads the reduction of the capacitive consumption. The invention is applicable to all types of AC plasma display panels.
Abstract:
A plasma display panel includes a plurality of row electrodes each extending in the row direction and arrayed in the column direction; a dielectric layer covering the plurality of row electrodes on the side of the internal surface of a front substrate; and a plurality of column electrodes each extending in the column direction and arrayed in the row direction on the side of the internal surface of a back substrate, which is opposed to the front substrate with a discharge space defined between the front and back substrates, to form, in the discharge space, unit light emitting areas at positions where the column electrodes intersect the row electrodes. The spaces between adjacent ones of the row electrodes constitute respective display lines. The peripheries of the unit light emitting areas are defined by separation walls. Each of the unit light emitting areas is partitioned, by a partition wall, into first and second discharge cells. The first discharge cells perform discharges in the respective spaces between the adjacent row electrodes, which constitute respective the display lines, while the second discharge cells perform discharges between a part of the row electrodes and the column electrodes. A communication part is formed between each pair of first and second discharge cells.
Abstract:
Phosphor based display technologies show artefacts like "sticking" or "ghost" images produced by "marking" or "burn-in" effects. In order to remove these artefacts it is proposed to activate a portion of the display screen (10) asa wiper and to move the wiper at least one time over the complete display screen (10) or a part of the display screen (10). The wiper will homogenize the complete video screen in order to make the ghost images less visible.Another embodiment is dedicated to the reduction of the short-term burning effect. Here, a dynamic correction of the displayed picture is done. A memorized picture could be subtracted from the current picture in order to reduce the visibility of the short term sticking effect.