Abstract:
There is disclosed an apparatus for amplification comprises of a front-end input stage (110) having a driver module (120), multi-feedback port (102), a phase inversion stage (130) with improved signal coupling, distributed negative feedback (300) and an output stage (150) with asymmetry output device. The apparatus also includes a balanced equalization method using negative feedback where the output stage providing negative multiple feedback together with predetermined output impedance, separated bias control and signal drive for each of the output device. Power supply (250) is implemented having dual power transformer (230) which provides compensated bias for the output device. In the preferred embodiment, the apparatus also includes means to increase slew rate, means for providing distributed negative feedback to reduce phase shift, means to bootstrap upper output device, means for differential adjustment for feedback, means to drive high voltage and current drive signal. Short circuit protection for speaker, means to minimize lethal DC output at output terminal, means for obtaining suitable high tension voltage and bias circuit and output stage having all devices separately fused to provide indication of faulty output device are also disclosed.
Abstract:
A circuit method includes periodically increasing a tail current of a differential stage of a comparator to periodically power on the differential stage to a power-on state, and periodically decreasing the tail current of the differential stage to periodically power down the differential stage to a low-power state. The periodically increasing of the tail current and the periodically decreasing of the tail current are asynchronous operations for powering on the differential stage to the power-on state and powering down the differential stage to the low-power state. Periodically increasing the tail current and the periodically decreasing the tail current asynchronously for powering on the differential stage to the power-on state and powering down the differential stage to the low-power state provide for low noise and high speed during signal comparison.
Abstract:
A circuit method includes periodically increasing a tail current of a differential stage of a comparator to periodically power on the differential stage to a power-on state, and periodically decreasing the tail current of the differential stage to periodically power down the differential stage to a low-power state. The periodically increasing of the tail current and the periodically decreasing of the tail current are asynchronous operations for powering on the differential stage to the power-on state and powering down the differential stage to the low-power state. Periodically increasing the tail current and the periodically decreasing the tail current asynchronously for powering on the differential stage to the power-on state and powering down the differential stage to the low-power state provide for low noise and high speed during signal comparison.
Abstract:
The invention relates to a power amplifier module comprising single-ended amplifiers (101 and 102) which are arranged in a BTL configuration. The single-ended amplifiers (101 and 102) have low-impedance inverting inputs coupled by a resistor R1 for improved stability and quiescent current control.