Abstract:
A system (200) includes a first differential amplifier (102) and a first transformer (X1) with a primary coil (L1) coupled to an output of the first differential amplifier (102) and with a secondary coil (L2) coupled to a load (RL). The system (200) also includes a second differential amplifier (104) and a second transformer (X2) with a primary coil (L3) coupled to an output of the second differential amplifier (104) and with a secondary coil (L4) coupled in series with the secondary coil (L2) of the first transformer (X1). The system (200) also includes a tuning network (204) coupled to a center tap node (206) between the secondary coil (L2) of the first transformer (X1) and the secondary coil (L4) of the second transformer (X2).
Abstract:
A hybrid, translinear amplifier has at least one gain stage including first and second gain transistors, at least a first load transistor electrically coupled to the first gain transistor and at least a second load transistor electrically coupled to the second gain transistor, and load resistors electrically coupled to the load transistors. A hybrid, translinear amplifier with selectable gain has a first hybrid, translinear amplifier cell having at least first and second load transistors, each load transistor having a load resistor, at least one additional hybrid, translinear amplifier cell having at least third, fourth, fifth and sixth load transistors, each load transistor having a load resistor, at least two switches electrically coupled to the amplifier cells to allow selection of one of the amplifier cells, and a differential output signal having a gain corresponding to a selected amplifier cell.
Abstract:
Improved transimpedance amplifier in monolithic integrated circuit form, comprising an inverting cascode amplifier stage having at least one peaking inductor (64, 68, 114, 118, 152, 157, 172, 177) followed by one or more amplification stages, where the transimpedance amplifier gain is controlled by means of the adjustment of the D.C. current flowing through the first transistor (65, 115, 153, 173) cascode inverter stage so as to regulate its transconductance. Said adjustment comprises the addition or subtraction of current at the connection of the first and second transistors in the inverting cascode amplifier stage, either by means of a resistor connected between said connection and a preset positive, negative or zero voltage source or by an accessory current supply circuit that adds or subtracts a controlled DC current amount.
Abstract:
An apparatus includes a first gain stage, a combiner and a second gain stage. The first gain stage may be configured to amplify a receive signal acquired from a circuit to generate an intermediate signal. The combiner may be configured to combine the intermediate signal with a cancellation signal to generate a combined signal. The cancellation signal is generally derived from a transmit signal a portion of which appears in the receive signal through the circuit. The second gain stage may be configured to amplify the combined signal to generate an output signal.
Abstract:
A current mirror circuit for biasing a power amplifier includes a modified Wilson current mirror with a pair of first and second mirror transistors connected to a third transistor. The first mirror transistor is configured for operating in a saturation mode, with a gate voltage of the first mirror transistor being lower than a gate voltage of the power amplifier. The third transistor charges the power amplifier circuit during a positive half cycle of an input signal and the first mirror transistor discharges the power amplifier circuit during a negative half cycle of the input signal at different rates.
Abstract:
There is disclosed an apparatus for amplification comprises of a front-end input stage (110) having a driver module (120), multi-feedback port (102), a phase inversion stage (130) with improved signal coupling, distributed negative feedback (300) and an output stage (150) with asymmetry output device. The apparatus also includes a balanced equalization method using negative feedback where the output stage providing negative multiple feedback together with predetermined output impedance, separated bias control and signal drive for each of the output device. Power supply (250) is implemented having dual power transformer (230) which provides compensated bias for the output device. In the preferred embodiment, the apparatus also includes means to increase slew rate, means for providing distributed negative feedback to reduce phase shift, means to bootstrap upper output device, means for differential adjustment for feedback, means to drive high voltage and current drive signal. Short circuit protection for speaker, means to minimize lethal DC output at output terminal, means for obtaining suitable high tension voltage and bias circuit and output stage having all devices separately fused to provide indication of faulty output device are also disclosed.
Abstract:
Reconfigurable distributed active transformers are provided. The exemplary embodiments provided allow changing of the effective number and configuration of the primary and secondary windings, where the distributed active transformer structures can be reconfigured dynamically to control the output power levels, allow operation at multiple frequency bands, maintain a high performance across multiple channels, and sustain desired characteristics across process, temperature and other environmental variations. Integration of the distributed active transformer power amplifiers and a low noise amplifier on a semiconductor substrate can also be provided.
Abstract:
A semiconductor device includes a plurality of unit cell transistors on a common semiconductor structure, the unit cell transistors electrically connected in parallel, and each unit cell transistor including a respective gate finger. Respective threshold voltages of first and second of the unit cell transistors differ by at least 0.1 volts and/or threshold voltages of first and second segments of a third of the unit cell transistors differ by at least 0.1 volts.
Abstract:
In a circuit (100), a first transistor (M1) includes a first control input and first and second current terminals. The first control input is coupled to receive a first input control signal, and the first current terminal is coupled to a first power supply node (105). The circuit (100) also includes a first resistor (R1) coupled to the first control input of the first transistor (M1), a first capacitor (C1) coupled between the second current terminal of the first transistor (M1) and the first resistor (R1), and a second transistor (M2). The second transistor (M2) includes a second control input and third and fourth current terminals. The third current terminal is coupled to the first resistor (R1) and to the first capacitor (C1).
Abstract:
An amplifier stage (300) for generating an amplified output signal from an input signal, a mobile device comprising an audio amplifier, and an amplification method for generating an amplified output signal from an input signal using an amplifier stage (300) are described.