MULTIPLEXER, LOOK-UP TABLE AND FPGA
    1.
    发明申请
    MULTIPLEXER, LOOK-UP TABLE AND FPGA 审中-公开
    多路复用器,查找表和FPGA

    公开(公告)号:WO2013131717A1

    公开(公告)日:2013-09-12

    申请号:PCT/EP2013/052669

    申请日:2013-02-11

    申请人: SOITEC

    发明人: FERRANT, Richard

    IPC分类号: H03K17/735

    摘要: The present invention relates to a multiplexer (1000) comprising at least a first input (1051), and a second input (1052, 1053, 1054); and one output (1041), connected to the first input via a first pass gate (1031) and to the second input via a second pass gate (1032, 1033, 1034), wherein the first pass gate comprises at least a first double-gate transistor, and the second pass gate comprises at least a second double-gate transistor, and each of the first and second double gate transistor has a first gate (1031 A, 1032A, 1033A, 1034A) controlled based on a first control signal (A) and a second gate (1031 B, 1032B, 1033B, 1034B) controlled based on a second control signal (B). The invention further relates to a look-up table and a FPGA based on the multiplexer.

    摘要翻译: 本发明涉及至少包括第一输入(1051)和第二输入(1052,1053,1054)的多路复用器(1000)。 和一个输出(1041),其经由第一通过门(1031)连接到第一输入端,并通过第二通道门(1032,1033,1034)连接到第二输入端,其中第一通道门包括至少第一双通道 栅极晶体管,并且第二栅极包括至少第二双栅极晶体管,并且第一和第二双栅极晶体管中的每一个具有基于第一控制信号(...)控制的第一栅极(1031A,1032A,1033A,1034A) A)和基于第二控制信号(B)控制的第二门(1031B,1032B,1033B,1034B)。 本发明还涉及一种基于多路复用器的查找表和FPGA。

    SMART POWER SPLITTERS FOR HIGH VOLTAGE OUTLET

    公开(公告)号:WO2021183828A1

    公开(公告)日:2021-09-16

    申请号:PCT/US2021/022005

    申请日:2021-03-11

    摘要: Systems and methods for managing power distribution from in-home electrical wiring are disclosed. In one embodiment, a power splitter device includes a an electrical input source connection with a first input line and a second input line for two hot phases of alternating current electricity, a primary electrical output and a secondary electrical output, the primary electrical output having a first primary output line and a second primary output line and the secondary electrical output having a first secondary output line and a second secondary output line, a first, second, third, and fourth current sensor, a first relay and a second relay, and a control logic microprocessor configured to receive measurements of current, determine an overcurrent condition based upon measurements of current over a period of time and disconnect power from the secondary electrical output connection based upon a determined overcurrent condition.