公开(公告)号：WO2020153989A1

公开(公告)日：2020-07-30

申请号：PCT/US2019/043090

申请日：2019-07-23

Applicant: MICROSEMI SOC CORP.

Inventor： MCCOLLUM, John L. ,  GREENE, Jonathan W. ,  BAKKER, Gregory William

IPC: G06N3/063 ,  G06G7/161 ,  G06J1/00

Abstract: A user programmable integrated circuit includes a user-programmable routing network including a plurality of interconnect conductors selectively couplable to one another by user-programmable elements. A plurality of matrix vector multipliers, each have a plurality of word lines, each word line coupled to a different first one of the one of the interconnect conductors of the user-programmable routing network, the word lines forming intersections with a plurality of summing bit lines, a programmable Vt transistor at each intersection having a gate connected to the intersecting word line, a source connected to a fixed potential and a drain connected to the intersecting summing bit line. A charge-to-pulse-width converter circuit is associated with each one of the matrix vector multipliers, each having an input coupled to one of the summing bit lines, and a pulse output coupled to a different second one of the interconnect conductors of the user-programmable routing network.

公开(公告)号：WO2010053780A1

公开(公告)日：2010-05-14

申请号：PCT/US2009/062338

申请日：2009-10-28

Applicant: RAYTHEON COMPANY ,  VAMPOLA, John L. ,  VEEDER, Kenton T.

Inventor： VAMPOLA, John L. ,  VEEDER, Kenton T.

IPC: G06J1/00

CPC classification number: G06J1/00

Abstract: In one or more embodiments, an apparatus and method for processing an analog signal into a digital signal includes a quantizer that converts the analog signal, which can have any value within a given range of values, into a fixed set of discrete values. An analog residue, i.e. the quantization error caused by the difference between the analog value of the integrated analog signal and the closest corresponding discrete quantized value, is outputted. The analog residue can be further processed to increase the accuracy of the A/D conversion. Multiple quantizer stages can be provided to perform A/D conversion of the analog signal over multiple integration periods, e.g. in multi-shot and time-delay integration applications. The analog signal may represent an image signal.

Abstract translation: 在一个或多个实施例中，用于将模拟信号处理为数字信号的装置和方法包括量化器，其将可以具有给定值范围内的任何值的模拟信号转换成固定的一组离散值。 输出模拟残差，即由积分模拟信号的模拟值与最接近的对应离散量化值之间的差引起的量化误差。 可以进一步处理模拟残基以提高A / D转换的精度。 可以提供多个量化器级以在多个积分周期上执行模拟信号的A / D转换，例如， 在多播和延时集成应用中。 模拟信号可以表示图像信号。

公开(公告)号：WO2006036420A8

公开(公告)日：2006-11-16

申请号：PCT/US2005030514

申请日：2005-08-25

Applicant: NORTHROP GRUMMAN CORP ,  HORAN CHRISTOPHER J ,  STASI WILLIAM J

Inventor： HORAN CHRISTOPHER J ,  STASI WILLIAM J

IPC: G06J1/00 ,  F25B41/00 ,  G01K13/00 ,  G06F15/18 ,  G06N3/06 ,  G06N3/063 ,  G06N3/067

CPC classification number: B60H1/00585 ,  B64D13/06 ,  F25B45/00 ,  F25B49/005 ,  F25B2400/13 ,  F25B2500/19 ,  F25B2600/0261 ,  F25B2700/04 ,  F25B2700/1931 ,  F25B2700/21161 ,  F25B2700/21163 ,  F25B2700/21172 ,  F25B2700/21173 ,  G01K7/42

Abstract: The invention is a process for determining the charge level of a vapor cycle environmental control system, having a condenser, evaporator, and an expansion valve, comprising the steps of providing a neural network having four input neurons, two hidden neurons and one output neurons; determining the number of degrees below the saturation temperature of the liquid refrigerant exiting the condenser and providing this measurement to the first input neuron; sensing the condenser skink temperature and providing the measurement to the second input neuron; sending either the refrigerant outlet temperature from the condenser of the evaporator exhaust air temperature and providing the measurement to the third input neuron, sensing the evaporator inlet temperature and providing the measurement to the fourth input neuron; and using the trained neural network to monitor the charge level in the system.

Abstract translation: 本发明是用于确定具有冷凝器，蒸发器和膨胀阀的蒸气循环环境控制系统的充气水平的过程，包括以下步骤：提供具有四个输入神经元，两个隐藏的神经元和一个输出神经元的神经网络; 确定离开冷凝器的液体制冷剂的饱和温度以下的度数并将该测量结果提供给第一输入神经元; 感测冷凝器尾气温度并将测量结果提供给第二输入神经元; 发送来自蒸发器排气温度的冷凝器的制冷剂出口温度并将测量结果提供给第三输入神经元，感测蒸发器入口温度并将测量结果提供给第四输入神经元; 并使用训练的神经网络来监测系统中的电荷水平。

公开(公告)号：WO2004084273A3

公开(公告)日：2005-03-24

申请号：PCT/US2004007958

申请日：2004-03-16

Applicant: INNOVEL INC

Inventor： NAZARIAN HAGOP A

IPC: G06J1/00 ,  H01L20060101 ,  H01L29/00 ,  H01L47/00 ,  H03M1/36

CPC classification number: H03K19/017581 ,  G06J1/00

Abstract: An analog portion of a mixed-mode integrated circuit system includes a plurality of analog input cells, a plurality of analog output cells, and an interconnect array. The input cells are configured to program analog functions. The output cells are configured to provide Analog and digital outputs corresponding to the programmed analog functions. The interconnect array processes the programmed analog functions into signals indicative of the analog functions. The interconnect array selectively provides the signals to the plurality of analog output cells.

Abstract translation: 混合模式集成电路系统的模拟部分包括多个模拟输入单元，多个模拟输出单元和互连阵列。 输入单元配置为编程模拟功能。 输出单元被配置为提供与编程的模拟功能相对应的模拟和数字输出。 互连阵列将编程的模拟功能处理成指示模拟功能的信号。 互连阵列选择性地将信号提供给多个模拟输出单元。

公开(公告)号：WO2004042931A3

公开(公告)日：2004-09-23

申请号：PCT/GB0304828

申请日：2003-11-06

Applicant: TOUMAZ TECHNOLOGY LTD ,  SIM CALVIN ,  TOUMAZOU CHRISTOFER

Inventor： SIM CALVIN ,  TOUMAZOU CHRISTOFER

IPC: H03M1/66 ,  G06J1/00

CPC classification number: H03M1/66

Abstract: Apparatus for converting an M-bit digital signal into an analogue signal. The apparatus comprising means (12,13) for mapping the M-bit digital signal to first and second digital values, so that the ratio of the first to the second digital value is equal to or approximates the value of the M-bit digital signal. First and second digital to analogue converters (14,15) are provided, the first digital to analogue converter (14) having an input for receiving said first digital value and the second digital to analogue converter (15) having an input for receiving said second digital value. Circuit means (16) is coupled to the analogue outputs of the digital to analogue converters (14,15) for dividing one of the analogue outputs by the other, and for providing the result to an output.

Abstract translation: 用于将M位数字信号转换为模拟信号的装置。 该装置包括用于将M位数字信号映射到第一和第二数字值的装置（12,13），使得第一数字值与第二数字值的比值等于或接近M位数字信号的值 。 提供第一和第二数模转换器（14,15），第一数模转换器（14）具有用于接收所述第一数字值的输入端和第二数模转换器（15），其具有用于接收所述第二数模转换器 数字值。 电路装置（16）耦合到数模转换器（14,15）的模拟输出端，用于将模拟输出之一彼此分开，并将结果提供给输出。

公开(公告)号：WO2004070951A3

公开(公告)日：2004-08-19

申请号：PCT/IB2004/050082

申请日：2004-02-06

Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V. ,  IMMINK, Albert, H., J. ,  VAN DEN HOMBERG, Johannes, A., T., M. ,  STEK, Aalbert

Inventor： IMMINK, Albert, H., J. ,  VAN DEN HOMBERG, Johannes, A., T., M. ,  STEK, Aalbert

IPC: G06J1/00

Abstract: A servo system comprising an analog sigma delta modulator for generating a normalized digital error correction signal from first and second analog control signals. The sigma delta modulator comprises an analog low-pass filter, a quantizer delivering the digital error correction signal and a multiplying DA-converter in feedback arrangement between the output of the quantizer and the input of the low-pass filter for multiplying the feedback signals with the sum of the analog control signals.

公开(公告)号：WO00028463A1

公开(公告)日：2000-05-18

申请号：PCT/EP1999/008238

申请日：1999-10-27

IPC: H03M1/46 ,  G06J1/00

CPC classification number: H03M1/462

Abstract: A successive approximation ADC having a D/A converter (15), a comparator (10) which compares an input voltage to the output of the D/A converter (15), and a successive approximation cell (30) which iteratively feeds binary values to the D/A converter (15) and together with the comparator (10) determines a binary value for the input voltage. The successive approximation ADC is operated to function as a threshold detector by pausing operation of the successive approximation cell (30) and by inputting (36) a binary threshold value to the D/A converter (15) so that the comparator (10) compares the input voltage to the threshold voltage. Thus, a threshold detector is implemented using the existing circuitry, namely the D/A converter (15) and the comparator (10). Embodiments of an improved successive approximation ADC are disclosed which includes a control device and bi-directional data lines (36) implemented in the successive approximation cell (30). An electronic system is also disclosed employing the improved successive approximation ADC to monitor a device voltage relative to a threshold value for the device voltage.

Abstract translation: 具有D / A转换器（15）的逐次逼近ADC，将输入电压与D / A转换器（15）的输出进行比较的比较器（10）和迭代地馈送二进制值的逐次逼近单元（30） 到D / A转换器（15）并与比较器（10）一起确定输入电压的二进制值。 通过暂停逐次逼近单元（30）的操作并且通过向D / A转换器（15）输入（36）二进制阈值，使得比较器（10）进行比较，逐行近似ADC被用作阈值检测器 输入电压达到阈值电压。 因此，使用现有电路即D / A转换器（15）和比较器（10）来实现阈值检测器。 公开了改进的逐次逼近ADC的实施例，其包括在逐次逼近单元（30）中实现的控制装置和双向数据线（36）。 还公开了一种电子系统，其使用改进的逐次逼近ADC来监测器件电压相对于器件电压的阈值。

公开(公告)号：WO2023007258A1

公开(公告)日：2023-02-02

申请号：PCT/IB2022/054268

申请日：2022-05-09

Applicant: SWAMY H, Raghavendra ,  JOSE, Iven

Inventor： SWAMY H, Raghavendra ,  JOSE, Iven

IPC: G02F1/03 ,  G06E1/00 ,  G06J1/00

Abstract: The present invention is related to a reconfigurable multi-dimensional hybrid optical computing accelerating apparatus consisting of a vertical polarizer or horizontal polarizer plane facing each other between the Liquid crystal units aligned to light pass through and or each liquid crystal unit is incorporated with a set of the color filter unit and vertical polarizer or horizontal polarizer plane facing each other between the Liquid crystal units aligned to light pass-through wherein a function of the liquid crystal unit is made with combinational computation execution with the optical Input (Io), and the electronic color transformation function control line (Qe) to provide an optical output (Zo), further, the function of the liquid crystal unit is capable of being reconfigurable by changing the stepping value of electronic color transformation function control line (Qe) thereby functional behavior of the LCU can be changed or reconfigured without redesigning the existing circuitry.

公开(公告)号：WO2021022376A1

公开(公告)日：2021-02-11

申请号：PCT/CA2020/051078

申请日：2020-08-06

Applicant: PHOTONIC INC.

Inventor： SIMMONS, Stephanie ,  THEWALT, Michael L. W.

IPC: G06N10/00 ,  G06J1/00 ,  H01L29/04 ,  H01L31/173

Abstract: Various systems, devices, articles and methods apply one or more luminescent defects disposed within a semiconductor body. A respective luminescent defect included in the one or more luminescent defects has a plurality of orbital states. An information processing device including a semiconductor body and one or more luminescent defects. A system including at least one processor and a quantum information processor comprising at least one luminescent defect. Methods for operation of devices and systems including one or more luminescent defects.

公开(公告)号：WO2021022375A1

公开(公告)日：2021-02-11

申请号：PCT/CA2020/051077

申请日：2020-08-06

Applicant: PHOTONIC INC.

Inventor： SIMMONS, Stephanie ,  THEWALT, Michael L. W.

IPC: G06N10/00 ,  G06J1/00 ,  H01L29/04 ,  H01L31/173

Abstract: Various systems, devices, articles and methods related to one or more local luminescent defects disposed within semiconductor body including silicon. A respective defect included in the one or more defects supports a respective bound exciton. A respective pair of computational states is defined at the respective defect and one computational state of the pair of computational states includes a first configuration for the respective exciton. Information stored in the respective pair of computational states can be manipulated according to various systems, devices, articles and methods described herein.