US09397336B2
A battery active material includes a crystal phase that is represented by a formula Y2−xScxTi2O5S2 (where 0
US09397325B2
A safety vent including: a vent 3 that allows gas generated inside a laminate type battery 2 to release to the outside, a gas permeated membrane 4 through which the gas permeates, and a housing case 5 that internally houses the vent 3 and the gas permeated membrane 4, and that is attached to a gas spout out port 24 formed in a laminated exterior casing 21 of the laminate type battery 2.
US09397323B2
Disclosed is a cylindrical secondary battery that can improve pressing force of a gasket pressing a cap up and a safety vent. The cylindrical secondary battery prevents leakage of electrolyte by improving pressing force of the gasket by including a cap up whose terminal portion is formed thicker than the peripheral portion. By using the cap up of the above structure, a curled portion is formed at the edge of the cap up or safety vent so as to surround the end of the safety vent or cap up. Thus, internal resistance can be reduced when the vibration or external impact is applied to the battery, and assembling error can be prevented.
US09397320B2
A case for a battery cell includes a heat radiation unit, a terminal unit, and an insulating frame interlocked with the heat radiation unit and the terminal unit to form the case. The heat radiation unit and the terminal unit are integrated by the insulating frame so that it is possible to prevent the heat radiation unit or the terminal unit from being separated from the case.
US09397319B2
A display device and a method of manufacturing the display device. The display device includes: a first substrate including a display region at which pixels are located; a second substrate on the first substrate while covering the display region; a sealant between the first substrate and the second substrate and surrounding the display region; and at least one protruding pattern located at an outer side of the sealant with respect to a center of the first substrate or the second substrate, on at least one of the first substrate or the second substrate.
US09397309B2
An OLED having an organic layer formed of a dopant and a host, where the organic layer is disposed between an anode and a cathode is disclosed. The dopant's concentration level in the organic layer, along a direction perpendicular to the first and second planar surfaces of the organic layer, defines a novel concentration gradient that enhances the OLED's efficiency.
US09397304B2
The invention relates to a transparent substrate for an organic light-emitting device comprising an electrode-bearing carrier, said electrode consisting in a multilayer comprising at least, in order starting from the substrate, a first dielectric layer (D1), a first conduction metal layer (M1), a second dielectric layer (D2), a second conduction metal layer (M2), and a third dielectric layer (D3), the conduction metal layers (M) in the electrode (11) being two in number, and the third dielectric layer (D3) not comprising an indium-oxide-based layer. It is characterised in that the geometric thickness of the second dielectric layer (D2) is at least 65 nm and the geometric thickness of the first conduction metal layer (M1) is at least 8.5 nm.
US09397301B2
The present invention provides a sulfone group-containing compound, an organic light emitting diode (OLED) device using the sulfone group-containing compound, and a method of fabricating the OLED device. The sulfone group-containing compound has formula as wherein the bridging unit R is capable of connecting to three or more than three fluorene sulfur oxide units; and the unit R1, R2 and R3 respectively connected to the fluorene sulfur oxide units are selected from alkyl chains, aromatic groups or heterocyclic groups. According to the present invention, the sulfone group-containing compound connects to three or more than three fluorene sulfur oxide units with a bridging unit to form a novel star-shaped molecular structure. The sulfone groups-containing compound combines electron affinity and transport properties of the fluorene sulfur oxide units and spatial characteristics of the star-shaped molecular structure, so that efficiency and lifetime of an OLED device using the same can be enhanced.
US09397297B2
An optical patterning mask, including a base substrate, a reflective layer disposed on the base substrate, the reflective layer including a first opening, a shadow pattern disposed on the base substrate and in the first opening, a thermal insulation layer disposed on the base substrate and covering the reflective layer and the shadow pattern, an absorption layer disposed on the thermal insulation layer, a bank layer disposed on the absorption layer, the bank layer including a second opening overlapping the first opening, a thermal conduction prevention pattern disposed on the absorption layer and overlapping the shadow pattern, and a transfer layer disposed on the absorption layer, the bank layer, and the thermal conduction prevention pattern.
US09397296B2
A method of manufacturing an organic light emitting display apparatus is presented. The method includes providing a device substrate on which a first electrode and a pixel definition layer covering a portion of the first electrode are formed, forming a master substrate on which a transfer mask is patterned to mirror positions of the pixel definition layer, coupling the transfer mask to the pixel definition layer, forming an organic material layer on the exposed portion of the first electrode using the transfer mask as a protection layer, and removing the transfer mask. The transfer mask may replace a deposition metal mask.
US09397288B2
A storage element includes a layer structure, which includes a storage layer including magnetization perpendicular to the film surface, in which the magnetization direction is changed corresponding to information; a magnetization fixing layer including magnetization perpendicular to the film surface that becomes a reference for information stored on the storage layer; a tunnel barrier layer made from an oxide provided between the storage layer and the magnetization fixing layer; and a spin barrier layer made from an oxide provided contacting the surface of the opposite side of the storage layer to the surface contacting the tunnel barrier layer. A low resistance region is formed in a portion of the spin barrier layer formed with a predetermined set film thickness value and information storage on the storage layer is performed by changing the magnetization direction of the storage layer by current flowing in the stacking direction of the layer structure.
US09397286B2
Magnetic memory cells include a magnetic tunnel junction and a first electrode, which is electrically coupled to the magnetic tunnel junction by a first conductive structure. This conductive structure includes a blocking layer and a seed layer, which extends between the blocking layer and the magnetic tunnel junction. The blocking layer is formed as an amorphous metal compound. In some of the embodiments, the blocking layer is a thermally treated layer and an amorphous state of the blocking layer is maintained during and post thermal treatment.
US09397284B2
The present invention relates to a piezoelectric circuit, a piezoelectric driving circuit driving the piezoelectric circuit, and a method for driving the piezoelectric circuit. The piezoelectric circuit includes a sub-piezoelectric circuit and an external inductor coupled in parallel with the sub-piezoelectric circuit. The external inductor discharges the sub-piezoelectric circuit when a polarity of a piezoelectric voltage, that is, a both-end voltage of the piezoelectric circuit is inverted. The piezoelectric driving circuit includes first and third switches connected to a first node of the piezoelectric circuit and second and fourth switches connected to a second node of the piezoelectric circuit.
US09397281B2
A carrier for carrying a semiconductor layer having a growth surface and at least one nano-patterned structure on the growth surface is provided. The at least one nano-patterned structure on the growth surface of the carrier has a plurality of mesas, a recess is formed between two adjacent mesas, in which a depth of the recess ranges from 10 nm to 500 nm, and a dimension of the mesa ranges from 10 nm to 800 nm.
US09397269B2
Provided are a light emitting diode (LED) in which a conductive barrier layer surrounding a reflective metal layer is defined by a protective insulating layer, and a method of manufacturing the same. A reflection pattern including a reflective metal layer and a conductive barrier layer is formed on an emission structure in which a first semiconductor layer, an active layer, and a second semiconductor layer are formed. The conductive barrier layer prevents diffusion of a reflective metal layer and extends to a protective insulating layer recessed under a photoresist pattern having an overhang structure during a forming process. Accordingly, a phenomenon where the conductive barrier layer is in contact with sidewalls of the photoresist pattern having an over-hang structure and the reflective metal layer forms points is prevented. Thus, LED modules having various shapes may be manufactured.
US09397259B2
A light emitting device includes a substrate, a plurality of light emitting cells disposed on the substrate to be spaced apart from each other, and a connection wire electrically connecting adjacent ones of the light emitting cells. One of the adjacent light emitting cells includes a plurality of first segments, and the other of the adjacent light emitting cells includes a plurality of second segments respectively facing the first segments. A separation distance is provided between first and second segments facing each other, where each of which has an end contacting the connection wire is greater than a separation distance between first and second segments facing each other, and each of which has an end that does not contact the connection wire.
US09397249B2
Apparatuses capable of and techniques for detecting long wavelength radiation are provided.
US09397244B2
A photodiodes array includes a useful layer made of CdxHg1-xTe; first doped zones each forming a PN junction with a second doped zone surrounding the first doped zones. The array includes regions located between two PN junctions, with a cadmium concentration gradient decreasing from the upper face to the lower face of the useful layer. A method of making such a photodiodes array includes producing, on the upper face of the useful layer, of a structured layer with at least one through opening, and with a cadmium concentration higher than the cadmium concentration in the useful layer; annealing the useful layer covered by the structured layer, with diffusion of cadmium atoms of the structured layer, from the structured layer to the useful layer; producing at least two PN junctions in the useful layer.
US09397236B2
A semiconductor device is made by providing a semiconductor die having an optically active area, providing a leadframe or pre-molded laminated substrate having a plurality of contact pads and a light transmitting material disposed between the contact pads, attaching the semiconductor die to the leadframe so that the optically active area is aligned with the light transmitting material to provide a light transmission path to the optically active area, and disposing an underfill material between the semiconductor die and leadframe. The light transmitting material includes an elevated area to prevent the underfill material from blocking the light transmission path. The elevated area includes a dam surrounding the light transmission path, an adhesive ring, or the light transmission path itself can be the elevated area. An adhesive ring can be disposed on the dam. A filler material can be disposed between the light transmitting material and contact pads.
US09397235B2
A string combiner is provided for coupling multiple strings of series-connected photovoltaic (PV) panels in a PV array to downstream equipment, each string including positive and negative conductors. The combiner includes a combiner box containing a busbar connected to the protection devices for receiving and combining the currents from the multiple strings of PV panels, output terminals for connection to the downstream equipment, and a disconnect device within the combiner box and including a multi-pole switch connected to the busbar for disconnecting the downstream equipment from the multiple strings. A plurality of connectors are provided for connecting selected poles of the multi-pole switch to each other or to selected ones of the output terminals in either a grounded or an ungrounded configuration.
US09397234B2
A pumping capacitor is provided. The pumping capacitor includes a substrate, a P-type gate layer on the substrate, and a gate dielectric layer between the substrate and the P-type gate layer. The substrate includes an N-type well region and an N-type doping region in the N-type well region.
US09397232B2
There is provided a nitride semiconductor epitaxial substrate having a group III nitride semiconductor layer with C-plane as a surface, grown on a substrate via a buffer layer of the group III nitride semiconductor containing Al, wherein the buffer layer has an inversion domain on the surface.
US09397226B2
An approach to forming a semiconductor structure for a vertical field effect transistor with a controlled gate overlap. The approach includes forming on a semiconductor substrate, a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a fourth semiconductor layer, a fifth semiconductor layer, and a first dielectric layer. The etched first dielectric layer and a first drain contact are surrounded by a first spacer. The first drain contact is composed of the fifth semiconductor layer. A second drain contact composed of the fourth semiconductor layer, a channel composed of the third semiconductor layer, and a second source contact composed of the second semiconductor layer are formed. Additionally, first source contact composed of the first semiconductor is formed and a gate electrode is formed on a portion of the first source contact layer surrounding a portion of the first pillar and the second pillar.
US09397224B2
A transistor in a display device is expected to have higher withstand voltage, and it is an object to improve the reliability of a transistor which is driven by high voltage or large current. A semiconductor device includes a transistor in which buffer layers are provided between a semiconductor layer forming a channel formation region and source and drain electrode layers. The buffer layers are provided between the semiconductor layer forming a channel formation region and the source and drain electrode layers in order to particularly relieve an electric field in the vicinity of a drain edge and improve the withstand voltage of the transistor.
US09397217B2
The invention relates to a contact structure of a semiconductor device. An exemplary structure for a semiconductor device comprises an insulation region over a substrate; a gate electrode layer over the insulation region comprising a gate middle line; a first contact structure over the insulation region adjacent to the gate electrode layer comprising a first middle line, wherein the first middle line and the gate middle line has a first distance; and a second contact structure over the insulation region on a side of the gate electrode layer opposite to the first contact structure comprising a second middle line, wherein the second middle line and the gate middle line has a second distance greater than the first distance.
US09397216B2
Semiconductor devices including a stressor in a recess and methods of forming the semiconductor devices are provided. The methods may include forming a fast etching region comprising phosphorous in an active region and forming a first trench in the active region by recessing the fast etching region. The methods may also include forming a second trench in the active region by enlarging the first trench using a directional etch process and forming a stressor in the second trench. The second trench may include a notched portion of the active region.
US09397193B2
A semiconductor integrated circuit apparatus and a method of manufacturing the same are provided. The semiconductor integrated circuit apparatus includes a semiconductor substrate having an active island, a gate buried in a predetermined portion of the active island, a source and a drain formed at both sides of the gate, and a current blocking layer formed in the active island corresponding to a lower portion of the drain. When current flows in from the drain, the current blocking layer is configured to discharge the current into the inside of the semiconductor substrate through a lower portion of the source.
US09397192B2
A semiconductor integrated circuit apparatus and a method of manufacturing the same are provided. The semiconductor integrated circuit apparatus includes a semiconductor substrate having an active island, a gate buried in a predetermined portion of the active island, a source and a drain formed at both sides of the gate, and a current blocking layer formed in the active island corresponding to a lower portion of the drain. When current flows in from the drain, the current blocking layer is configured to discharge the current into the inside of the semiconductor substrate through a lower portion of the source.
US09397188B2
A group III-N nanowire is disposed on a substrate. A longitudinal length of the nanowire is defined into a channel region of a first group III-N material, a source region electrically coupled with a first end of the channel region, and a drain region electrically coupled with a second end of the channel region. A second group III-N material on the first group III-N material serves as a charge inducing layer, and/or barrier layer on surfaces of nanowire. A gate insulator and/or gate conductor coaxially wraps completely around the nanowire within the channel region. Drain and source contacts may similarly coaxially wrap completely around the drain and source regions.
US09397187B2
Some embodiments include methods of forming diodes in which a first electrode is formed to have a pedestal extending upwardly from a base. At least one layer is deposited along an undulating topography that extends across the pedestal and base, and a second electrode is formed over the least one layer. The first electrode, at least one layer, and second electrode together form a structure that conducts current between the first and second electrodes when voltage of one polarity is applied to the structure, and that inhibits current flow between the first and second electrodes when voltage having a polarity opposite to said one polarity is applied to the structure. Some embodiments include diodes having a first electrode that contains two or more projections extending upwardly from a base, having at least one layer over the first electrode, and having a second electrode over the at least one layer.
US09397183B2
A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a first gate layer and a first dielectric layer thereon, and a shallow trench isolation (STI) in the substrate and surrounding the first gate layer and the first dielectric layer; removing the first dielectric layer; forming a first spacer on the sidewall of the STI above the first gate layer; and using the first spacer as mask to remove part of the first gate layer and part of the substrate for forming a first opening while defining a first gate structure and a second gate structure.
US09397174B2
A structure that provides a diffusion barrier between two doped regions. The structure includes a diffusion barrier including a semiconductor layer comprising a first doped region and a second doped region; and a diffusion barrier separating the first doped region and the second doped region, wherein the diffusion barrier comprises a doped portion and a notch above the doped portion.
US09397172B2
Provided is a semiconductor epitaxial wafer with reduced metal contamination achieved by higher gettering capability. The semiconductor epitaxial wafer includes a silicon wafer including COPs; a modifying layer formed from a certain element in the silicon wafer, in a surface portion of the silicon wafer; and an epitaxial layer on the modifying layer, wherein the full width half maximum of a concentration profile of the certain element in the depth direction of the modifying layer is 100 nm or less.
US09397167B2
A nitride semiconductor wafer includes a silicon substrate, a stacked multilayer unit, a silicon-containing unit, and an upper layer unit. The silicon substrate has a major surface. The stacked multilayer unit is provided on the major surface. The stacked multilayer unit includes N number of buffer layers. The buffer layers include an i-th buffer layer, and an (i+1)-th buffer layer provided on the i-th buffer layer. The i-th buffer layer has an i-th lattice length Wi in a first direction parallel to the major surface. The (i+1)-th buffer layer has an (i+1)-th lattice length W(i+1) in the first direction. A relation that (W(i+1)−Wi)/Wi≦0.008 is satisfied for all the buffer layers. The silicon-containing unit is provided on the stacked multilayer unit. The upper layer unit is provided on the silicon-containing unit.
US09397161B1
A method for fabricating a semiconductor device may include receiving a gated substrate comprising a substrate with a channel layer and a gate structure formed thereon, over-etching the channel layer to expose an extension region below the gate structure, epitaxially growing a halo layer on the exposed extension region using a first in-situ dopant and epitaxially growing a source or drain on the halo layer using a second in-situ dopant, wherein the first in-situ dopant and the second in-situ dopant are of opposite doping polarity. Using an opposite doping polarity may provide an energy band barrier for the semiconductor device and reduce leakage current. A corresponding apparatus is also disclosed herein.
US09397159B2
The disclosure relates to a semiconductor device. An exemplary structure for a semiconductor device comprises a substrate; a nanowire structure protruding from the substrate comprising a channel region between a source region and a drain region; a pair of silicide regions extending into opposite sides of the source region, wherein each of the pair of silicide regions comprising a vertical portion adjacent to the source region and a horizontal portion adjacent to the substrate; and a metal gate surrounding a portion the channel region.
US09397150B2
A top-emission type light emitting display device and a corresponding manufacturing method are described. A device substrate has display area and non-display areas. In the display area are formed: a thin film transistor including an active layer, a gate electrode, a source electrode, and a drain electrode; and an organic light emitting element including an anode, an organic light emitting layer, and a cathode. In the non-display area a second voltage supply wire is formed on, and overlaps with, a first voltage supply wire. An anti-burning layer is disposed between the first voltage and the second voltage supply wires. The anti-burning layer is an insulation layer with the same thickness as a space sufficient to suppress burning of the wires in the overlapping region between the first voltage supply wire and the second voltage supply wire, thus improving reliability and manufacturing yield of the device.
US09397148B2
Provided is an organic electroluminescence display device. The organic electroluminescence display device includes a bank that is provided so as to surround a central portion of a pixel electrode, an organic electroluminescence layer that is provided on the pixel electrode, a common electrode that is formed so as to extend from the organic electroluminescence layer to the bank, a color filter layer that overlaps the organic electro luminescence layer, a black matrix layer that overlaps the bank, a spacer that is provided on the black matrix layer, and a wiring that is provided on the black matrix layer so as to be placed on the spacer. The black matrix layer is disposed on the bank through the spacer. A convex portion is formed by the wiring being placed on the spacer, and the convex portion is electrically connected to the common electrode above the bank.
US09397147B2
A self-light emitting display unit capable of improving manufacturing yield is provided. Sizes of color pixel circuits corresponding to pixels for R, G, and B are respectively set unevenly within a pixel circuit according to a magnitude ratio of drive currents which allow color self-light emitting elements in the pixel to emit with a same light emission luminance. Thereby, the pattern densities of color pixel circuits respectively corresponding to the pixels for R, G, and B become even to each other, and the pattern defect rate as the whole pixel circuit is decreased.
US09397142B2
A semiconductor device includes a pillar-shaped resistance-changing layer on a contact and a reset gate insulating film that surrounds the pillar-shaped resistance-changing layer. A reset gate surrounds the reset gate insulating film, and the reset gate is electrically insulated from the pillar-shaped resistance-changing layer.
US09397140B2
A method of manufacturing a semiconductor device includes forming a stack of films including a conductive film layer above a semiconductor substrate; patterning the stack of films by dry etching; and cleaning including generation of plasma in an ambient including BCl3 and controlling a bias power to a nonbiased state.
US09397134B1
Methods and devices configured to provide selective heat transfer of a temperature-sensitive circuit are provided. In an example, a device comprises a thinned base substrate including an integrated circuit (e.g., back side illuminated (BSI) image sensor comprising a detector array area and a peripheral circuitry area). The device also comprises a supporting substrate comprising one or more thermoelectric structures. The supporting substrate may be coupled to the base substrate such that the one or more thermoelectric structures are aligned with the detector array area, and the thermoelectric structures may be configured to transfer heat away from the detector array area, while a reduced cross-section of a thinned base substrate may be configured to substantially reduce lateral heat flow across the base substrate and enable selective heat transfer.
US09397126B2
To eliminate electric discharge when an element formation layer including a semiconductor element is peeled from a substrate used for manufacturing the semiconductor element, a substrate over which an element formation layer and a peeling layer are formed and a film are made to go through a gap between pressurization rollers. The film is attached to the element formation layer between the pressurization rollers, bent along a curved surface of the pressurization roller on a side of the pressurization rollers, and collected. Peeling is generated between the element formation layer and the peeling layer and the element formation layer is transferred to the film. Liquid is sequentially supplied by a nozzle to a gap between the element formation layer and the peeling layer, which is generated by peeling, so that electric charge generated on surfaces of the element formation layer and the peeling layer is diffused by the liquid.
US09397124B2
An organic light-emitting diode display may have an array of pixels. Each pixel may have an organic light-emitting diode and thin-film transistor circuitry that controls current flow through the organic light-emitting diode. The thin-film transistor circuitry may include silicon thin-film transistors and semiconducting-oxide thin-film transistors. Double gate transistor structures may be formed in the transistors of the thin-film transistor circuitry. A double gate transistor may have a semiconductor layer sandwiched between first and second dielectric layers. The first dielectric layer may be interposed between an upper gate and the semiconductor layer and the second dielectric layer may be interposed between a lower gate and the semiconductor layer. Capacitor structures may be formed from the layers of metal used in forming the upper and lower gates and other conductive structures.
US09397120B2
An array substrate includes a substrate, a plurality of gate lines extending in a first direction on the substrate, a plurality of data lines including first and second data line pairs separated by cutting portions and a plurality of active patterns electrically connected to the first and second data line pairs. The data lines extend in a second direction crossing the first direction. The active patterns overlap the cutting portion and overlap a first gate line.
US09397118B2
An ambipolar electronic device is disclosed. The device may include a field-effect transistor (FET), which may have a handle substrate layer, two contacts and an inorganic crystalline layer between the handle substrate layer and the contacts. The inorganic crystalline layer may have a doped channel region between the contacts. The FET may also have a dielectric layer between the contacts, attached to the inorganic crystalline layer, and a gate layer, attached to the dielectric layer. The FET may conduct current, in response to a first gate voltage applied to the gate layer, using electrons as a majority carrier, along the length of the channel region between the contacts. The FET may also conduct current, in response to a second gate voltage applied to the gate layer, using holes as a majority carrier, along the length of the channel region between the contacts.
US09397115B1
A stack is formed over a substrate, which comprises an alternating plurality of first material layers including a first material and second material layers including a second material. A patterned hard mask is formed, which includes multiple laterally spaced apart strips. A trimming material layer is formed over the hard mask layer. At least one cycle of process steps is subsequent performed, which include etching the first material employing the second material and the trimming material layer as an etch mask, trimming the trimming material layer to expose a strip of the hard mask layer, etching the second material and the exposed strip of the hard mask layer employing the trimming material layer as an etch mask, and trimming the trimming material layer to expose an edge of a next strip of the hard mask layer. Stepped surfaces suitable for formation of contact via array can thus be formed.
US09397114B2
Methods of fabricating three-dimensional semiconductor memory devices including forming a plate stack structure with insulating layers and sacrificial layers stacked alternatingly on a substrate, forming first and second trenches separating the plate stack structure into a plurality of mold structures, the first trench being between the second trenches, forming first vertical insulating separators in the first and second trenches, forming semiconductor patterns penetrating the mold structure and being spaced apart from the first and second trenches, removing the first vertical insulating separator from the second trench to expose the sacrificial layers, removing the sacrificial layers exposed by the second trench to form recess regions partially exposing the semiconductor patterns and the first vertical insulating separator, and forming conductive patterns in the recess regions.
US09397109B1
According to one embodiment, a semiconductor memory device includes a substrate; a stacked body provided on the substrate and including a first stacked portion, a second stacked portion and an intermediate layer, the first stacked portion and the second stacked portion including a plurality of electrode layers and a plurality of insulating layers, the intermediate layer provided between the first stacked portion and the second stacked portion; a column including a semiconductor film and a charge storage film; and an insulating part provided in the stacked body. The column has a first enlarged portion. The insulating part has a second enlarged portion surrounded by the intermediate layer, the second enlarged portion has a larger width than a width of the portion of the insulating part in the first stacked portion and the second stacked portion.
US09397105B2
Methods, devices, and systems associated with charge storage structures in semiconductor devices are described herein. In one or more embodiments, a method of forming nanodots includes forming at least a portion of a charge storage structure over a material by reacting a single-source precursor and a reactant, where the single-source precursor includes a metal and a semiconductor.
US09397099B1
A semiconductor device having a plurality of fins including at least one first fin and at least one second fin formed on a semiconductor substrate is provided. Each of the first fin and second fin has a first portion and a second portion. A gate electrode structure overlies the first portion of the plurality of fins. The gate electrode structure includes a gate electrode, and a gate dielectric layer between the gate electrode and the plurality of fins. A first electrode overlies the second portion of the plurality of fins and the first electrode is in electrical contact with the second portion of the plurality of fins. The gate electrode structure is in direct physical contact with the first portion of the first fin and the gate electrode structure is spaced apart from the first portion of the second fin.
US09397098B2
A semiconductor device includes semiconductor fins on semiconductor strips on a substrate. The semiconductor fins are parallel to each other. A gate stack is over the semiconductor fins, and a drain epitaxy semiconductor region is disposed laterally from a side of the gate stack and on the semiconductor strips. A first dielectric layer is over the substrate, and the first dielectric layer has a first metal layer. A second dielectric layer is over the first dielectric layer, and the second dielectric layer has a second metal layer. Vias extend from the second metal layer and through the first dielectric layer, and the vias are electrically coupled to the drain epitaxy semiconductor region.
US09397094B2
A semiconductor structure having a first source/drain semiconductor structure connected to a vertical channel such that the source/drain semiconductor structure has a vertical side that is substantially planar with a vertical side of the first vertical channel, the vertical channel being perpendicular relative to a layer of substrate to which the source/drain semiconductor structure is attached.
US09397090B1
A semiconductor device includes first metal-on-semiconductor (MOS), second MOS, and bipolar junction (BJ) structures formed in a substrate. The first MOS structure includes first drain, first channel, and first source regions arranged along a first direction. The first MOS structure further includes a drain electrode formed over and conductively coupled to the first drain region, and a body region formed below and conductively coupled to the channel region. The second MOS structure includes second drain, second channel, and second source regions arranged along a second direction different from the first direction. The BJ structure includes emitter, base, and collector regions. The first source region and the second drain region share a first common semiconductor region in the substrate. The drain electrode and the base region share a second common semiconductor region in the substrate. The body region and the collector region share a third common semiconductor region in the substrate.
US09397089B2
There are disclosed herein various implementations of a group III-V high electron mobility transistor (HEMT) having a selectably floating substrate. Such a group III-V HEMT is situated over a substrate, and includes a transistor configured to selectably couple the substrate to ground and to selectably decouple the substrate from ground. The transistor is configured to ground the substrate when the group III-V HEMT is in an off-state and to cause the substrate to float when the group III-V HEMT is in an on-state.
US09397086B2
Device structures, design structures, and fabrication methods for passive devices that may be used as electrostatic discharge protection devices in fin-type field-effect transistor integrated circuit technologies. A portion of a device layer of a semiconductor-on-insulator substrate is patterned to form a device region. A well of a first conductivity type is formed in the epitaxial layer and the device region. A doped region of a second conductivity type is formed in the well and defines a junction with a portion of the well. The epitaxial layer includes an exterior sidewall spaced from an exterior sidewall of the device region. Another portion of the device layer may be patterned to form fins for fin-type field-effect transistors.
US09397085B2
An integrated circuit and method with a bidirectional ESD transistor. A base diffusion separates an emitter diffusion and a collector diffusion. Silicide is blocked from the base diffusion, the emitter-base junction, the collector-base junction, and from equal portions of the emitter diffusion and the collector diffusions.
US09397082B2
First and second semiconductor die are mounted to first and second die pads of a lead frame disposed in a lead frame sheet. With a plurality of wire bonds, each post of a plurality of posts of the lead frame is connected to the first and second semiconductor die. Each post extends inward from opposite sides of the lead frame between the first and second die pads and is connected with a respective one of a plurality of leads of the lead frame. The first and second semiconductor die, the plurality of posts of the lead frame, and the plurality of wire bonds are encapsulated in a package. The lead frame sheet is sheared to define each lead of the plurality of leads. The plurality of posts includes first and second sets of posts extending inward from first and second opposite sides of the lead frame.
US09397080B2
A method of packaging semiconductor dies may include: coupling a first die to a first substrate; forming a plurality of first portions of a plurality of metal pillars on a surface of the first substrate; forming a second portion of the plurality of metal pillars over each of the plurality of first portions of the plurality of metal pillars; forming a protection layer over sidewalls of each of the plurality of first portions and second portions of the plurality of metal pillars; coupling a second die to a second substrate; and coupling the plurality of metal pillars to the second substrate.
US09397079B2
Embodiments of the present disclosure are directed to integrated circuit (IC) package assemblies with three-dimensional (3D) integration of multiple dies, as well as corresponding fabrication methods and systems incorporating such 3D IC package assemblies. A bumpless build-up layer (BBUL) package substrate may be formed on a first die, such as a microprocessor die. Laser radiation may be used to form an opening in a die backside film to expose TSV pads on the back side of the first die. A second die, such as a memory die stack, may be coupled to the first die by die interconnects formed between corresponding TSVs of the first and second dies. Underfill material may be applied to fill some or all of any remaining gap between the first and second dies, and/or an encapsulant may be applied over the second die and/or package substrate. Other embodiments may be described and/or claimed.
US09397078B1
Semiconductor device assemblies with underfill containment cavities are disclosed herein. In one embodiment, a semiconductor device assembly can include a first semiconductor die having a base region formed from a substrate material, a recessed surface along the base region, a peripheral region formed from the substrate material and projecting from the base region, and a sidewall surface along the peripheral region and defining a cavity with the sidewall surface in the peripheral region. The semiconductor device assembly further includes a thermal transfer structure attached to the peripheral region of the first die adjacent the cavity, and an underfill material at least partially filling the cavity and including a fillet between the peripheral region and the stack of second semiconductor dies.
US09397076B2
A semiconductor apparatus with an optoelectronic device and a further device is disclosed. Embodiments of the invention provide a semiconductor apparatus with an optoelectronic device and a further device, wherein the optoelectronic device and the further device are interconnected to one another in parallel when the semiconductor apparatus is in operation, wherein the optoelectronic device is connected to a first contact and a second contact, the first contact and the second contact being configured to externally contact the semiconductor apparatus, and wherein the further device is connected with at least one further contact of the semiconductor apparatus.
US09397063B2
A method of making an assembly includes the steps of applying metallic nanoparticles to exposed surfaces of conductive elements of either of or both of a first component and a second component, juxtaposing the conductive elements of the first component with the conductive elements of the second component with the metallic nanoparticles disposed therebetween, and elevating a temperature at least at interfaces of the juxtaposed conductive elements to a joining temperature at which the metallic nanoparticles cause metallurgical joints to form between the juxtaposed conductive elements. The conductive elements of either of or both of the first component and the second component can include substantially rigid posts having top surfaces projecting a height above the surface of the respective component and edge surfaces extending at substantial angles away from the top surfaces thereof.
US09397057B2
According to an embodiment, a semiconductor device comprises an insulative resin, an interconnect, a plurality of semiconductor elements, a first conductive unit, a first connector, and a first metal layer. The insulative resin includes a first region and a second region. At least a portion of the interconnect is arranged with at least a portion of the first region in a first direction. The first conductive unit pierces the second region in the first direction. At least a portion of the first connector is arranged with at least a portion of the first conductive unit in the first direction. At least a portion of the first connector is arranged with at least a portion of the interconnect in a second direction intersecting the first direction. The first metal layer is provided between the first conductive unit and the first connector. The first metal layer contacts the insulative resin.
US09397051B2
To reduce warpage in at least one area of a wafer, a stress/warpage management layer (810) is formed to over-balance and change the direction of the existing warpage. For example, if the middle of the area was bulging up relative to the area's boundary, the middle of the area may become bulging downward, or vice versa. Then the stress/warpage management layer is processed to reduce the over-balancing. For example, the stress/management layer can be debonded from the wafer at selected locations, or recesses can be formed in the layer, or phase changes can be induced in the layer. In other embodiments, this layer is tantalum-aluminum that may or may not over-balance the warpage; this layer is believed to reduce warpage due to crystal-phase-dependent stresses which dynamically adjust to temperature changes so as to reduce the warpage (possibly keeping the wafer flat through thermal cycling). Other features are also provided.
US09397045B2
A structure and a formation method of a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a first conductive feature over the semiconductor substrate. The semiconductor device also includes a first dielectric layer over the semiconductor substrate and surrounding the first conductive feature. The semiconductor device further includes a second conductive feature over the first conductive feature, and the second conductive feature extends into the first conductive feature. In addition, the semiconductor device includes a second dielectric layer over the first dielectric layer and surrounding the second conductive feature.
US09397038B1
In a microelectronic component having conductive vias (114) passing through a substrate (104) and protruding above the substrate, conductive features (120E.A, 120E.B) are provided above the substrate that wrap around the conductive vias' protrusions (114′) to form capacitors, electromagnetic shields, and possibly other elements. Other features and embodiments are also provided.
US09397035B2
The disclosure describes a metal-wire-based method for making an integrated ingot, which basically comprises a dielectric matrix and a patterned array of metal wires, and may further comprise other additive elements at desired locations. After sawing the integrated ingot into slices, a plurality of substrates containing through substrate metal pillars and other additive elements at desired locations are produced in a batch way. The metal-wire-based method comprises the key steps: forming a patterned array of metal wires, precisely integrating other additive elements at desired locations when needed, forming a solid dielectric material in the empty space among and around metal wires and other additive elements. Furthermore, a guidance metal wire method is described for precisely integrating other additive elements at desired locations in a patterned array of metal wires.
US09397029B1
A power semiconductor package device and a method of preparation the device are disclosed. The package device includes a die paddle, a first pin, a second pin, and a semiconductor chip attached to the die paddle. A first electrode, a second electrode and a third electrode of the semiconductor chip are connected to the first pin, the second pin and the die paddle respectively. A plastic package body covers the semiconductor chip, the die paddle, the first pin and the second pin. The first pin and the second pin are located near two adjacent corners of the plastic package body. The bottom surface and two side surfaces of each of the first pin and the second pin are exposed from the plastic package body. Locking mechanisms are constructed to prevent the first pin and the second pin from falling off the power semiconductor package device during a manufacturing cutting process. Portions of the first pin, portions of the second pin, and portions of the plastic package body can be cut off. Therefore, the size of the power semiconductor package device is reduced.
US09397028B2
In one embodiment, methods for making semiconductor devices are disclosed.
US09397015B2
A semiconductor device has an insulating substrate, a semiconductor element which is mounted on the insulating substrate, a hollow casing which surrounds a peripheral edge of the insulating substrate to contain the semiconductor element therein, and a sealing material which is charged into the casing to seal the inside of the casing. The casing has protrusion portions each of which partially protrudes from an upper surface of the casing. Thus, it is possible to provide a semiconductor device in which poor external appearance or lowering of adhesion to a cover can be prevented even when a sealing material is injected up to the vicinity of an upper surface of a casing.
US09397009B2
A process is disclosed of forming metal replacement gates for NMOS and PMOS transistors with oxygen in the PMOS metal gates and metal atom enrichment in the NMOS gates such that the PMOS gates have effective work functions above 4.85 eV and the NMOS gates have effective work functions below 4.25 eV. Metal work function layers in both the NMOS and PMOS gates are oxidized to increase their effective work functions to the desired PMOS range. An oxygen diffusion blocking layer is formed over the PMOS gate and an oxygen getter is formed over the NMOS gates. A getter anneal extracts the oxygen from the NMOS work function layers and adds metal atom enrichment to the NMOS work function layers, reducing their effective work functions to the desired NMOS range. Processes and materials for the metal work function layers, the oxidation process and oxygen gettering are disclosed.
US09397002B1
A technique relates to punchthrough stop (PTS) doping in bulk fin field effect transistors. Fins are formed on a substrate, and each pair of the fins has a fin pitch. Each of the fins has an undoped fin channel and a punchthrough stop doping region underneath the undoped fin channel. A narrow shallow trench isolation trench is formed between the fin pitch of the fins. A wide shallow trench isolation trench is formed at an outside edge of the fins. A doped layer fills the narrow shallow trench isolation trench and the wide shallow trench isolation trench. A vertical thickness of the doped layer in the narrow shallow trench isolation trench is greater than a vertical thickness of the wide shallow trench isolation trench.
US09397001B2
An electronic component manufacturing method according to an aspect of the present disclosure includes providing a support substrate, forming a release layer including a metal or a metal oxide on a first surface of the support substrate, forming a resin substrate on the release layer, forming a functional element on the resin substrate, and separating the resin substrate from the support substrate by applying laser light to the support substrate through a second surface of the support substrate. The laser light that reaches an interface between the resin substrate and the release layer after being transmitted through the support substrate and the release layer has an energy density lower than a threshold for the resin substrate to be processed by the laser light.
US09396993B2
The present disclosure relates to a method for forming a semiconductor device. The method includes forming a first aluminum pad layer on a metal layer, forming an adhesion layer on the first aluminum pad layer, etching the adhesion layer so as to form a patterned adhesion layer, and forming a second aluminum pad layer on the first aluminum pad layer and the patterned adhesion layer.
US09396992B2
A barrier seed tool is configured to clean trenches in a first chamber, line the trenches with a diffusion barrier layer, and form a copper seed layer over the diffusion barrier layer in a second chamber. The clean chamber is configured to reduce overhangs in the copper seed layer by producing a plasma comprising positively and negatively charged ions including halogen ions, filtering the plasma to selectively exclude positively charged ions, and bombarding with the filtered plasma. The tool and related method can be used to reduce overhangs and improve subsequent gap fill while avoiding excessive damage to the dielectric matrix.
US09396988B2
A method for fabricating a semiconductor device includes sequentially forming an interlayer insulating layer and a hard mask pattern including a first opening on a substrate including a lower pattern, forming a trench exposing the lower pattern in the interlayer insulating layer using the hard mask pattern, forming a liner layer including a first part formed along sidewalls and a bottom surface of the trench and a second part formed along a top surface of the hard mask pattern, forming a sacrificial pattern exposing the second part of the liner layer in the trench, removing the second part of the liner layer and the hard mask pattern using the sacrificial pattern, and after the removing of the hard mask pattern, removing the sacrificial pattern to expose the first part of the liner layer.
US09396987B2
The invention relates to a method for fabricating a substrate, comprising the steps of providing a donor substrate with at least one free surface, performing an ion implantation at a predetermined depth of the donor substrate to form an in-depth predetermined splitting area inside the donor substrate, and is characterized in providing a layer of an adhesive, in particular an adhesive paste, over the at least one free surface of the donor substrate. The invention further relates to a semiconductor structure comprising a semiconductor layer, and a layer of a ceramic-based and/or a graphite-based and/or a metal-based adhesive provided on one main side of the semiconductor layer.
US09396982B2
A semiconductor package and a manufacturing method thereof are provided. The package element has a first insulating layer, and a plurality of holes are disposed on the first surface of the first insulating layer. Besides, a plurality of package traces are embedded in the insulating layer and connected to the other end of the holes. The holes function as a positioning setting for connecting the solder balls to the package traces, such that the signal of the semiconductor chip is connected to the package trace via conductor of the chip, and further transmitted externally via solder ball. The elastic modulus of the material of the first insulating layer is preferably larger than 1.0 GPa.
US09396980B2
The present invention provides an anti-electrostatic cassette, which mainly comprises at least an electrostatic discharge (ESD) device connected electrically to the carrying frames, which are disposed in the substrate cassette and carry the substrates, and to the handles, which are disposed on the outer sides of the substrate cassette, for forming the conductive path. By means of the contact between the equipment and the two handles of the substrate cassette, the residual static charges on the substrates are conducted to the ground for reducing the residual static charges on the substrates. Consequently, the ESD phenomena in the substrates due to friction can be avoided and hence preventing the damages in the substrates caused by static charges.
US09396977B2
A method, device, and apparatus is provided for detecting moisture and/or electrically conductive remains on a wafer after the wafer is removed from a drying chamber of a processing tool that includes wet clean processing. Embodiments include fixing a wafer to an endeffector between a processing chamber and a FOUP, moving the wafer from the processing chamber toward the FOUP, detecting moisture and/or electrically conductive remains on the wafer, and delivering the wafer to the FOUP, if no moisture and/or electrically conductive remains are detected, or delivering the wafer to a buffer station, if moisture and/or electrically conductive remains are detected.
US09396965B2
In one embodiment, a method for etching a metal layer on a substrate may include providing a hydrogen-containing gas and an impurity gas to a plasma chamber; generating a plasma from the hydrogen-containing gas and the impurity gas in the plasma chamber, the plasma comprising hydrogen-containing ions; providing gaseous species from the plasma chamber to the substrate, wherein the providing the gaseous species comprises directing an ion beam comprising the hydrogen-containing ions formed from the plasma through an extraction aperture of an extraction plate disposed between the substrate and the plasma.
US09396964B2
A plasma processing apparatus includes: a process chamber which accommodates a substrate to be processed; a lower electrode disposed in the process chamber; an upper electrode including an electrode plate that is detachable and discharges a process gas inside the form of shower into the process chamber; a gas supply unit including a central pipe and a edge pipe for supplying the process gas to the upper electrode; a first high frequency power source which applies high frequency power for plasma generation to the lower electrode; pressure indicators which detect pressures inside gas supply pipes; and a controller which measures a degree of consumption of the electrode plate based on the pressures detected by the pressure indicators and calculates a variation in process rate resulting due to the consumption of the electrode plate to adjust process conditions to resolve the variation in process rate.
US09396962B2
An etching method can etch a region formed of silicon oxide. The etching method includes an exposing process (process (a)) of exposing a target object including the region formed of the silicon oxide to plasma of a processing gas containing a fluorocarbon gas, etching the region, and forming a deposit containing fluorocarbon on the region; and an etching process (process (b)) of etching the region with a radical of the fluorocarbon contained in the deposit. Further, in the method, the process (a) and the process (b) are alternately repeated.
US09396955B2
A plasma tuning rod system is provided with one or more microwave cavities configured to couple electromagnetic (EM) energy in a desired EM wave mode to a plasma by generating resonant microwave energy in one or more plasma tuning rods within and/or adjacent to the plasma. One or more microwave cavity assemblies can be coupled to a process chamber, and can comprise one or more tuning spaces/cavities. Each tuning space/cavity can have one or more plasma tuning rods coupled thereto. The plasma tuning rods can be configured to couple the EM energy from the resonant cavities to the process space within the process chamber and thereby create uniform plasma within the process space.
US09396951B2
Oxide growth of a gate dielectric layer that occurs between processes used in the fabrication of a gate dielectric structure can be reduced. The reduction in oxide growth can be achieved by maintaining the gate dielectric layer in an ambient effective to mitigate oxide growth of the gate dielectric layer between at least two sequential process steps used in the fabrication the gate dielectric structure. Maintaining the gate dielectric layer in an ambient effective to mitigate oxide growth also improves the uniformity of nitrogen implanted in the gate dielectric.
US09396940B2
Embodiments disclosed herein relate to a TFT and methods for manufacture thereof. Specifically, the embodiments herein relate to methods for forming a semiconductor layer at a low temperature for use in a TFT. The semiconductor layer may be formed by depositing a nitride or oxynitride layer, such as zinc nitride or oxynitride, and then converting the nitride layer into an oxynitride layer with a different oxygen content. The oxynitride layer is formed by exposing the deposited nitride layer to a wet atmosphere at a temperature between about 85 degrees Celsius and about 150 degrees Celsius. The exposure temperature is lower than the typical deposition temperature used for forming the oxynitride layer directly or annealing, which may be performed at temperatures of about 400 degrees Celsius.
US09396932B2
Certain electronic applications, such as OLED display back panels, require small islands of high-quality semiconductor material distributed over a large area. This area can exceed the areas of crystalline semiconductor wafers that can be fabricated using the traditional boule-based techniques. This specification provides a method of fabricating a crystalline island of an island material, the method comprising depositing particles of the island material abutting a substrate, heating the substrate and the particles of the island material to melt and fuse the particles to form a molten globule, and cooling the substrate and the molten globule to crystallize the molten globule, thereby securing the crystalline island of the island material to the substrate. The method can also be used to fabricate arrays of crystalline islands, distributed over a large area, potentially exceeding the areas of crystalline semiconductor wafers that can be fabricated using boule-based techniques.
US09396924B2
An electrodeless, microwave lamp has a magnetron as a microwave source and an excitable material lucent crucible in whose excitable material a plasma is established. For coupling microwaves from the magnetron into the crucible, an air wave guide coupling circuit is provided, with an output of the magnetron as an input at one quarter lambda from one end and an output at one quarter from the other end as an input to a connection to the crucible.
US09396919B2
A method of operating a gas-filled collision cell in a mass spectrometer is provided. The collision cell has a longitudinal axis. Ions are caused to enter the collision cell. A trapping field is generated within the collision cell so as to trap the ions within a trapping volume of the collision cell, the trapping volume being defined by the trapping field and extending along the longitudinal axis. Trapped ions are processed in the collision cell and a DC potential gradient is provided, using an electrode arrangement, resulting in a non-zero electric field at all points along the axial length of the trapping volume so as to cause processed ions to exit the collision cell. The electric field along the axial length of the trapping volume has a standard deviation that is no greater than its mean value.
US09396918B2
A sample plate in use with a MALDI-TOF (matrix-assisted laser desorption ionization time-of-flight) mass spectrometer. The sample plate is usable for the mass spectrometry of a polymeric material on the order of several hundreds of Da and a method of manufacturing the same sample plate. The sample plate including a target plate, an organic matrix formed on one surface of the target plate, and a Parylene thin film formed on the target plate on which the organic matrix is formed, the Parylene thin film entirely covering the organic matrix.
US09396915B2
Automated installation processing of a mass spectrometer is described. Software is executed providing a user interface for controlling the installation process. Manual setup operations in connection with physical installation of the mass spectrometer are performed. Instrument level testing of the mass spectrometer is performed. The instrument level testing includes automating execution of a first test sequence in response to a first user interface selection. The first test sequence includes one or more performance tests whereby mass spectral data characterizing observed performance of the mass spectrometer is compared to predetermined performance criteria. System level testing of functionality of the mass spectrometer in combination with one or more other components is performed upon successful completion of said instrument level testing. The system level testing includes automating execution of a second test sequence in response to a second user interface selection. System level testing is performed after successful completion of instrument level testing.
US09396910B2
A heat transfer plate useful in a showerhead electrode assembly of a capacitively coupled plasma processing apparatus. The heat transfer plate includes independently controllable gas volumes which may be pressurized to locally control thermal conductance between a heater member and a cooling member such that uniform temperatures may be established on a plasma exposed surface of the showerhead electrode assembly.
US09396909B2
A gas dispersion apparatus for use with a process chamber, comprising: a quartz body having a top, a ring coupled to a bottom surface of the top and a bottom plate having dispersion holes coupled to the ring opposite the top; a plurality of quartz plates disposed between the top and the bottom plate, wherein the plurality of plates are positioned above one another and spaced apart to form a plenum above each of the plurality of plates and the bottom plate; a plurality of quartz tubes to couple the plenums to the plurality of dispersion holes, each of the plurality of quartz tubes having a first end disposed within one of the plenums and having a second end coupled to one of the dispersion holes; and a plurality of conduits disposed through the top, wherein each of the plurality of conduits is coupled to one of the plenums.
US09396903B1
An apparatus to control an ion beam for treating a substrate. The apparatus may include a fixed electrode configured to conduct the ion beam through a fixed electrode aperture and to apply a fixed electrode potential to the ion beam, a ground electrode assembly disposed downstream of the fixed electrode. The ground electrode assembly may include a base and a ground electrode disposed adjacent the fixed electrode and configured to conduct the ion beam through a ground electrode aperture, the ground electrode being reversibly movable along a first axis with respect to the fixed electrode between a first position and a second position, wherein a beam current of the ion beam at the substrate varies when the ground electrode moves between the first position and second position.
US09396891B2
A switchgear has an interrupter unit that includes an arc gap. A first and a second switching contact piece are movable relative to one another. A switching-gas duct originates in the arc gap and connects the arc gap to the surroundings of the interrupter unit. A hollow vessel arrangement delimits at least some sections of the switching-gas duct and is connected to one of the contact pieces. The hollow vessel arrangement includes an external outlet opening for the switching-gas duct.
US09396890B2
A barrier member is for an arc chute assembly of an electrical switching apparatus. The arc chute assembly comprises a first sidewall and a second sidewall opposite and spaced apart from said first sidewall. The barrier member comprises a body portion structured to be disposed between said first sidewall and said second sidewall, said body portion comprising a first support portion, a second support portion, and a cover portion connecting said first support portion to said second support portion; a first containment portion extending from said first support portion, said first containment portion being structured to be disposed proximate said first sidewall; and a second containment portion extending from said second support portion toward said first containment portion, said second containment portion being structured to be disposed proximate said second sidewall, wherein said second containment portion is spaced from said first containment portion.
US09396889B1
A secondary disconnect assembly is for an electrical switching apparatus. The secondary disconnect assembly includes a terminal block assembly comprising a mounting member including a number of protrusions, and a cradle assembly coupled to the mounting member and being movable among a plurality of positions with respect to the mounting member. The cradle assembly includes a cradle housing and an inner cradle movably disposed with the cradle housing. The protrusions align and guide the inner cradle with respect to the mounting member. When the inner cradle is disposed in a first predetermined one of the positions, the number of protrusions engage and lock the inner cradle to restrict movement of the inner cradle with respect to the mounting member. When the inner cradle is moved toward a second predetermined one of the positions, the number of protrusions release the inner cradle to move independently with respect to the mounting member.
US09396883B2
Embodiments of the present disclosure are directed towards Faradaic energy storage device structures and associated techniques and configurations. In one embodiment, an apparatus includes an apparatus comprising a substrate having a plurality of holes disposed in a surface of the substrate, the plurality of holes being configured in an array of multiple rows and an active material for Faradaic energy storage disposed in the plurality of holes to substantially fill the plurality of holes. Other embodiments may be described and/or claimed.
US09396881B2
Disclosed is (1) an anode body for capacitors, which is composed of a sintered body containing tungsten dioxide in amount of 80 mass % or more and preferably silicon element in amount of 3.4 mass % or less, (2) a powder as a raw material of the sintered body containing a mixture of tungsten dioxide and silicon element powder in an amount of 80 mass % or more and 3.4 mass % or less, respectively, and which may optionally contain metal tungsten powder, (3) a method for producing an anode body for capacitors, and (4) an electrolytic capacitor which uses the anode body as one electrode and has a dielectric body interposed between the electrode and a counter electrode.
US09396874B2
A method of manufacturing a coil substrate, includes forming a plurality of structures, each of the structures including a first insulating layer and a metal layer formed on the first insulating layer; forming a stacked structure by stacking the structures while connecting the metal layers of the adjacent structures in series; and shaping the stacked structure such that the metal layers of the structures are shaped at the same time to be in shapes of wirings, each becomes a part of a spiral-shaped coil, to form the spiral-shaped coil in which the wirings of the adjacent structures are connected in series.
US09396867B2
Described herein are configurations for an integrated resonator-shield structure for wireless power transfer. In embodiments a conductor shield is used to shield the resonator from perturbing objects. In embodiments the conductor shield is used for a current return path for the conductors of the resonator. The resonator shield can be divided into separate conductor segments to tailor the current distributions in the conductor shield.
US09396865B1
An auxiliary winding circuit board includes one or more auxiliary conductive windings. The auxiliary winding circuit board is positioned at an axial end of a bobbin, and a core leg extends through an opening in the auxiliary winding circuit board. A main conductive winding is positioned on the bobbin. The auxiliary winding disposed on the auxiliary printed circuit board has enhanced voltage-isolation from the main winding positioned on the bobbin, allowing both a high-voltage main winding and a low-voltage auxiliary winding to be located on one magnetic component. The magnetic component is configured for mounting on a printed circuit board for an electronic device such as a power supply. A modular magnetic component apparatus includes a bobbin with main winding assembly and multiple auxiliary winding circuit boards that may be interchangeably mounted between the bobbin and core for desired applications.
US09396863B2
A transformer, according to one possible embodiment, includes: a bobbin part formed by stacking a plurality of bobbins including external connection terminals; and coils respectively wound around the plurality of bobbins. At least one bobbin of the plurality of bobbins includes withdrawing grooves formed in a space between the external connection terminals, the respective coil wound around the at least one bobbin being withdrawn outside the bobbin via the withdrawing grooves and coupled to the external connection terminal.
US09396862B2
A secondary transformer unit for mounting on a vehicle having an electric drive includes at least one secondary core, and at least one secondary coil that is arranged on the secondary core. At least one outer skin is provided to envelope the secondary core and contains reinforcing fibers. The outer skin is configured to retain inside the at least one outer skin fragments produced when the at least one secondary core breaks.
US09396855B2
A method includes the steps of: bringing a refrigerator's distal end into contact with a contact of a heat transfer member to thermally connect the refrigerator via the heat transfer member to a superconducting coil to cool the superconducting coil to cryogenic temperature; after the step of bringing the refrigerator's distal end into contact with the contact of the heat transfer member, bringing the refrigerator's distal end out of contact with the contact of the heat transfer member; and after the step of bringing the refrigerator's distal end out of contact with the contact of the heat transfer member, injecting liquid helium into a helium tank.
US09396850B2
A grain oriented electrical steel sheet (1) suppresses the content of Cr in the grain oriented electrical steel sheet to 0.1 mass % or less; (2) sets the coating weight of a forsterite coating, in terms of basis weight of oxygen therein, to at least 3.0 g/m2 and thickness of an anchor portion as a lower portion of forsterite coating to 1.5 μm or less; and (3) controls setting the magnitude of deflection of a test specimen having length: 280 mm to at least 10mm when the forsterite coating is provided on only one surface thereof and at least 20 mm when forsterite coating and the tension coating are provided on the surface.
US09396845B2
A coaxial electric wire with an inner conductor, an inner insulating layer covering a periphery of the inner conductor, an outer conductor covering a periphery of the inner insulating layer, and an outer insulating layer covering a periphery of the outer conductor, where the inner insulating layer is made of a first insulating tube having an elongated cylindrical shape and an insulation performance, the outer insulating layer is made of a second insulating tube having an elongated cylindrical shape and an insulation performance, the outer conductor is made of a conductive tube having an elongated cylindrical shape and conductivity, the coaxial electric wire is manufactured by inserting the inner conductor into the first insulating tube, inserting the first insulating tube into the conductive tube, and inserting the conductive tube into the second insulating tube.
US09396841B2
A noise suppression cable includes a plurality of twisted pair wires, an inclusion that includes an insulating material and a magnetic powder and separates the plurality of twisted pair wires, and a sheath that includes an insulating material and covers a periphery of the plurality of twisted pair wires and the inclusion.
US09396837B2
An electrical conduction device is provided having an electrically conductive conduction element and an electrically insulating sheathing surrounding said conduction element at least in regions. An overhang corona shielding in the form of a coating composed of a material having a resistivity that increases towards an end of the sheathing is arranged on the sheathing at an outer side. An overhang corona shielding arrangement and a method for producing an overhang corona shielding are also provided.
US09396830B2
There is provided a zinc oxide sintered compact with a zirconium content of 10 to 1000 ppm, and a sputtering target containing the zinc oxide sintered compact. There is also provided a zinc oxide thin-film having a zirconium content of 10 to 2000 ppm and a resistivity of 10 Ω·cm or greater.
US09396826B2
An isotope production target may include an outer diameter wall and an inner diameter wall. An isotope source may be located between the inner diameter wall and the outer diameter wall, and the isotope source may comprise fissile material interspersed with one or more voided regions. A central region may be located within the inner diameter wall, and the central region may be configured to house a neutron thermalization volume.
US09396821B2
A safety system for a nuclear plant includes a plurality of catalytic recombiner elements each triggering a recombination reaction with oxygen when hydrogen is entrained in an onflowing gas flow, so that reliable elimination of the hydrogen from the gas mixture is ensured with an especially high degree of operational safety even based on comparatively extreme conditions or scenarios of the aforementioned type. The recombiner elements and/or the flow paths each connecting two recombiner elements on the gas side are configured in such a way that a pressure pulse triggered in the gas medium by an ignition during the recombination reaction in a first recombiner element triggers a gas displacement process having a flow rate of at least 5 m/s in the onflow region of a second, adjacent recombiner element. A nuclear plant with a safety system is also provided.
US09396820B2
The underwater electricity production module according to the invention includes means in the form of an elongated cylindrical box (12) in which means are integrated forming an electricity production unit including means forming a nuclear boiler (30), associated with electricity production means (37) connected to an external electricity distribution station (7) by electrical cables (6), is characterized in that the nuclear boiler-forming means (30) include a secondary circuit (36) associated with the electricity production means (37) and a secondary backup circuit (60) in parallel on that secondary circuit and including at least one secondary passive heat exchanger (61) placed outside the underwater module (12) in the marine environment.
US09396808B2
Techniques are provided for programming select gate transistors in connection with the programming of a set of memory cells. In response to a program command to program memory cells, the select gate transistors are read to determine whether their Vth is below an acceptable range, in which case the select gate transistors are programmed before the memory cells. Or, a decision can be made to program the select gate transistors based on a count of program-erase cycles, whether a specified time period has elapsed and/or a temperature history of the non-volatile storage device.
US09396802B2
An erase system and method of a nonvolatile memory device includes supplying an erase voltage to a plurality of memory cells of a nonvolatile memory, performing a read operation with a read voltage to word lines of the plurality of memory cells, and performing an erase verification operation with an erase verification voltage to at least one of the word lines of the plurality of memory cells, the erase verification voltage lower than the read voltage.
US09396798B2
An enhanced Flash chip and a method for packaging chip, wherein the enhanced Flash chip comprising: a FLASH and a RPMC, packaged integrally; the FLASH and the RPMC each comprising: a first internal IO pin and a second internal IO pin; the FLASH and the RPMC being further provided with a jumper window, one end of which is mutually connected to the first internal IO pin of the FLASH or the RPMC and the other end of which is mutually connected to the first internal IO pin of the RPMC or the FLASH; the second internal IO pin of the FLASH and the second internal IO pin of the RPMC being mutually connected. The enhanced Flash chip provided in the present application may effectively reduce design complexity and chip manufacturing cost, avoid the crossing of the metal lead wires in the chip package, and increase the yield of chip packages.
US09396796B2
A nonvolatile memory device includes an array of nonvolatile memory cells and a plurality of page buffers configured to receive a plurality of pages of data read from the same page in the array using different read voltage conditions. A control circuit is provided, which is electrically coupled to the plurality of page buffers. The control circuit is configured to perform a test operation by driving the plurality of page buffers with control signals that cause generation within the nonvolatile memory device of a string of XOR data bits, which are derived from a comparison of at least two of the multiple pages of data read from the same page of nonvolatile memory cells using the different read voltage conditions. An input/output device is provided, which is configured to output test data derived from the string of XOR data bits to another device located external to the nonvolatile memory device.
US09396794B1
Systems and methods relate to a matchline receiver of a content-addressable memory (CAM). A matchline of the CAM, which provides a hit/miss indication for a search operation of a data word is provided to the matchline receiver. The matchline receiver comprises a retention circuit to provide a hit/miss output, wherein the retention circuit retains, at the hit/miss output, the hit/miss indication provided by the matchline during a first clock phase of a clock, even if the hit/miss indication provided by the matchline is modified by a write operation or an invalidation operation during the first clock phase.
US09396793B2
A phase change memory (PCM), a writing method thereof and a reading method thereof are provided. The PCM has a plurality of memory cells. The writing method comprises the following steps. At least one stress pulse is applied for aging at least one of the memory cells. A starting pulse is applied to all of the memory cells of the PCM for decreasing a resistance of each memory cell. A detection pulse is applied to all of the memory cells of the PCM for detecting the resistance of each memory cell. A set pulse is applied to the aged memory cells. A reset pulse is applied to the non-aged memory cells.
US09396792B2
An apparatus having a circuit and an interface to a nonvolatile memory is disclosed. The circuit is configured to (i) perform one or more attempts of a soft-decision decode of data stored in the nonvolatile memory, where soft-decision decode uses a plurality of log likelihood ratio values stored in a table, (ii) generate one or more adjusted log likelihood ratio values by adding a constant value to one or more of the log likelihood ratio values in response to a failure to decode the data using the log likelihood ratio values and (iii) re-decode the data using the adjusted log likelihood ratio values.
US09396788B1
An information processing apparatus includes a memory that is volatile, a memory controller connected to the memory in an information exchangeable manner, and a clock enable (CKE) controller. The CKE controller controls a CKE signal in response to a request for a proxy in self-refresh control, the CKE signal being transmitted from the memory controller to the memory and being controlled to be kept low until cancellation of the proxy is requested. At a time of shifting to a power-saving mode, the memory controller stores information held by a central processing unit (CPU) in the memory and causes the memory to shift to a self-refresh mode. At a time of recovery from the power-saving mode, the memory controller requests the CKE controller for the cancellation of the proxy in the self-refresh control and thereafter cancels the self-refresh mode of the memory.
US09396787B2
Memory operations using system thermal sensor data. An embodiment of a memory device includes a memory stack including one or more coupled memory elements, and a logic chip coupled with the memory stack, the logic chip including a memory controller and one or more thermal sensors, where the one or more thermal sensors include a first thermal sensor located in a first area of the logic chip. The memory controller obtains thermal values of the one or more thermal sensors, where the logic element is to estimate thermal conditions for the memory stack using the thermal values, the determination of the estimated thermal conditions for the memory stack being based at least in part on a location of the first thermal sensor in the first area of the logic element. A refresh rate for one or more portions of the memory stack is modified based at least in part on the estimated thermal conditions for the memory stack.
US09396774B1
A semiconductor memory apparatus includes a CAS latency setting circuit configured to change an initially-set CAS latency value in response to control signal pulses which are sequentially applied, during a test mode without changing settings of a mode register set during each test.
US09396771B2
A memory device has a burst length “b”, performs “k” core accesses per command, and receives a command, where “b” is an integer of at least 2 and “k” is an integer of at least 2 and at most “b”. The memory device includes a memory cell array including a plurality of bank groups, a plurality of bank group control units respectively corresponding to the plurality of bank groups, each of the bank group control units configured to generate a multiplexer control signal for selecting part of data read from a corresponding bank group, and a multiplexer configured to sequentially output data read from the plurality of bank groups according to the multiplexer control signal output from the plurality of bank group control units. Data items included in output data of the multiplexer have a same time space.
US09396769B1
A memory device includes a memory array and a logic unit communicatively coupled to the memory array. The memory array includes a plurality of pages for storing array data and a plurality of extra arrays respectively corresponding to the plurality of pages for storing extra data. The logic unit is configured to receive a read instruction, and perform a read operation in a first access mode or in a second access mode. In the first access mode, the logic unit sequentially reads out the array data stored in the plurality of pages. In the second access mode, the logic unit sequentially reads out the array data stored in the plurality of pages and the extra data stored in the plurality of extra arrays.
US09396766B2
A semiconductor memory device may include a plurality of memory chips stacked upon one another, and electrically coupled to one another through a plurality of first TSVs. The semiconductor memory device may include a plurality of second memory chips stacked separately from the first memory chips, and the plurality of second memory chips electrically coupled to one another through a plurality of second TSVs. The semiconductor memory device may include a plurality of external connection electrodes coupled to both to the first memory chips and the second memory chips. Wherein one of the first and second memory chips may be accessed in response to chip select signals inputted through the external connection electrodes.
US09396763B2
Methods and systems for generation of an index and Table-of-Contents (ToC) for videos based on user given labels or a combination of user input and automated indexing techniques are provided. According to one embodiment, an annotation tool and a video player are presented to individual subscribers/users of a video discovery and consumption service. Tags proposed by the subscribers to be associated with various portions of the video content are received, processed and integrated within a global ToC for the video. The service can assist subscribers that intend to tag a certain portion of video by automatically proposing suitable tags and portion boundaries. Subscribers can vote on the suitability of tags constituting the ToC. Responsive to a request to view video content, a customized ToC is presented to a subscriber which include labels selected from the global ToC in accordance with default tag selection/filtering criteria or filtering criteria specified by subscriber.
US09396760B2
An electronic device can play back media items using a random playback mode. To ensure that related media items are played back in a proper order (e.g., live music is played back in concert order), the electronic device can define metadata or other data coupling related media items in a predefined or preset sequence. For example, related media items can include metadata tags identifying the previous and next media items to play back in the sequence. As another example, the electronic device can store a listing of media items of a sequence and the order in which to play them back. When the electronic device reaches a media item that is part of a preset sequence during random playback, the electronic device can identify at least the subsequent media items in the sequence, and insert the subsequent media items in the playback queue.
US09396758B2
A method for multimedia content generation includes receiving a textual input, and automatically retrieving from one or more media databases a plurality of media items that are relevant to the textual input. User input, which selects one or more of the automatically-retrieved media items and correlates one or more of the selected media items in time with the textual input, is received. A video clip, which includes an audio narration of the textual input and the selected media items scheduled in accordance with the user input, is constructed automatically.
US09396749B2
An apparatus includes a write pole proximate a media-facing surface of a recording head. A near-field transducer is adjacent to the write pole. A waveguide has a core layer extending from an energy source to the media-facing surface. The core layer includes a region of reduced downtrack thickness proximate the near-field transducer. The region of reduced downtrack thickness is defined by a notch facing away from the near-field transducer. A material of the notch has a different index of refraction than an index of refraction of the core layer.
US09396747B2
An interleave circuit includes a metal base, an insulating layer, a first conductor member having first branch conductors, a second conductor member having second branch conductors, and a jumper conductor, which is a part of the metal base. The jumper conductor includes a branch-side metal portion, a pad-side metal portion, and a bridge portion. The bridge portion is formed between the branch-side metal portion and the pad-side metal portion. The branch-side metal portion electrically conducts to connecting terminals of the first branch conductors via branch-side connecting members. The pad-side metal portion electrically conducts to an electrode pad via a pad-side connecting member. The bridge portion includes a crossover portion which crosses over a third conductor member.
US09396742B1
A magnetic read transducer including a magnetoresistive sensor is described, as well as a fabrication method thereof. The magnetoresistive sensor includes a cap layer overlaying a free layer. The cap layer is situated with a first thickness to absorb boron from the free layer. The magnetoresistive sensor is annealed, and boron is diffused from the free layer and absorbed by the cap layer, improving the magnetic performance of the free layer. The cap layer thickness is then reduced to a second thickness, thereby reducing the shield-to-shield (SS) stack spacing of the magnetoresistive sensor and allowing for increased areal recording density.
US09396732B2
Provided are methods, systems, and apparatus for hierarchical decorrelation of multichannel audio. A hierarchical decorrelation algorithm is designed to adapt to possibly changing characteristics of an input signal, and also preserves the energy of the original signal. The algorithm is invertible in that the original signal can be retrieved if needed. Furthermore, the proposed algorithm decomposes the decorrelation process into multiple low-complexity steps. The contribution of these steps is generally in a decreasing order, and thus the complexity of the algorithm can be scaled.
US09396726B2
The technology of the present application provides apparatuses and methods that may be used to generate the smallest language model for a continuous speech recognition engine that covers a given speaker's speech patterns. The apparatuses and methods start with a generic language model that is an approximation to the given speaker's speech patterns. The given speaker generates corrected transcripts that allows for the generation of a user specific language model. Once the user specific language model is sufficiently robust, the continuous speech recognition system may replace the generic language model with the user specific language model.
US09396712B1
Disclosed herein is a multi-layer drumhead with non-concentric inner layer. The drumhead in one form comprising: a flesh hoop; an inner layer of material affixed to the flesh hoop; an outer layer of material affixed to the inner layer adjacent the flesh hoop and not affixed to the inner layer; a plurality of surfaces defining cutouts in the inner layer. In one example the cutouts form a lateral dampening strip across the inner layer. The device in one example further comprising dampening materials removably positioned between the outer layer and the lateral dampening strip.
US09396710B2
A fipple for a bladed edge or labium lip resonated musical wind instrument, such as a tin whistle, Irish whistle or recorder, is constructed with a windway, blade and mouth. The two-piece tip and body fipple facilitates precise and accurate machined geometries. These geometries include but are not limited to chamfered windway openings and curved labium lips for extra sympathetic harmonics or “tone color”. The two-piece design also facilitates the use of two different materials, the tip may be constructed from a material that is comfortable and safe to hold in a human mouth and the body or blade material may be constructed from a metallic material to maximize volume and wind efficiency.
US09396707B1
A device is disclosed for positioning an acoustic accessory inside a stringed musical instrument. The stringed musical instrument includes a body having a soundboard, a back, sides, and an internal cavity, the soundboard having a sound hole surrounded by an edge area. The device includes an arm which connects to the edge area, and which also connects to the acoustic accessory. The arm is movable so that the acoustic accessory can be positioned to a desired location inside the internal cavity. The acoustic accessory and its position change the sound produced by the stringed musical instrument.
US09396706B2
The present invention relates to a memory, a memory addressing method, and a display device. The memory stores first image data and second image data of a line unit stored in a line buffer unit. The memory includes at least a first DDR3 memory and a second DDR3 memory, reads the first image data of the line unit, divides the read first image data of the line unit, and writes the divided data to a corresponding block among a plurality of blocks of each of the first DDR3 memory and the second DDR3 memory. Also, the memory reads second image data of the line unit, divides the read second image data of the line unit, and writes the divided data to another corresponding block among the plurality of blocks of each of the first DDR3 memory and the second DDR3 memory.
US09396703B2
A semiconductor device includes a plurality of thin film transistors of a single channel formed on an insulating substrate, and a buffer circuit including an outputting stage; a first inputting stage; a second inputting stage; a seventh thin film transistor; and an eighth thin film transistor.
US09396681B2
A pixel circuit including an organic light emitting diode (OLED), a first transistor, a first capacitor, a second transistor, a second capacitor and a third transistor is disclosed. In one aspect, the first transistor controls the amount of current flowing from a first power source to a second power source via the OLED, corresponding to a voltage at a first node. The first capacitor has a first terminal connected to a data line. The second transistor is connected between a second terminal of the first capacitor and a second node. The second capacitor is connected between the second node and the first node. The third transistor is connected between a fixed voltage source and the second terminal of the first capacitor, and has a turn-on period non-overlapping with that of the second transistor.
US09396674B2
Three-dimensional affinity displays for removably attaching onto an exterior side surface of a vehicle are presented herein. The affinity display may include an outer shell that helps shield a base surface from wind drag and weather elements while driving, helping to ensure that the affinity display remains attached to the exterior side surface of the vehicle. The affinity display may include aerodynamic features, such as a dome shape, and a drain hole to prevent water from building up within the affinity display. The affinity display may also include a detachable strap to assist with stability, and a recess in the base surface for attaching the strap to the affinity display.
US09396673B2
A solar powered flagpole including a stationary base and a rotatably attached pole carrying a banner or flag illuminated by a plurality of light emitting diode (LED) lights in the pole powered by an annular array of photocells carried by the rotatable pole so the photocells are powered by sun power regardless of the rotational position of the banner and pole.
US09396661B2
A platoon travel system organizes and performs a platoon travel of plural vehicles along a preset travel route. The system has a grouping unit that divides the plural vehicles into a top group and a tail end group based on projection area information of the vehicles, and groups vehicles with a projection area in a first range to the top group and vehicles with a projection area in a second range to the tail end group, which is less than the first range. A final position determination unit determines a position of each of the plural vehicles in the vehicle groups based on the depart point information, positions the top group vehicles in an ascending order of depart point distances, and positions the tail end group vehicles in a descending order of depart point distances, thereby preventing deterioration of whole platoon energy consumption.
US09396655B2
A motor vehicle may be equipped with apparatus permitting the reception of transportation-related alerts. The alerts received may be in accordance with factors, such as device-specific and/or location-specific factors. Alerts may, for example, be held or formatted, e.g., for audio presentation, depending on various factors, including, but not limited to location and/or speed.
US09396645B2
A personal emergency response system implemented as a conference bridge on a remote computing network. Upon receiving an alert from an individual in need of aid, a conference including audio and/or video connection is established. A predetermined list of parties is coupled to the conference, including friends, caregivers, medical professionals, emergency responders and others as stored in a configuration database specific to the individual via a web interface. The database record may also contain vital information about the individual, in additional to demographic data, location information, history and other factual information. Medical telemetry may be obtained in real-time and disseminated among the conference participants. Other parties may be dynamically joined to the conference as needed upon a conference participant utilizing DTMF codes or other means to request the others to join.
US09396644B2
A method for a device to determine that it has been lost is provided. The method comprises the device determining its current location, the device comparing its current location to a plurality of stored locations, and the device determining that it has been lost when its current location is a stored location that has been designated as a location where the device is unlikely to be located or is not a stored location that has been designated as a location where the device is likely to be located.
US09396640B2
In example embodiments, a system and method for tracking a child using RFID is provided. A first reader detects a signal from the trackable device. First positional data of the trackable device is determined from the signal. The first positional data indicates a first direction of the trackable device relative to the first reader. Second positional data is received from a second reader. The second positional data indicates a second direction of the trackable device relative to the second reader. A location of the trackable device is calculated using the first positional data and the second positional data. The location is presented on the first reader.
US09396634B2
Methods, systems, and products are disclosed for alarm sensors in security systems. A powerline-to-Ethernet adapter interfaces with an alarm sensor and converts alternating current electrical power into direct current electrical power. Wires in a cable convey the direct current electrical power to the alarm sensor, and other wires in the cable convey Ethernet signals to the alarm sensor. The alarm sensor is electrically powered by the direct current electrical power and the Ethernet signals are received at an Ethernet interface.
US09396630B2
A system is provided that encodes one or more dynamic haptic effects. The system defines a dynamic haptic effect as including a plurality of key frames, where each key frame includes an interpolant value and a corresponding haptic effect. An interpolant value is a value that specifies where an interpolation occurs. The system generates a haptic effect file, and stores the dynamic haptic effect within the haptic effect file.
US09396629B1
Electronic devices and methods for creating various haptic effects. In one example, an electronic device may include a first haptic module for creating a first haptic effect, the first haptic module having a first weight member that selectively moves in a substantially vertical orientation relative to the first haptic module; a second haptic module for creating a second haptic effect, the second haptic module having a second weight member that selectively moves in a substantially horizontal orientation relative to the second haptic module; and a processor for controlling the first and second haptic modules. In one example, the processor selectively activates either the first haptic module or the second haptic module based on one or more events or conditions, such as the current orientation or position of the electronic device.
US09396613B2
A gaming system has a gaming machine. The gaming machine transmits a signal to a remote device indicating a winning round.
US09396609B2
A method of gaming comprises providing a jackpot game in addition to a main game, the jackpot game being displayed independently of the main game. Play of the jackpot game affects at least one of the awarding of a jackpot prize and value of a jackpot prize pool from which the jackpot prize is awarded.
US09396599B1
An electronic device associated with a lock device obtains a number of users detected within a premises, and detects a trigger event related to a lock device and premises. When the trigger event is detected, a target state of the lock device is determined based on: (1) the number of users within the premises, (2) user security profiles indicating a desired target state of the lock device when a respective user is within the premises, (3) locations of detected users; (4) user states of detected users indicating whether the respective user is asleep or active; and/or (5) a current premises mode, including an armed state and a disarmed state. A current state of the lock device is determined, and if the current state and the target state of the lock device are not the same, instructions are provided to the lock device based on the target state.
US09396595B1
The present invention is directed to a system and method for authorizing entry into a country using an inflight immigration card in conjunction with a remote card reader connected to a computer, wherein the card reader is configured for reading the inflight immigration card for accessing a user interface for processing inflight or at-sea while the traveler is en-route, the traveler's customs information and pre-determining the traveler's authorized entry status prior to the traveler's arrival at the port of entry, such that the holder of the inflight immigration card and his/her luggage are pre-approved and cleared prior to landing.
US09396590B2
An image processing apparatus and method for zooming in on a partial area in a three-dimensional (3D) image selects a zoom mode from among a two-dimensional (2D) zoom mode, a 3D zoom mode, and an intermediate dimensional zoom mode between the 2D zoom mode and the 3D zoom mode. The image processing apparatus may include a mode selecting unit to select a zoom mode to be applied to a zoom area in a color image and a depth image among the 2D zoom mode, the 3D zoom mode, and the intermediate dimensional zoom mode between the 2D zoom mode and the 3D zoom mode, and a scaling unit to scale the zoom area using a zoom factor indicating magnification or minification of the zoom area and the selected zoom mode.
US09396589B2
Interference-based augmented reality hosting platforms are presented. Hosting platforms can include networking nodes capable of analyzing a digital representation of scene to derive interference among elements of the scene. The hosting platform utilizes the interference to adjust the presence of augmented reality objects within an augmented reality experience. Elements of a scene can constructively interfere, enhancing presence of augmented reality objects; or destructively interfere, suppressing presence of augmented reality objects.
US09396575B2
Disclosed are embodiments for defining animation of content. One exemplary embodiment calls for receiving an indication of a location for an animation pin on a timeline associated with a content editing environment configured for editing content. The embodiment involves recording a state of the content in response to receiving the indication of the location for the animation pin, the recorded state of the content associated with a first time and comprising a value associated with a property. Additionally, the embodiment involves receiving a user input indicating an edited state of the content at a second time different from the first time, the second state associated with the location of the animation pin on the timeline and defining an animation based at least in part on the recorded state and the edited state of the content.
US09396574B2
Techniques are proposed for animating a plurality of objects in a computer graphics environment. A crowd choreography system receives a first beat description defining potential motions for the plurality of objects, where the first beat description includes a first motion characteristic. The crowd choreography system selects a first object from the plurality of objects and selects a first value for the first motion characteristic based on the first beat description. The crowd choreography system creates a first motion path for the first object based on the first value and animates the first object based on the first motion path.
US09396569B2
There is disclosed a method for seamlessly replacing areas in a digital image with corresponding data from temporally close digital images depicting substantially the same scene. The method uses localized image registration error minimization over a fixed preliminary boundary. A least cost closed path which constitutes a boundary for the area to be replaced is calculated using dynamic programming. The replacement area is blended such that image data information from one image is seamlessly replaced with image data information from another image.
US09396556B2
A system, a method and computer-readable media for encoding image data into a compressed bitstream. A mode selection component is configured to select a mode of operation for use in encoding image data. A spatial mode encoder is utilized when the mode selection component selects a spatial mode of operation. The spatial mode encoder is configured to encode the image data into packets by organizing the image data in accordance with a spatial partitioning. A frequency mode encoder is utilized when the mode selection component selects a frequency mode of operation. The frequency mode encoder is configured to encode the image data into packets by organizing the image data in accordance with a frequency ordering.
US09396552B1
A system, method, and computer program product compare images of a physical activity or object. Pixel data from first and second registered color images defined in an N-dimensional color model are concatenated to form an image in a 2N-dimensional color model. Principal component analysis is performed on the composite image and those components representing a change rather than a correlation are identified. In the composite image, coordinates for each pixel are determined along the principal components representing change, and a normalized pixel change value is computed. Pixels in the composite image may be segmented according to their respective normalized pixel change values, where segments do not cross pre-defined geospatial parcel boundaries. Parcel change probabilities are calculated as a function of segment change probabilities, themselves functions of the normalized pixel change values. Finally, parcels are ranked by their change probabilities and highlighted in a graphical user interface.
US09396551B2
Disclosed is a camera apparatus capable of tracking a target object based on motion of a camera sensed by a motion sensor and a method for tracking an object in the camera apparatus are provided. The method includes obtaining, by a electronic device including a first sensor and a second sensor, one or more images corresponding to at least one object using the first sensor, by displaying the one or more images via a display operatively coupled with the electronic device, obtaining motion data corresponding to movement of at least part of the electronic device identified in relation with obtaining the one or more images, tracking, from a corresponding displayed image of the one or more images, a position corresponding to the at least one object based at least in part on the motion data, and presenting, via the display, at least one portion of information with respect to the position corresponding to the at least one object.
US09396549B2
An apparatus for extracting a candidate image frame includes a generating unit configured to generate at least one lesion value that represents a characteristic of a lesion included in each of a plurality of 2-dimensional image frames that form a 3-dimensional image, and an extracting unit configured to extract, from the image frames, at least one candidate image frame usable for correcting a boundary of the lesion based on the at least one lesion value.
US09396546B2
Disclosed are various embodiments labeling objects using multi-scale partitioning, rare class expansion, and/or spatial context techniques. An input image may be partitioned using different scale values to produce a different set of superpixels for each of the different scale values. Potential object labels for superpixels in each different set of superpixels of the input image may be assessed by comparing descriptors of the superpixels in each different set of superpixels of the input image with descriptors of reference superpixels in labeled reference images. An object label may then be assigned for a pixel of the input image based at least in part on the assessing of the potential object labels.
US09396545B2
A method, apparatus, system, and article of manufacture provide object descriptors for objects in point cloud data for an urban environment by segmenting the point cloud data. Point cloud data for an urban environment is obtained using a ground-based laser scanner. Terrain points are filtered out from the point cloud data using ground filtering. The point cloud data is then segmented into two or more blocks. Objects that lie on neighboring adjacent blocks are combined. Object descriptors for the combined objects are then provided (e.g., to the user or a program used by the user).
US09396543B2
An information processing apparatus includes an image acquiring unit to acquire captured image of a watching target person and a target object as a reference for a behavior, the captured image containing depth information indicating depths per pixel, a foreground area extracting unit to extract a foreground area on the basis of a difference between a foreground image and the captured image, the foreground image being set to contain a depth of the foreground and a behavior presuming unit to presume the behavior about the target object by determining whether a positional relationship between the foreground area and the target object area satisfies a predetermined condition or not on the basis of referring to the depths of the pixels in the foreground area based on the depth information, the condition being set on the assumption that the extracted foreground area is related to the behavior.
US09396542B2
A method is provided for estimating parameters of an imaging device with respect to an image of a scene said method comprising the steps of locating a target coordinate system in a scene, using an imaging device to capture an image of the scene, and processing the image using the target coordination system as a reference to estimate the parameters of the imaging device with respect to the image, wherein the target coordinate system comprises at least one planer target and wherein the at least one planar target contains a set of identifiable features with known relative positions.
US09396540B1
Identifying anchors for fields using optical character recognition data is described. A collection of characters is identified. The collection of characters includes a first set of characters at a first position relative to a first field in a first document and a second set of characters at a second position relative to the first field in the first document. The first set of characters is associated with a first word, and the second set of characters is associated with a second word. An anchor is created based on the collection of characters, wherein the anchor is at a third relative position to the first field in the first document. A second field is identified in a second document by identifying the anchor in the second document.
US09396529B2
An example image processor provides a distortion-corrected image including a masking area having improved appearance. The image processor includes: a masking area retaining section that retains a masking area set for an image having distortion; a masking execution section that performs masking processing for the image having distortion using the masking area retained in the masking area retaining section; a distortion correction section that corrects the image having distortion that is subjected to the masking processing using a correction parameter for correcting distortion of the image having distortion; and a masking area shaping section that shapes the masking area of the corrected image into a predetermined shape.
US09396528B2
Techniques for atmospheric compensation in satellite imagery that include converting an image including an array of radiance values to an array of surface reflectance values. The conversion is performed in an automated fashion by identifying one or more portions of the image for which the surface reflectance can be estimated and determining the Aerosol Optical Depth (AOD) by iteratively comparing the radiance value captured by the image sensor to a calculated radiance value (based on the known surface reflectance, historical values for other atmospheric parameters, and the AOD) and adjusting the AOD until the calculated radiance value is substantially the same as the captured radiance value.
US09396527B2
In image data having a first number of gradations, an image processing device calculates the number of pixels having luminance within a region, for each region obtained by dividing the range of luminance in the image data into a plurality of regions. The image processing device selects a region from the plurality of regions based on the number of pixels having luminance within the region. The image processing device sets the luminance of the pixels having luminance within the selected region to be within a second number of gradations that is less than the first number of gradations, and sets the luminance of pixels having luminance within a region that has not been selected to a minimum value or a maximum value.
US09396498B1
A computer-implemented method may include facilitating registration for a service capable of determining whether strangers who come in contact with one another share one or more characteristics in common. The computer-implemented method may also include obtaining, as part of the registration for the service, permission for the service to access at least a portion of one or more social-networking accounts associated with each of the strangers. The computer-implemented method may further include determining, subsequent to the registration for the service, that the strangers registered for the service have come in contact with one another and then providing the service to the strangers in response to this determination. Various other methods, systems, and computer-readable media are also disclosed.
US09396491B2
Disclosed herein are methods for providing a buy option to search results in a generalized search engine. That one location for a search field can be a website, an application, a search bar in a web browser, etc. Rather than navigating to a website to perform a search in the context of that website, a user can instead navigate to or open a generalized search field. Via the generalized search field, the system can analyze the input from the user and the resulting context. A buy button can be included a search result to the user input in the input search field. Payment for an item can be processing using a payment account registered with the system with delivery coordinated with a separate merchant via an application programming interface.
US09396486B2
The methods and systems described herein may involve determining at least one lifeotype of at least one individual, analyzing the at least one lifeotype, and delivering content to at least one individual based on the analysis. The methods and systems described herein may involve providing a game, determining at least one lifeotype of at least one player of the game, analyzing the at least one lifeotype, and affecting the game play based on the analysis. The methods and systems described herein may involve providing an interactive space, determining at least one lifeotype of at least one individual in the space, analyzing the at least one lifeotype, and modifying at least one attribute of the space based on the analysis.
US09396484B2
A system for injecting business content dynamically based on the context of the user. A media content analysis tool may be used to analyze existing media to identify features and insert tags based on the content and/or time. A media content orchestrator may be used to author scriplets containing product advice for the media stream to insert and associate scriplets to tags in the media stream. The media player, equipped with a codec for the new media format, performs functions such as browsing product information, places orders, or the like.
US09396480B2
A device receives, from a client device, a first request associated with target audience criteria and a time constraint. Based on the target audience criteria, the device sends, to an information device, a network state request. In response to the network state request, the device receives, from the information device, a network state response including user data associated with user devices. Based on the network state response, the device determines a predicted network state, including predicted user data associated with the user devices, associated with the time constraint. Based on the predicted network state and the target audience criteria, the device determines a predicted quantity of user devices associated with both the target audience criteria and the time constraint. The device sends, to the client device, a first response based on the determination of the predicted quantity of user devices.
US09396475B2
A system and associated methodology are disclosed for targeting tags in a broadcast network. The tags may be associated with an ad or programming. In one implementation, the tags to be delivered at a user equipment device are selected at the user equipment device, for example, based on location or other user classification parameters. In this manner, different user equipment devices that are on the same bandwidth segment in the same network subdivision can receive different tags.
US09396473B2
New functions for a contact center system include: testing user's comprehension of informational messages with a quiz; capturing insight of superior users having a KPI score above a threshold by having those users submit information on why they perform so well; dynamically ordering solutions to issues by re-ranking the solutions periodically based on recency and frequency; integrating information for use by a contact center representative while online with a customer and information for use when not online; storing content items in a telecommunications industry taxonomy; directing user feedback on a content item to the proper owner/manager of that content; communicating solution information using a solutions taxonomy; displaying a dual information system having a CRM application as well as reference material that is context-appropriate; enforcing completion of a group of templates when creating a content item to be published; ensuring a group of templates for a content item are complete before publishing them; and searching within a contact center system portal using a continuum of search functions.
US09396470B2
A wireless device is enabled to receive a financial account card that is inserted into a card slot of the wireless device. The wireless device reads card data from the financial account card when it is inserted into the slot and programs an RFID (radio frequency identification) tag or a memory included in the wireless device. The wireless device may then be used to provide payment by transmitting the card data via radio frequency to a nearby RFID reader using the RFID tag. The financial account card may also be ejected from the wireless device and swiped by a magnetic card reader.
US09396468B2
Chip card for an electronic transaction including a display, a keypad, a network interface, a processing unit, a microcontroller and a memory area for signature information and/or key information, characterised by a means which enables the chip card to connect to a host system via the network interface so as to appear to the host system as an integrated card reader with inserted chip card, whereby the transaction data relating to the chip card are received by the host system via the network interface for presentation on the display so that the transaction data can be confirmed by key input on the keypad, provided with the signature, and then sent to the PC.
US09396460B2
Specifying the policies with which (portion of) an email communication is to be stored as a record, within the content of the email communication. In an embodiment, an attachment file specifies such policies in the form of XML tags. As a result, a user may merely need to attach a file specifying the desired policies, and send the email communication. In one implementation, the user specifies a pre-specified email address as a recipient to cause the email communication to be saved as a record.
US09396459B2
Techniques to account for storage consumption and capacity allocation across heterogeneous storage objects are disclosed. A capacity accountability system can ascertain a set of heterogeneous storage objects provisioned for a storage consumer, where the heterogeneous storage objects is categorized by storage object hierarchy levels. The capacity accountability system can then identify an association between the storage consumer and a storage object hierarchy level and account for storage object consumption and storage capacity allocation of the storage consumer by normalizing storage consumption data and capacity allocation data at the storage object hierarchy level across the heterogeneous storage objects.
US09396458B2
A computer-implemented method for controlling content distribution includes forwarding information associated with a user to a device operated by the user, the information being configured for use in selecting content from any of multiple content providers for a content distribution to the user. The method includes receiving, in response to the information, an edit of the information forwarded from the device. The edit identifies a first content provider and including a first modification of the content distribution regarding the first content provider. The method includes storing the edit in association with the information such that the first modification is taken into account in the content distribution. The method can be implemented using a computer program product tangibly embodied in a computer-readable storage medium.
US09396455B2
The present invention provides a system, method, and software program for enabling a user to view and interact with a visual map in an external application. According to one embodiment of the invention, a visual mapping application creates a file with (i) visual map data and (ii) software code capable of being executed by an external application to display the visual map and provide select visual mapping application in the external application. In one embodiment, such functionality includes the ability to expand and collapse map topics, scroll the map, zoom in and out, follow hypertext links in the map, find content in the map, and print the map. The created file can be thought of as a “visual map player” in that an external application can “play” the created file, resulting in a live map in the external application.
US09396452B2
A system and method for marking electronic devices for processing. A determination is made whether one or more electronic devices include customer personal information during at least receiving the one or more electronic devices. An electronic device is marked as quarantined in response to determining CPI is included on the electronic device. The electronic device is separated from an inventory of electronic devices in response to marking the electronic device.
US09396445B2
A control system usable in a print shop where print jobs are processed with at least one print shop related resource is provided. The at least one print shop related resource is operated over multiple discrete time intervals such that production related data is generated for each one of the multiple discrete time intervals. The production related data generated during each one of the multiple discrete intervals is collected and stored in memory. The control system includes a controller and a program. The program operates with the controller to calculate at least one performance measure value from the stored production related data, and to determine, with the at least one calculated performance measure value, whether any further collection of production related data is required.
US09396442B2
An embodiment according to the present invention addresses reusability and alignment of content across channels in a multi-channel virtual assistant, by allowing users to define content on one channel and then have the content fully or partially translated for the other channels using a mix of pre-defined static rules, dynamic rules or machine learning. Content translation is provided based on communications channels, and content translation is performed from one to many formats, optionally in real time. Performing content translation using machine learning provides an advantage that as users work, content translation becomes more precise and covers more elements.
US09396435B2
A method and system for identification of a deviation from a periodic behavior pattern in a sequence of multimedia content segments are provided. The system comprises receiving the sequence of multimedia content segments; generating at least one signature for each multimedia content segment of the sequence of multimedia content segments; comparing at least two signatures generated for at least two consecutive multimedia content segments to detect a periodic behavior pattern; upon detecting the periodic behavior pattern, comparing at least one signature generated for at least a subsequently received multimedia content segment to at least one signature representing the detected multimedia content segment to identify a deviation from the periodic behavior pattern; and upon identifying the deviation from the periodic behavior pattern, generating a notification with respect to the at least one deviation.
US09396433B2
Techniques, systems, and articles of manufacture for determining related data points from multi-modal inputs. A method includes collecting multiple items of multi-modal data comprising at least one dimension from multiple data sources, wherein said at least one dimension comprises a geographic dimension, a temporal dimension and/or an event-related dimension, determining a window of relevance for each of the multiple items of multi-modal data with respect to the at least one dimension, and identifying two or more of the multiple items of multi-modal data as related, by determining an overlap of the window of relevance corresponding to each of the two or more items of multi-modal data with respect to the at least one dimension.
US09396427B2
A removable tray integrated smart card and a mobile terminal adopting the same are provided. The smart card includes: a case configured to be removable into/from a smart card insertion slot of a mobile terminal; and a secure element provided in the case, wherein the case is removable into/from the smart card insertion slot without being placed on a tray. Accordingly, the smart card such as a USIM-card can be inserted into the mobile terminal without using the tray. In addition, since the size of the smart card increases as the smart card is unified with the tray, many high performance antennas and wireless modules can be inserted into the smart card and thus wireless communication performance of the smart card can be enhanced.
US09396419B2
A data-processing apparatus modifies a part of a plurality of measurement values defined in a specified color space to acquire modified measurement values; and generates color conversion data by using the modified measurement values. A dark range is defined by lightness of a maximum chroma measurement value and includes a first color range and a second color range. The first color range includes at least a part of an outer layer corresponding to a target color range. The second color range is at least a part of a portion inside the first color range in the dark color range. The data-processing apparatus performs the modification to meet the following conditions (a) and (b): (a) lightness of each measurement value within the first color range is not increased; and (b) lightness of each measurement value within the second color range is increased.
US09396415B2
A method for representing an input image includes the steps of applying a trained neural network on the input image, selecting a plurality of feature maps, determining a location of each of the plurality of feature maps in an image space of the input image, defining a plurality of interest points of the input image, and employing the plurality of interest points for representing the input image for performing a visual task. The plurality of feature maps are selected of an output of at least one selected layer of the trained neural network according to values attributed to the plurality of feature maps by the trained neural network. The plurality of interest points of the input image are defined based on the locations corresponding to the plurality of feature maps.
US09396413B2
Methods, systems and apparatus for choosing image labels. In one aspect, a method includes receiving data specifying a first image, receiving text labels for the first image, receiving search results in response to a web search performed using at least some of the text labels as queries, ranking the text labels, at least in part, based on a number of resources referenced by the received search results, wherein at least some of the resources each include an image matching the first image, and selecting an image label for the image from the ranked text labels, the image label being selected based on the ranking.
US09396411B2
An automated, computerized method is provided for processing an image. The method includes the steps of providing an image file depicting an image, in a computer memory, identifying a dominant region of single reflectance in the image and segregating the image into intrinsic images as a function of the dominant region of single reflectance.
US09396402B2
A system and method for authenticating the identity of a subject from a plurality of subjects. The system utilizes a scanner and processor for mapping locations of blood vessels and running a comparison between images to identify the subject based on the type and location of the subject's blood vessels.
US09396394B1
Systems, devices, methods, computer-readable media, techniques, and methodologies are disclosed for generating a template iris pattern using multiple image frames containing image data corresponding to detected light at different wavelengths along the electromagnetic (EM) spectrum including light in the infrared, near-infrared, and/or visible light bands.
US09396388B2
Computer program products include program code readable/executable by one or more processors, and configured to cause the processor(s) to: receive an image of a part or all of a document selected from a group consisting of: a gift card, an invoice, a bill, a receipt, a sales order, an insurance claim, a medical insurance document, and a benefits document; perform optical character recognition (OCR) on the image; extract at least a partial address of a sender of the document; compare the at least partial address of the sender to a plurality of addresses in a first database; and identify one or more of: textual information specific to the sender; and data formatting specific to the sender. The code configured to cause the processor to receive the image, perform the OCR, extract and compare the (at least partial) address, and identify sender-specific information is preferably a processor of a mobile device.
US09396386B2
An information processing method, system and an electronic device are provided according to the embodiments of the disclosure, and applied to an electronic device having at least a first panel, with a first surface of the first panel being provided with a display unit and at least one image acquisition apparatus, where the at least one image acquisition apparatus is positioned below the display unit in the case that the first panel stands on a plane. After an image for a to-be-recognized object and the plane is acquired by the image acquisition apparatus, whether the object contacts the plane is determined based on the acquired image, and information about position change on the object is detected in the case that it is determined that the object contacts the plane.
US09396381B2
A method for an optical fingerprint recognition, the method includes scanning a fingerprint image using a multiple scan which allows alternating a first scan condition and a second scan condition different from each other; determining whether an input fingerprint is a dry fingerprint depending on a darkness level of a fingerprint image derived from the first scan condition; and performing a fingerprint recognition using a fingerprint image derived from the first scan condition or a fingerprint image derived from the second scan condition in accordance with the determination result as to the dry fingerprint.
US09396378B2
Techniques for communicating particular information from a user to a touch screen device by way of a touch event is provided. Sensors that are operatively coupled to a sensing device sense an input from the user which conveys particular information. This input is then converted by the sensing device into another signal called the sensing device signal which is then transmitted from the sensing device to the user's skin. Then a second set of sensors that are operatively coupled to a touch device receive a user-touch signal that is transmitted from the user's body. The user-touch signal is based, at least in part on the sensing device signal. The touch device then decodes the user-touch signal to determine the location of the touch event on the touch device and sensing device signal embedded in the user-touch signal to extract the particular information related to the user.
US09396368B1
A NFC object reader's NFC antenna system configured to dynamically change an element of the NFC antenna system to maintain the NFC antenna system's antenna default resonant frequency. The NFC antenna system can be configured to include a tuning subsystem, integrated with sensors to trigger tuning of NFC antenna system's antenna.
US09396367B2
A system and method are disclosed for synchronizing two RFID readers. The system includes a modulation detector to detect a modulated signal produced by a first of the two reader and produces a synchronization signal. The second of the two readers initiates transmission of a signal in response to the synchronization signal.
US09396365B2
Systems and methods for reducing problems and disadvantages associated with providing a user-accessible card slot are provided. A removable card carrier a configured to mechanically interface an information handling system may include a body and a cover. The body may be adapted to hold a card. The cover may be movably coupled to the body such that exterior surfaces of the cover and the information handling system are substantially flush with each other when card carrier is disposed in the information handling system.
US09396364B2
There is provided a communication device and method for contactless short range communication between a device and a terminal. An exemplary communication device comprises a communication component for contactless short range communication with a terminal. The exemplary device also comprises a slave element adapted to execute at least one application for executing transactions between the communication component and the terminal, wherein the slave element is coupled to the communication component via a first interface and wherein the slave element can be coupled to a secure master element via a second interface, the master element being adapted to control the slave element before a transaction is executed using the application.
US09396363B2
A portable data reader and methods of operation for reading encoded data, such as optical code labels and RFID tags, from an object. The data reader includes a housing adapted for handheld operation and a touch screen display supported on the housing. The data reader further includes one or more reading engines each associated with a set of decoding instructions for configuring the reading engines to read data from the object. The reading engines are each associated with a unique control gesture that may be applied to the touch screen display to configure the data reader with a particular reading engine. The portable data reader includes a processing subsystem communicatively coupled to the touch screen and the reading engines and operable to detect whether a control gesture has been applied to the touch screen display or rocker keys and then to configure the data reader with the selected reading engine.
US09396357B2
A cryptographic system for reproducibly establishing a reliable data string, such as a cryptographic key, from a noisy physically unclonable function (PUF, 110) is provided. The system comprises a hard decision decoder (150) to decode a first multiple of error correctable data words to obtain a second multiple of corrected and decoded data words and a reliability information extractor (180) to determine reliability information, e.g. soft decision information, that is indicative of a reliability of corrected and decoded data words. The system further comprises a soft decision decoder (160) configured to use the reliability information to decode at least one further correctable data word. Error correcting a PUF using reliability information decreases the false rejection rate.
US09396352B2
Systems and methods for protecting a data item include, upon initiation of transfer of the data item from a server to a client device, determining a sensitivity score and a current protection level of the data item. A policy is applied to determine an appropriate protection for the data item based upon the sensitivity score and the current protection level. A protected data item is provided to the client device by applying the appropriate protection to the data item.
US09396351B2
To prevent conflicts of interest, an information management system is used to make sure two or more groups are kept apart so that information does not circulate freely between these groups. The system has policies to implement an “ethical wall” to separate users or groups of users. The user or groups of user may be organized in any arbitrary way, and may be in the same organization or different organizations. The two groups (or two or more users) will not be able to access information belonging to the other, and users in one group may not be able to pass information to the other group. The system may manage access to documents, e-mail, files, and other forms of information.
US09396349B1
A method for sharing data from within a secure network perimeter includes providing a sharing folder associated with a first user for transferring data therefrom to destinations outside the secure perimeter. Data stored within the sharing folder is stored in a secured fashion. Semi-trusted applications are provided an ability to retrieve the secured data in a unsecured fashion for sharing of same. The semi-trusted applications are other than able to retrieve and share secured data from at least a folder other than the sharing folder in unsecured form.
US09396346B2
A method is provided for use on an electronic device having a display, a communication component, a memory, and a processor coupled to the display, the communication component, and the memory. The memory stores data in a first sandbox and data in a second sandbox, the first sandbox being a secure sandbox and having a shadow data component, the shadow data component storing a subset of the data stored in the first sandbox. The method comprises, in response to a request, providing the data stored in the first sandbox when the first sandbox is in an unlocked mode and providing the data stored in the shadow data component when the first sandbox is in a locked mode.
US09396344B1
Systems and methods for creating a database of geofences and registering geofences, with each geofence in the database being associated with an IP address, preferably an IPV6 address. Each geofence is defined using at least one geographic designator, preferably real property boundaries. Entitlements can be associated with geofences relating to permissive and prohibitive activities within the geofences.
US09396335B2
A method comprises signing boot code with a public/private cryptographic key pair, and writing to storage the boot code, the public cryptographic key, and the signed boot code.
US09396334B1
Disclosed are method and system for detecting harmful files executed by a virtual stack machine. An example method includes: identifying data from a file executed on the virtual stack machine, the data including parameters of a file section of the file and/or parameters of a function of the file; searching in a database for at least one cluster of safe files that contains at least one of: a value of the parameters of the file section exceeding a first threshold, and a value of the parameters of the function exceeding a second threshold; creating a cluster of data of the file based on the identified cluster of safe files; calculating a checksum of the created cluster of data of the file; and determining that the file is a harmful file if the computed checksum matches a checksum in a database of checksums of harmful files.
US09396332B2
One or more techniques and/or systems are provided for risk assessment. Historical authentication data and/or compromised user account data may be evaluated to identify a set of authentication context properties associated with user authentication sessions and/or a set of malicious account context properties associated with compromised user accounts (e.g., properties indicative of whether a user recently visited a malicious site, created a fake social network profile, logged in from unknown locations, etc.). The set of authentication context properties and/or the set of malicious account context properties may be annotated to create an annotated context property training set that may be used to train a risk assessment machine learning model to generate a risk assessment model. The risk assessment model may be used to evaluate user context properties of a user account event to generate a risk analysis metric indicative of a likelihood the user account event is malicious or safe.
US09396325B2
A keystore is installed on a mobile app where the keystore is created and provisioned on a server, such as an app wrapping server, under the control of an enterprise. A generic (non-provisioned) wrapped app is installed on a device. The app prompts the user to enter a passphrase. When the user does this, an app keystore is created. It has a user section and a table of contents. The keystore files are hashed, creating “first” keystore hash values. The first keystore hash values are stored in the TOC. The TOC is then hashed, creating a TOC hash value. The passphrase entered by the user is then combined with the TOC hash value. This creates a “first” master passphrase for the keystore. The keystore is then transmitted to the device where it is installed in the generic (non-provisioned) wrapped app.
US09396323B2
A method and system for determining unauthorized account access is provided. The method includes receiving a username of a user and a passcode for access to a secure account or device belonging to a user. The passcode is determined to be incorrect. Unauthorized access attempts with respect to the secure account or the device are determined based on based on the incorrect passcode and in response, a quality factor associated with the incorrect passcode with respect to the secure account or device is determined. The quality factor is compared to a threshold value. Security functions associated with the secure account or device with respect to the incorrect passcode and the results of the comparison are performed based on the quality factor and the unauthorized access attempts.
US09396311B2
In one embodiment, a method comprises: collecting software information from one or more network devices; and analyzing the software information to ensure software license compliance for the one or more network devices.
US09396307B2
Certain embodiments of the present invention provide systems and methods for interruption workflow management in a clinical enterprise. Certain embodiments provide an interruption workflow management system for a clinical enterprise. The system includes a worklist including a plurality of patient indicators representing patients for which tasks are to be performed by a user. The system also includes a patient panel displaying patient information associated with a patient indicator selected from the worklist. The system further includes a patient indicator shelf holding one or more patient indicators from at least one of the worklist and the patient panel for later retrieval in response to user input. The patient indicator shelf facilitates restoration of a patient indicator from the patient indicator shelf to display in the patient panel in response to user input.
US09396299B2
Reticle marks are arranged at a plurality of places in a kerf region of a reticle, the area of a polygon with apexes at arrangement positions of the reticle marks is calculated, and the arrangement positions of the reticle marks are decided based on results of calculation of the area of the polygon.
US09396282B2
The present invention provides a system, method, and software application for enabling a user to view data from an external data source in a visual map, wherein the external data source has a web services interface. Visual mapping software on a computer provides a visual mapping interface in which a user can create, edit, and/or view a visual map. Within the visual mapping interface, the visual mapping software provides the user with an option to obtain data from one or more data sources associated with a web service. In response to the user selecting a data source associated with a web service, the visual mapping software builds a web service request for the web service associated with the selected data source. The visual mapping application makes a call to the applicable web service with the web service request. The visual mapping application subsequently receives data from the web service and transforms the data into a format that can be used to generate visual map data. The visual mapping software then displays the data in a visual map.
US09396279B1
A system and computer-implemented method for collaborative markup of digital media such as an Internet website are disclosed. In one embodiment, multiple users can collaboratively and create, view, markup, and revise the contents and layout of a retrieved website or webpage in real-time prior to publication or production release.
US09396278B2
A method includes selecting a database on a system and selecting a style format on the system. The database contains data information for the web application, and the style format is applied to the web application. The method also includes selecting a validation rule for the web application, selecting a business rule for the web application, dynamically rendering the web application from a database to a web browser, and dynamically editing the web application. The web application incorporates the selected database and the selected style format instantaneously upon dynamic rendering.
US09396277B2
Primary data for an application is stored at a remotely located first server such as cloud storage. A user of the application may wish to modify or add to the primary data to create supplemental data for which storage is not supported in the first server. Configurations herein include a way to store the supplemental data (e.g., edits, additions, etc.) on a second server at a second storage service provider (e.g. a corporate intranet). Different instances of the application executing on different computer devices by that same user can retrieve the primary data from the first storage service provider as well as retrieve the supplemental data from the second storage service provider.
US09396266B2
A method (200) for searching the Internet (14n). The method (200) including the steps of: in response to a user search query, identifying at least one search origin (12n) comprising an Internet resource (12n) deemed of relevance; retrieving and reviewing the contents of the search origin (12n) to identify the presence of one or more search avenues (12n) stemming from the search origin (12n), identifiable search avenues comprising: sites (12n) which are ascertained by the search origin contents (12n); submission fields presented by the search origin (12n); and/or, dynamically generated content (12n) retrieved from the search origin, and, perusing identified search avenues (12n) to identify search results to be returned in response to the user search query.
US09396265B2
The present invention discloses a method and apparatus for obtaining dynamic information. In the method, a first client of a first user obtains a relationship chain of the first user, wherein the relationship chain of the first user comprises at least one second user; determines an active degree of the at least one second user in a preset first time period, determines a time interval reference value of requesting dynamic information according to the active degree, determines an information updating degree of the at least one second user in a preset second time interval, determining a time interval adjustment value of requesting the dynamic information based on the information updating degree; determines a time interval value according to the time interval reference value and the time interval adjustment value of requesting the dynamic information, and requests the dynamic information of the at least one second user according to the time interval value of requesting the dynamic information. Thus, a balance between a real-time performance and an amount of service requests is performed, costs are saved and it is ensured to obtain the dynamic information in real time.
US09396241B2
User interface controls that facilitate the specification/modification of data hierarchies. In one set of embodiments, a first UI control component can be provided that comprises an ordered group of drop-down menus. Each drop-down menu in the ordered group can be populated with a selectable list of attributes from a data set and can be associated with a level in a data hierarchy. By selecting values using the various drop-down menus, a user can interactively specify a data hierarchy for the data set. The data set can then be visualized according to the specified hierarchy. In further embodiments, a second UI control component can be provided in addition to the first UI control component. The second UI control component can allow a user to interactively enable or disable certain drop-down menus in the ordered group, thereby acting as a “depth filter” for controlling the depth of the data hierarchy.
US09396232B1
The APPARATUSES, METHODS AND SYSTEMS FOR A RULE-INTEGRATED VIRTUAL PUNCH CLOCK (hereinafter “RIVPC”) implement efficient and scalable monitoring, regulation, and allocation of computational processing, data, labor, and/or the like resources within an enterprise. The RIVPC may facilitate tracking employee time, such as time worked, time per activity, break time, vacation time, and/or the like, by providing an electronic time clock interface at an employee terminal device. The RIVPC may further be configured to track, implement and/or enforce one or more labor rules, regulations, laws, company policies, wage schedules, and/or the like based on one or more rulesets embedded in and/or interacting with the virtual clock components of the RIVPC. The embedded rules may be selected and/or enforced selectively based on user characteristics, including one or more descriptive business grammar strings associated with a user.
US09396226B2
A tree-based trylock technique for reducing contention on a root trylock includes attempting to acquire a trylock at each node of a tree-based hierarchical node structure while following a traversal path that begins at a leaf node, passes through one or more of internal nodes, and ends at a root node having the root trylock. The trylock acquisition operation succeeds if each trylock on the traversal path is acquired, and fails if any trylock on the traversal path cannot be acquired. A trylock housekeeping operation releases all non-root trylocks visited by the trylock acquisition operation, such that if the trylock acquisition operation succeeds, only the root trylock will be remain acquired at the end of the operation, and if the trylock acquisition operation fails, none of the trylocks will be remain acquired at the end of the operation.
US09396225B2
A method and system for addressing a unique device from an address book, the method having the steps of: receiving a message having a root token and a secondary token; checking whether the root token exists within the address book, if no, creating a record in the address book with the root and secondary token; and if yes, checking whether the secondary token exists within the address book, if yes, providing a representation of the unique device; and if no, storing the secondary token against the root token in the address book.
US09396215B2
A search device (101) obtains a specified length to be specified in a search query based on a position of an object having such a position set in accordance with the intent of a user. A detector (102) detects respective positions of multiple objects changing the respective positions in accordance with the intent of the user in a real space. A calculator (103) calculates a specified length on the basis of the intent of the user based on the detected positions of the multiple objects. A searcher (104) searches for product records having a product size satisfying a search condition based on the calculated specified length from a product database managing product records each containing at least a product size and a product image. A display (105) displays on a screen the product image of the searched product record.
US09396213B2
A method for providing keywords and a video apparatus applying the method are provided. The method for providing keywords includes separating metadata from content, extracting keywords in the content from the metadata, and generating a keyword list using the keywords and images related to the keywords. It is thus possible to display the keywords together with the images related to the keywords, so a user may register desired keywords more conveniently without needing to manually individually input keywords.
US09396198B2
A computer system, comprising: a file server; a metadata server; and a business server, the metadata server being coupled to a storage apparatus for providing a save area for storing at least one file that is removed from the file server, the metadata server storing a metadata repository for managing metadata of a file and the files stored in the save area, the metadata server being configured to: store a file as a saved file in the save area, in a case of detecting that the file stored in the file server is to be removed; and store information indicating a location of the file in the file server and information indicating the location of the saved file in the save area in association with each other in the metadata repository.
US09396173B2
A system and method for the automatic generation of a website. The website is created upon a user request, where the user provides identification information that is used to search an information database. The information will provide a reference to a code that relates to a template that is used to specify the layout, style and content of the website that is to be generated, and the website is then generated in accordance with the structure of the template, based on content contained in the information database. The user may engage the system and method by means of e-mail or a dedicated website or other such suitable means.
US09396167B2
Page layout of content items from a variety of sources is performed. A content processing system queues content items, such as user-generated blogs, tweets, social networking status updates and other postings, received from a variety of sources. Each content item comprises one or more assets from one or more asset types. The asset types include text, images, and video. A page builder retrieves items from the queue and determines the item's size constraints. A template is selected from a template database to use as a layout for the items on a page; each template has a number of slots into which content can be placed. A layout module lays out the items into the slots of the selected template based on the respective size and aspect ratio constraints of the items, in order to build a page to serve a client device.
US09396161B2
An adaptable integrated circuit is disclosed having a plurality of heterogeneous computational elements coupled to an interconnection network. The interconnection network changes interconnections between the plurality of heterogeneous computational elements in response to configuration information. A first group of computational elements is allocated to form a first version of a functional unit to perform a first function by changing interconnections in the interconnection network between the first group of heterogeneous computational elements. A second group of computational elements is allocated to form a second version of a functional unit to perform the first function by changing interconnections in the interconnection network between the second group of heterogeneous computational elements. One or more of the first or second group of heterogeneous computational elements are reallocated to perform a second function by changing the interconnections between the one or more of the first or second group of heterogeneous computational elements.
US09396145B1
A single integrated circuit comprises one or more functional modules; a bus port; a bus in communication with the one or more functional modules and the bus port; and a bus tracer disposed within the integrated circuit and configured to capture activity on the bus. A method for a single integrated circuit comprising a bus comprises capturing, in a bus tracer disposed within the single integrated circuit, activity on the bus; and providing, through a bus port of the single integrated circuit, the activity captured by the bus tracer.
US09396144B2
A data reception circuit removes reliance on stacked transistors providing analog logic processing. A first trigger element outputs an up signal in response to receiving an indication of receipt of a data signal by a receiving device without consideration of an output signal from the receiving device. A second trigger element outputs a down signal in response to receiving an indication of receipt of a data signal by a receiving device without consideration of an output signal from the receiving device. Switches control provision of signals to a received signal line for the receiving device in response to the outputs of the trigger elements. A blocking feedback circuit provides a blocking signal for the receiving device to effect blocking the receiving device from sending data to the sending device when the receiving device is receiving data from the sending device.
US09396134B2
Architecture that utilizes logical combinations (e.g., of Boolean logic) of authorizations as a logical authorization expression that is computed through a proofing process to a single proof value which equates to authorizing access to an intended entity. The authorizations are accumulated and processed incrementally according to an evaluation order defined in the authorization expression. The logical combinations can include Boolean operations that evaluate to a proof value associated with a sum of products expression (e.g., combinations of AND, OR, etc.). The incremental evaluations output corresponding hash values as statistically unique identifiers used in a secure hash algorithm that when evaluated in order allow execution of a specific command to access the entity. The architecture, employed in a trust module, uses minimal internal trust module state, and can be employed as part of a device system that handles trust processing to obtain authorization to access the intended entity.
US09396132B2
Provided is a storage control device including a first read processing unit configured to read data having any one value of a first value or a second value based on a first threshold value in a memory cell, the data being read as first read data, a first write processing unit configured to rewrite the memory cell to the first value when write data is the first value and the first read data is the second value, a second read processing unit configured to read second read data based on a second threshold value different from the first threshold value in the memory cell, and a second write processing unit configured to rewrite the memory cell to the second value when the write data is the second value and the second read data is the first value.
US09396126B2
A system and machine-implemented method for clearing an application cache. A request for a manifest file is received from an electronic device, the manifest file indicating a current version of application resources for loading web content offline. A determination is made if the request includes a first instruction for clearing an application cache on the electronic device, the application cache comprising a stored version of application resources for loading web content offline. In a case where the request includes the first instruction, a second instruction is transmitted to the electronic device, the second instruction for instructing the electronic device to clear the application cache.
US09396100B2
In an approach for testing software, a computer receives a series of two or more revisions to a set of software code. The computer identifies modifications between the series of two or more revisions. The computer categorizes the series of two or more revisions into one or more categories of revisions based on the identified modifications. The computer tests at least one of the series of two or more revisions from at least one of the one or more categories of revisions.
US09396096B2
The present disclosure provides an Android automated cross-application testing device and method. The device comprises a primary application testing unit, a trigger monitoring unit, a secondary application testing control unit, a secondary application testing unit, a secondary application test result recording unit, a library file storage unit, a primary application test checking unit, a test result processing unit, and a test result output unit. The method comprises monitoring the starting of a secondary application in the primary application testing process; testing the secondary application and collecting and processing the test result of the secondary application; and continuing the test of the primary application. If the test of the secondary application is successful, the above steps are repeated until the test of the primary application is completed. The method further comprises terminating the test of the primary application if the test of the secondary application times out or fails.
US09396094B2
Described are a system and method for performing an automated quality assessment on a software program under test. A test automation system executes a test on a software program Data related to the test is automatically collected. The data includes first information determined by the test automation system in response to executing the test. The data further includes second information related to the test and received from a source other than the test automation system. The first information is analyzed. A quality assessment of the software program is generated from the analyzed first information and from the second information.
US09396089B2
Systems and methods are disclosed for logging encoded diagnostic information from a sequence of processing operations, the processing operations generated by an activity in a computing environment. Diagnostic information is tracked by activity, across process boundaries where the processes can be in computationally isolated, or “sandboxed”. Within each process, diagnostic information for an activity is stored in an activity-specific buffer registered with a kernel in the computing environment. For each activity in the computing system, the kernel keeps a list of all processes that have performed, or are performing, a processing task of the activity. The kernel also keeps a reference to the activity-specific log buffers for the activity for each process associated with the activity. If a processing operation for an activity fails, all activity-specific logs from all processes that are associated with the activity can be collected. A report can be generated from the collected logs for the activity.
US09396087B2
A performance data collection unit collects the performance data of managed CPUs from a performance measurement unit. A grouping unit compares the collected performance data with each other, forms groups of CPUs whose performance data is approximate to each other, and selects a representative CPU of each group. A performance data transmission unit transmits the collected performance data to a performance data management apparatus that accumulates and manages the performance data. In this connection, the performance data of the representative CPUs of the groups is transmitted at specified transmission intervals, and the performance data of the other CPUs of the groups is transmitted at transmission intervals that are longer than the specified transmission intervals.
US09396083B2
A mechanism is provided for identifying an inter-relationship between a first process and the second process of a computer system. A correlation is detected between the first process and the second process based on a timing of the first process and the second process accessing a system resource of the computer system. An inter-relationship is then identified between the first process and the second process based on the detected correlation between the first process and the second process.
US09396082B2
A particular method includes initiating, at an analyzer, execution of a software component at a first computing device. The first computing device includes hardware components and sensors. The sensors are external to the hardware components. A first hardware component of the hardware components is coupled to a second hardware component of the hardware components. A first sensor of the sensors is configured to monitor communications between the first hardware component and the second hardware component. The method also includes receiving monitoring data, from the first sensor, regarding a communication between the first hardware component and the second hardware component. The method further includes analyzing first effects of executing the software component on the first computing device based at least partially on the monitoring data.
US09396081B1
Techniques and mechanisms for performing dequeue operations for agents of a test bench environment. In an embodiment, a first group of agents are each allocated a respective ripe reservation and a second set of agents are each allocated a respective unripe reservation. Over time, queue management logic allocates respective reservations to agents and variously changes one or more such reservations from unripe to ripe. In another embodiment, an order of servicing agents allocated unripe reservations is based on relative priorities of the unripe reservations with respect to one another. An order of servicing agents allocated ripe reservations is on a first come, first served basis.
US09396080B2
A method for analyzing a read error event is provided comprising reading a page of data stored in memory, determining a read error event for the page of data, and identifying a scope of the read error event in the memory. In another embodiment, a method for performing a preliminary read error recovery is provided comprising reading a first data unit from memory and identifying a bit error rate for a first data unit with a correction engine, determining that the bit error rate is above a threshold, accessing a data structure including entries identifying data units and read error event information associated with the data units, identifying a second data unit in an entry that matches the first data unit, and performing a preliminary read error recovery process on the first data unit using the information in the entry to reduce the bit error rate below the threshold.
US09396079B2
A semiconductor memory device includes a memory cell array including a normal region for storing a plurality of data, an error information region for storing a plurality of error information data corresponding to the plurality of normal data, respectively, and a redundancy region for replacing the normal region, an error detection unit suitable for detecting an error on the plurality of data in response to the plurality of error information data, and storing an error location information, which indicates a storage region of a data having an error in the normal and redundancy regions, based on an error detection result, and a repair operation unit suitable for replacing the storage region, which is indicated by the error location information, by the redundancy region during a repair operation period.
US09396076B2
A Version Control System (VCS) and methods having high availability, and combining the advantages of a centralized VCS while overcoming the limitations of centralized VCSs in a cluster environment. The system and method copes with failures of components in a cluster environment gracefully to guarantee uptime. The VCS and methods support high availability in a centralized VCS utilizing a plurality of repositories having a suitable architecture. In particular embodiments the architecture utilizes one or more of: Active-Passive repository replication; Active-Passive repository replication with automatic recovery; Active-Active repository replication; and hybrid model (Active-Active and Passive repository replication).
US09396068B2
Method and apparatus for redundant array of independent disks (RAID) recovery are disclosed. In one embodiment, a RAID controller schedules requests to rebuild failed drives based on the wear state of secondary drives and input/output (I/O) activity. The controller may be configured to assign higher scheduling priority to rebuild requests only when necessary, so as to reduce the time needed for the rebuild and to avoid affecting performance of the RAID system. In particular, the controller may give higher priority to rebuild requests if secondary drive failure is likely. In addition, the controller may determine when write-intensive periods occur, and assign lower priority to rebuild requests during such periods.
US09396067B1
Disclosed herein is an enhanced volume manager (VM) for a storage system that accelerates input/output (I/O) performance for random write operations to a striped disk array using parity. More specifically, various implementations are directed to accelerating “random writes” (writes comprising less than a complete stripe of data) by consolidating several random writes together to create a “sequential write” (a full-stripe write) to eliminate one or more read operations and/or increase the volume of new/updated data stored for each write operation. Several such implementations comprise functionality in the VM (volume manager) for identifying random write I/O requests, queuing them locally in a journal, and then periodically flushing the journal to the disk array as a sequential write request.
US09396057B2
An approach is provided for collecting data for diagnosing a failure of a computer hardware device. After an indication of the failure of the computer hardware device that results in a full system crash is received, an address translation table of a central processing unit of the computer hardware device is collected. A format of call stack frames of an operating system (OS) image of the computer hardware device is retrieved. A type of the OS image is identified as being a hypervisor program image. Based on the collected address translation table, the retrieved format of the plurality of call stack frames, and the type of the OS image being a hypervisor program image, the call stack frames are retrieved and output to a computer file.
US09396055B2
An electronic device includes a plurality of buffers and a log recording portion. In the plurality of buffers, a plurality of kinds of logs are to be recorded. The log recording portion records each log in a buffer, among the plurality of buffers, that is assigned in accordance with a recording interval of the log.
US09396040B2
An approach is provided for providing multi-level distributed computations. A distributed computation manager receives at least one request to migrate at least one computation closure within a computational architecture, the computational architecture comprising a plurality of architectural levels including, at least in part, a device level, an infrastructure level, and a cloud computing level. The distributed computation manager also determines to select at least one of the architectural levels based, at least in part, on a determination of whether the network infrastructure level can support the at least one computation closure. The distributed computation manager further determines to migrate the at least one computation closure to the selected at least one of the architectural levels.
US09396032B2
Methods and apparatuses may prioritize the processing of high priority and low priority contexts submitted to a processing unit through separate high priority and low priority context submission ports. According to one embodiment, submission of a context to the low priority port causes contexts in progress to be preempted, whereas submission of a context to the high priority port causes contexts in progress to be paused.
US09396026B2
A processing control method whereby a management server: assigns work to and executes said work on a computer; sets the processing start time and the processing end time for the aforementioned work as task execution information; sets a first physical resource amount, which is the amount of the physical resources of the aforementioned computer needed for execution of the aforementioned processing; acquires a second physical resource amount, which is the amount of the physical resources of the aforementioned computer that are being used; updates the processing start time for the aforementioned work to a time that is close to the current time when the aforementioned computer has the physical resources of the sum of the aforementioned first physical resource amount and the aforementioned second physical resources; and instructs the aforementioned computer to begin the aforementioned processing when the current time reaches the aforementioned processing start time.
US09396025B2
A method, system, and computer program product for automated data center platform consolidation. The method commences defining a set of source platforms (e.g., servers, database machines, network infrastructure components, etc.) where the source platforms are associated with time-variant demand models (e.g., computing demand during the working/daytime periods, demand at night, etc.). The demand models can be measured or estimated, and can be in any units of time (e.g., days, hours, etc.). Then a set of target platforms is defined where a member of the set of target platforms has a respective target platform profile comprising an initial time-variant availability model to compare with the time-variant demand models of the source platforms. Time-variant constraints (e.g., not more than 80% utilization during working/daytime periods, etc.) are observed while mapping members of the set of source platforms to the members of the set of target platforms until a consolidation stopping condition is reached.
US09396015B2
A processing device executing a registration service receives information identifying a first device, a second device and an application running on the first device. The processing device determines a registration technique that is supported by both the application and the second device and sends a message indicating the registration technique to at least one of the first device or the second device, wherein the application is to perform an operation associated with the first registration technique to bind the second device to the user account.
US09396009B2
Machines, systems and methods for managing resources allocated in a virtualized computing network are provided. The method comprises monitoring resource usage by a first host, wherein the first host, in addition to the first host's dedicated resources, has access to a first set of sharable resources, and wherein the second host, in addition to the second host's dedicated resources, has access to a second set of sharable resources; determining whether the second host has excess resource capacity in the second host's dedicated and sharable resources, in response to determining that resource usage of the first host in the first host's dedicated and sharable resources has exceeded a resource usage threshold; and reallocating one or more resources in the second set of sharable resources from the second host to the first host, in response to determining that the second host has excess resource capacity.
US09396004B1
An embodiment of a system and method of managing a configuration of a virtual machine. An embodiment may include analyzing a configuration of a first computing system to identify a native configuration related to a first virtual machine and analyzing a second computing system to determine whether or not the native configuration should be used to configure the second computing system. If the native configuration should be used to configure the second virtual machine then an embodiment may include using the native configuration information to establish a second virtual machine on the second computing system, and if the native configuration should not be used to configure the second virtual machine then using the native configuration information to create intermediate configuration information and using the intermediate configuration information to establish a second virtual machine on the second computing system.
US09395993B2
Execution-Aware Memory protection technologies are described. A processor includes an instruction fetch unit to fetch instructions of applications executing in a multitasking environment and an execution unit to execute the instructions. A memory protection unit (MPU) enforces memory access control of the applications by defining an instruction region (I-space) and a data region (D-space and linking the I-space to the D-space. When the MPU determining whether an instruction address is within the I-space and whether a data address of a data access operation is within the D-space. The MPU issues a memory protection fault for the data access operation when either the instruction address is not within the I-space or the data address is not within the D-space.
US09395992B2
There is provided a method and system for replacing an instruction with another instruction. A match register stores an opcode that identifies an instruction to be replaced. A swap register stores an instruction that replaces the identified instruction. A multiplexer chooses the instruction stored in the swap register over the identified instruction if predecode bits of the identified instruction are set.
US09395991B2
A method and load and store buffer for issuing a load instruction to a data cache. The method includes determining whether there are any unresolved store instructions in the store buffer that are older than the load instruction. If there is at least one unresolved store instruction in the store buffer older than the load instruction, it is determined whether the oldest unresolved store instruction in the store buffer is within a speculation window for the load instruction. If the oldest unresolved store instruction is within the speculation window for the load instruction, the load instruction is speculatively issued to the data cache. Otherwise, the load instruction is stalled until any unresolved store instructions outside the speculation window are resolved. The speculation window is a short window that defines a number of instructions or store instructions that immediately precede the load instruction.
US09395983B2
For use in a data processing system comprising a processor configured to execute a first set of instructions corresponding to a first thread and a second set of instructions corresponding to a second thread, a method is provided. The method comprises in response to execution of a debug related instruction by the first thread while executing the first set of instructions, generating a debug event for processing by the second thread, wherein processing the debug event comprises causing a halting operation related to the processor.
US09395982B1
Computer-implemented methods for pushing or popping an element on to of off of an N-way linked list in a computer memory may include one or more atomic memory operations on a handle of the N-way linked list. One embodiment for pushing a first element on to an N-way linked list may include setting a next sequential element pointer of the first element to point to an unknown location marker. Another embodiment for popping a first element off of an N-way linked may include marking a sub-list tail handle with a designation indicating that the particular sub-list is involved in a pop process. In yet another embodiment, a method for popping a first element off of an N-way linked list may include storing in a sub-list tail handle a pointer to a pseudo element. The handle may fit within a single line of cache memory.
US09395976B2
An invented information processing apparatus includes a firmware renewal unit for renewing the firmware stored in the electronic device to be new firmware, a version retrieval unit for retrieving firmware version information indicating a version of the new firmware, a renewal information retrieval unit for detecting the version of the software compatible with the new firmware using the software version information, a version confirmation unit for selecting software of a newly required version, and an installation unit for installing the software of the newly required version.
US09395975B2
A method and system for generating a ROM patch are provided. In one embodiment, a computing device obtains an original assembly code and a modified assembly code which is a modified version of the original assembly code, the original assembly code being used for an executable code which is stored in a ROM of a device. The computing device compares the original assembly code and the modified assembly code to identify difference(s) in the modified assembly code with respect to the original assembly code. The computing device then compiles the difference(s) (sometimes, after adjusting the differences) and generates a ROM patch by converting the compiled difference(s) into a replacement executable code for some of the executable code stored in the ROM of the device. In another embodiment, a method and system for using a ROM patch are disclosed.
US09395974B1
A method of operating a data center includes providing a first operating environment in a first portion of the data center and providing a second operating environment in a second portion of the data center. The first operating environment meets a first set of infrastructure specifications. The second operating environment meets a second set of infrastructure specifications. At least some of the infrastructure specifications of the second set of infrastructure specifications are less stringent than corresponding infrastructure specifications of the first set of one or more infrastructure specification.
US09395973B2
An information processing apparatus 10 specifies a second virtual machine that provides a service on which a first virtual machine depends. The information processing apparatus 10 sets a pointer between the first virtual machine and the second virtual machine by referring to application information associated with, for each application, a parameter type, of another virtual machine, that is used to create a disk image of a virtual machine associated with an application and that is attached when a resource is allocated to the other virtual machine. The information processing apparatus 10 deploys the first virtual machine and the second virtual machine by creating, in accordance with the pointer, a disk image of the second virtual machine or the first virtual machine from a parameter that is set when a resource of the first virtual machine or the second virtual machine.
US09395971B2
An install request including a hierarchy of a complex computer environment is received, wherein the hierarchy comprises a first component needed on the first computer and one or more other components needed in the complex computer environment. One or more other computers on which to install the one or mother components is determined. Responsive to determining the one or more other computer on which to install the one or more other components, installation of the one or more other components on the one or mother other computers is initiated.
US09395967B2
Embodiments of the present invention provide a method, system and computer program product for workload deployment density management for a multi-stage architecture implemented within a multi-tenant computing environment. The method includes receiving different requests from different tenants of a multi-tenant computing environment to deploy respectively different application instances of respectively different computer programs into different nodes of the host computing system. The method also includes determining from each request an associated stage of a software lifecycle for a corresponding one of the application instances. Finally, the method includes deploying each of the application instances into a particular one of the nodes depending upon an associated stage of each of the application instances so that each of the nodes hosts different application instances for different tenants of a common stage of the software lifecycle.
US09395962B2
A technology for executing an external operation from a software-pipelined loop is provided. Code performance efficiency can be improved by overlapping the execution of the external operations of the loop and the iterations of the loop.
US09395961B1
Embodiments relate to fingerprint-based code version selection. An aspect includes based on a call to a method being issued by calling software that is currently executing on a processor of a computer system, determining a fingerprint comprising a representation of a sequence of behavior that occurs in the processor while the calling software is executing. Another aspect includes, based on determining that the match for the fingerprint is located in the entry in the fingerprint table, executing the associated code version of the method. Another aspect includes, based on determining that no match for the fingerprint is located in any entry in the fingerprint table: determining a new code version of the method by a compiler of the computer system; storing the fingerprint with an identifier of the new code version in a new entry in the fingerprint table; and executing the new code version.
US09395956B2
Methods and apparatus for descriptively representing an application programming interface and data of a networked software application, and a descriptive domain specific language are presented. Additionally, methods and apparatus for mashup creation, including a repository of networking or Web applications that may be reused and combined, are presented. Networked software applications and mashups are provided with mostly declarative common structure and design, facilitating sharing and reuse of mashup and mashup parts. For example, a method for representing a first application programming interface of a first networked software application includes forming a declarative representation of the first application programming interface, and forming a declarative representation of first data. The first networked software application comprises the first application programming interface and the first data.
US09395948B2
An information acquiring unit acquires from a server the same type of information to be shown correspondingly in vehicle-mounted apparatuses with respect to one content, and information display units cause their displays to show the information to be shown correspondingly in the apparatuses from the same type of information acquired by the information acquiring unit. An operation for a content acquisition request by one of the plurality of vehicle-mounted apparatuses may only be required for showing the same type of information in synchronization on displays of the vehicle-mounted apparatuses, without separate operations for a content acquisition request in the vehicle-mounted apparatuses.
US09395945B2
A multi-display device is adapted to be dockable or otherwise associatable with an additional device. In accordance with one exemplary embodiment, the multi-display device is dockable with a smartpad. The exemplary smartpad can include a screen, a touch sensitive display, a configurable area, a gesture capture region(s) and a camera. The smartpad can also include a port adapted to receive the device. The exemplary smartpad is able to cooperate with the device such that information displayable on the device is also displayable on the smartpad. Furthermore, any one or more of the functions on the device are extendable to the smartpad, with the smartpad capable of acting as an input/output interface or extension of the smartpad. Therefore, for example, information from one or more of the displays on the multi-screen device is displayable on the smartpad.
US09395938B2
A storage control device includes a storage unit and a processor. The storage unit is configured to store therein a first score calculated for a first storage device. The processor is configured to add, upon detecting an event occurred in the first storage device, points corresponding to the event to the first score. The processor is configured to determine upon the addition, based on the first score and a second score, whether a sign of failure of the first storage device is detected. The second score is calculated for a first redundant unit of storage devices including the first storage device.
US09395921B2
A storage device includes a buffer memory and a flash memory, which can be connected with the host computer communicably. A method for writing data into the storage device includes: receiving a first write command from the host, the first write command including the data to be written, the address for the flash memory and the address or the buffer memory; based on the address for the buffer memory, writing the data to be written to the buffer memory; based on the address for the flash memory, writing the data to be written to the flash memory.
US09395920B2
Computerized methods, systems, and computer-storage media for throttling requests from virtual machines (VMs) to a hard-disk drive (HDD) are provided. When a request for disk I/O is received from a VM, a disk-drive model that simulates performance characteristics of the HDD is accessed. During access, the disk-drive model's estimation of HDD parameters and the disk-drive model's estimation of a current state of a disk head of the HDD are gathered. A projected execution time to carry out the request is computed as a function of the estimated HDD parameters and the estimated current state of the disk head. Also, an actual execution time to carry out the request is measured upon allowing the request to pass to the HDD. Using a comparison of the projected execution time and the actual execution time, the traffic of the requests from the VMs is throttled.
US09395916B2
The present invention relates to a technical field of touch input and discloses method and device for controlling a mobile apparatus having a touch screen including: generating a virtual keyboard which is larger than a virtual keyboard displaying area in the touch screen; and moving the virtual keyboard in response to a sliding of a touch point, where at least one direction component of a moving direction of the virtual keyboard is opposite to a direction component of a sliding direction of the touch point. With the technical solution of present application, the input experience for the user can be improved.
US09395915B2
In an operating method for a display device in a vehicle, the display device includes a touch-sensitive surface. A first output is displayed in an area of the display device. A first movement and a second movement by an operator relative to the touch-sensitive surface are detected simultaneously. The area is divided automatically along a first direction into a first subarea and a second subarea, if the first movement and the second movement proceed substantially in a second direction perpendicular to the first direction and away from each other. The first output is displayed in the first subarea and a second output is displayed in the second subarea.
US09395911B2
According to one example embodiment there is disclosed a system having a touch sensitive component responsive to a pen-based input includes a memory or storage device storing a symbol library defining at least one symbol representative of at least one logograph, pictograph or ideogram, the symbol library information specifying a topology structure defining sub-regions that symbol elements can appear in the at least one logograph, pictograph or ideogram, and a processor operatively connected to the touch sensitive component and the memory or storage device and operative to execute program instructions to interpret hand drawn indicia to identify at least one symbol based on recognizing at least one symbol element and its respective position in a sub-region.
US09395908B2
An information processing apparatus includes an operation unit; and a control unit performing a process in response to an operation executed through the operation unit. Different gesture operations are able to be assigned to an operation corresponding to copy of information and an operation corresponding to cut of information, respectively. The control unit selects a portion designated by a user in information displayed on a display unit, and then copies the selected portion when the user executes the gesture operation corresponding to the copy through the operation unit, whereas the control unit cuts the selected portion when the user executes the gesture operation corresponding to the cut through the operation unit.
US09395900B2
A mobile terminal is disclosed. The mobile terminal may include a touch screen configured to display a specific page a plurality of pages including at least one icon and a controller configured to move a specific icon displayed on the specific page to a page corresponding to a specific indicator a plurality of indicators when a predetermined user manipulation for selecting the specific indicator is detected, the plurality of pages having indicators corresponding the pages respectively.
US09395892B1
Disclosed are systems, methods, and non-transitory computer-readable storage media for shared folder backed integrated workspaces. In some implementations, a content management system can provide a graphical user interface (GUI) that integrates communications and content management into a single user interface. The user interface can include mechanisms that allow a user to provide input to generate a new workspace. The user interface can provide a mechanism to allow a user to view conversations related to the workspace and/or content items associated with the workspace. The user interface can present representations of content items associated with the workspace and allow the user to provide input to generate, view, edit, and share content items associated with the workspace.
US09395890B2
A first implementation of a software system is accessed and forms in the software system are selected. Controls on each selected form are interacted with in order to discover the behavior of the computer system. A representation of the behavior is stored for human observation or output to another system (such as a behavior verification system).
US09395889B1
In an embodiment, a plurality of graphical elements of a graphical model may be displayed on a display device. An indication of a graphical operation involving a first graphical element of the plurality of graphical elements may be received. The graphical operation when performed may establish a relationship between the first graphical element and one or more other graphical elements of the plurality of graphical elements that are compatible with the graphical operation. Two or more graphical elements of the plurality of graphical elements that are compatible with the graphical operation and one or more characteristics associated with the first graphical element may be identified. A visual indication may be provided on the display device. The visual indication may indicate that the identified plurality of graphical elements is compatible with the graphical operation.
US09395883B1
Systems and methods to provide social analytics information are disclosed. An exemplary system may include a database and a server coupled to the database. The server may include a business analytics module configured to receive data related to a business and generate, based on the received data, a set of business analytics information, and store the business analytics information in the database. The server further may include an interactive display module configured to generate an interactive object based on the business analytics information, provide controlled access to the interactive object to a first user of a predefined group of users, and provide a display of the interactive object to a second user of the predefined group of users. The interactive display module may be further configured to update, responsive to an input from the first user, the interactive object so as to generate an updated interactive object, and provide, responsive to the updating, a display of the updated interactive object to the second user.
US09395881B2
Systems and methods are provided for navigating display sequence maps. A system outputs, to a display device, content views in response to receiving requests for content views via a user interface. At least one of the content views may include a link that enables navigation to another one of the content views. Each of the content views may be a revision to content of another one of the content views. The system outputs, to the display device, a hierarchical representation of a sequence in which the content views were displayed in response to receiving a request for the hierarchical representation via the user interface. The hierarchical representation includes visual representations corresponding to the content views. The system outputs, to the display device, a selected one of the content views in response to a selection of the one of the visual representations corresponding to the content views from the hierarchical representation.
US09395861B2
A touch panel including upper and lower electrode substrates including upper and lower conductive layers, respectively; first and second electrodes respectively provided at bath ends of the upper conductive layer in a first direction for causing an electric potential distribution in the first direction; third and fourth electrodes respectively provided at both ends of the lower conductive layer in a second direction perpendicular to the first direction for causing an electric potential distribution in the second direction; a flexible substrate provided to be connected to the lower electrode substrate or the upper electrode substrate; a first resistor portion electrically connected to either of the first or second electrode and formed at the upper electrode substrate or the flexible substrate; and a second resistor portion connected to either of the third or fourth electrode and formed at the lower electrode substrate or the flexible substrate.
US09395856B2
A touch panel controller (3) capable of accurately detecting a change in capacitance includes: a driving section (4) which drives capacitors (C1 through CM) in parallel in accordance with N M-dimensional vectors; and an estimating section (5) which obtains linear sums of the capacitors (C1 through CM) in accordance with the driving in parallel and estimates values of the capacitors (C1 through CM) based on an inner product operation carried out with respect to (i) the linear sums of the capacitors (C1 through CM) and (ii) the N M-dimensional vectors, the driving section (4) driving the capacitors (C1 through CM) in parallel in a first order of the N M-dimensional vectors, the estimating section (5) estimating a first estimated value of the capacitors (C1 through CM) in accordance with the driving in parallel in the first order, the driving section (4) driving the capacitors (C1 through CM) in parallel in a second order of the N M-dimensional vectors, the estimating section (5) estimating a second estimated value of the capacitors (C1 through CM) in accordance with the driving in parallel in the second order, and the touch panel controller (3) further including an averaging section (17) estimating the values of the capacitors (C1 through CM) by averaging the first estimated value and the second estimated value.