US10135084B2
A solid ion conductor including a garnet oxide represented by Formula 1: L5+xE3(Mez,M2-z)Od Formula 1 wherein L includes Li and is at least one of a monovalent cation and a divalent cation; E is a trivalent cation; Me and M are each independently one of a trivalent, tetravalent, pentavalent, and hexavalent cation; 0
US10135082B2
A fuel cell system includes: a fuel cell outputting a current; a supply unit supplying oxidant gas; a flow-amount measurement unit measuring a flow amount of the oxidant gas; and a controller that feed-back controls the supply unit such that a measured flow-amount value converges toward a target flow-amount value, wherein the controller determines an acceptable current value in accordance with the measured flow-amount value, restricts the current to the acceptable current value or less, controls the current in accordance with a requested current value of the fuel cell; and performs a changing-suppression processing, when a condition continues for a predetermined period, the condition including that a changing width of the requested current value is equal to or less than a first value and a difference between the requested current value and the acceptable current value is equal to or less than a second value.
US10135081B2
A system and method for warming a fuel cell on an aircraft, the system includes at least one fuel cell. The fuel cell includes an anode and a cathode for creating thermal and electrical energy. A temperature sensor measures a first temperature of the fuel cell. A control unit is coupled to the temperature sensor. The control unit increases the first temperature to a second temperature in response to the first temperature being at least equal to a selected temperature threshold. Increasing of the first temperature is indicative of the control unit operating in a warming mode. The second temperature is higher than the selected temperature threshold.
US10135080B2
A turbine for decompression of air, including a spiral housing, including a spiral housing inlet for inflow of an airflow, a turbine wheel chamber situated in the spiral housing, in which at least one turbine wheel is mounted rotatably about an axis of rotation and which has at least one turbine outlet, a circulation channel situated in the spiral housing and extending azimuthally to the axis of rotation in at least some sections for guiding the airflow onto the turbine wheel, the circulation channel having an inside surface in which at least one outlet channel extending azimuthally to the axis of rotation is situated, the outlet channel having an outlet duct and the circulation channel having a circumferential line in its cross section, the circumferential line being subdivided so that a first partial length of the circumferential line of the circulation channel being shorter than a second partial length.
US10135073B2
An object of the present invention is to provide a dispersant for a resin current collector which can uniformly disperse a conductive filler to attain sufficient charge and discharge characteristics without impairing the output power per unit weight of a battery. The present invention provides a dispersant for a resin current collector comprising a polymer having a resin-philic block (A1) and a conductive filler-philic block (A2).
US10135056B2
An energy storage device includes: an electrode terminal; an electrode assembly; a current collector configured to electrically connect the electrode terminal to the electrode assembly; and a container configured to store the electrode assembly and the current collector. The current collector includes a terminal connection part connected to the electrode terminal and an electrode assembly-connection part connected to the electrode assembly. The energy storage device further includes a spacer disposed lateral to the electrode assembly-connection part of the current collector. The spacer includes a restriction part configured to contact a part in a longitudinal direction of the electrode assembly-connection part of the current collector to restrict movement of the current collector in the longitudinal direction.
US10135054B2
A battery separator is disclosed. The battery separator includes a polyolefin porous membrane which has a plurality of protrusions including a polyolefin. The protrusions are interspersed randomly on at least one surface of the polyolefin porous membrane at a density of not less than 3 protrusions/cm2 and not greater than 200 protrusions/cm2. The protrusions have a size W, where 5 μm≤W≤50 μm, and the protrusions have a height H, where 0.5 μm≤H. The battery separator also includes a modified porous layer, including a fluorine-based resin, and a plurality of inorganic particles laminated on the at least one surface of the polyolefin porous membrane. A concentration of the inorganic particles is not less than 40 wt. % and is less than 80 wt. %.
US10135053B2
Disclosed is a method of manufacturing a porous separator including an elastic material, and a separator manufactured by the method. The separator includes an elastic material being uniformly dispersed in a polymer at a weight ratio of 40:60 to 5:95, and a value of elongation at break in a low tensile strength direction at room temperature is greater than or equal to 250%. In addition, the method of manufacturing a porous separator includes forming an extruded sheet by extruding a mixture of a polymer and an elastic material at a weight ratio of 95:5 to 60:40, forming a film by annealing and stretching the extruded sheet, and forming a porous separator by heat setting the stretched film. Accordingly, a thermal shrinkage ratio of the film is reduced and an elongation at break is greatly increased, to provide a porous separator with improved stability.
US10135047B2
Provided is a battery pack with the heat buildup associated with battery damage can be reduced while increasing the battery capacity. This invention provides a battery pack having an array of power-generating elements comprising rechargeable single batteries. Each single battery comprises a casing and an electrode body in the casing. In the electrode body, the outermost circumference of the negative electrode is outside the outermost circumference of the positive electrode. The power-generating element further comprises a protection plate placed along the outer surface of the single battery. The protection plate has a metal layer and an insulating layer. The metal layer has first and second surfaces on the single battery side and on the side opposite from the first surface, respectively. The insulating layer is placed on the second surface side of the metal layer. The metal layer is electrically connected to the positive electrode with a given positive potential.
US10135045B2
A battery pack comprises a housing shaped to fit into a battery compartment of a battery-operated device. A battery is disposed within the housing. A light source emitting at least 50 lumens is mounted to the housing and is operably coupled to the battery such that the light source is selectably powered by the battery via a manually operated switch and the battery pack is configured to operate as a lighting device so that the battery pack can be used as a stand-alone lighting device. The battery pack has electrical connections for electrically connecting to the battery-operated device when the battery pack is inserted into the battery compartment of the battery-operated device. The battery pack includes a positive battery terminal and a negative battery terminal disposed on the housing and configured to contact a mating positive terminal and negative terminal of the battery-operated device.
US10135042B2
A battery module unit for a power supply device is designed so that the value of the adhesive strength between an end plate and an outermost tape and the value of the adhesive strength between a battery module and the outermost tape are greater than or equal to the minimum required strength for holding the battery module and around the minimum required strength. As a result, the battery module does not fall off in a normally held state and the end plate can be easily peeled off from the battery module at the time of reworking.
US10135025B2
An organic light-emitting display apparatus includes a display substrate and a thin film encapsulation layer on the display substrate. The display substrate includes at least one hole, a thin film transistor, a light-emitting portion electrically connected to the thin film transistor, and a plurality of insulating layers. The light-emitting portion includes a first electrode, an intermediate layer, and a second electrode. The display substrate includes an active area, an inactive area between the active area and the hole, and a plurality of insulating dams. Each insulating dam includes at least one layer. The inactive area includes a first area different from a laser-etched area and a second laser-etched area.
US10135020B1
Provided are organic light-emitting display panel, making method and display device. The display panel includes an array substrate including a display area and a non-display area, an organic light-emitting member and a encapsulation layer. A first buffer layer, a first and second insulation layer are placed in the non-display area; an antistatic ring is placed between the first and second insulation layers; a second buffer layer, a polysilicon layer, a gate insulation layer, a gate metallic layer, third and fourth insulation layers, a capacitor metallic layer, a source-drain metallic layer and a planarization layer are in the display area. The second and first buffer layers are made in a same process, the third and first insulation layers are made in a same process, the fourth and second insulation layers are made in a same process, and the antistatic ring and the gate metallic layer are made in a same process.
US10135015B1
One embodiment provides an oscillator. The oscillator can include an organic electrochemical transistor, which comprises a channel and a dynamic gate. The channel can include one of: a conductive polymer, a conductive inorganic material, and a small-molecule material. An electrochemical potential of the dynamic gate can vary substantially periodically, thereby resulting in the organic electrochemical transistor having a drain current that varies substantially periodically.
US10135001B1
The present disclosure provides an organic electroluminescent compound represented by the formula (I): wherein R1, R2, R3 and R4 each independently represents a substituted or unsubstituted (C6-C30) aryl group, a substituted or unsubstituted 3- to 30-membered heteroaryl group, —NR5R6, —SiR7R8R9, —SR10, —OR11, a cyano group, a nitro group, or a hydroxyl group. The present disclosure further provides an organic electroluminescent device comprising the organic electroluminescent compound represented by the formula (I).
US10135000B2
An organic electroluminescence device includes an anode, a cathode, and an emitting layer, in which the emitting layer contains a first compound, a second compound, and a third compound, a singlet energy S(M1) of the first compound and a singlet energy S(M2) of the second compound satisfy a numerical formula (Numerical Formula 1) below, an electron affinity Af(M1) of the first compound and an electron affinity Af(M2) of the second compound satisfy a numerical formula (Numerical Formula 2) below, and a triplet energy T(M1) of the first compound satisfies a numerical formula (Numerical Formula 3) below, S(M2)≥S(M1)×0.95 (Numerical Formula 1) Af (M2)−Af(M1)≥0.2eV (Numerical Formula 2) T(M1)≤2.0eV (Numerical Formula 3).
US10134997B2
Provided are an indenopyridine-based compound and an organic light-emitting device including the same. The indenopyridine-based compound is represented by Formula 1:
US10134996B2
It is an object of the present invention to provide a composite material that can be used for manufacturing a heat-resistant light-emitting element, provide a composite material that can be used for manufacturing a heat-resistant light-emitting element that can be driven with stability for a long period of time, and further, provide a composite material that can be used for manufacturing a light-emitting element that easily prevents short circuit between electrodes and uses less power. The present invention provides a composite material that has a first metal oxide skeleton including a first metal atom and an organic compound that is bound to the first metal atom by forming a chelate, where the first metal oxide exhibits an electron accepting property to the organic compound.
US10134994B2
The present invention relates to a novel polycyclic polymer comprising fused thiophene units. The present invention also relates to a method for producing such polymer as well as the use of such polymer, particularly in organoelectronic applications.
US10134984B1
Providing an electrode for a two-terminal memory device is described herein. By way of example, the electrode can comprise a contact surface that comprises at least one surface discontinuity. For instance, the electrode can have a gap, break, or other discontinuous portion of a surface that makes electrical contact with another component of the two-terminal memory device. In one example, the contact surface can comprise an annulus or an approximation of an annulus, having a discontinuity within a center of the annulus, for instance. In some embodiments, a disclosed electrode can be formed from a conductive layer deposited over a non-continuous surface formed by a via or trench in an insulator, or over a pillar device formed from or on the insulator.
US10134975B2
An electromechanical actuator includes an oscillation resonator having the shape of a rod. The oscillation resonator is divided by a dividing plane that is not parallel to the longitudinal direction of the oscillation resonator into a first resonator portion and a second resonator portion. At least the first resonator portion includes electromechanical means which, when activated, are configured to generate a 3-dimensional acoustic bulk wave are with a mode shape asymmetric with respect to the dividing plane.
US10134966B2
A light emitting device includes a first substrate including a flexible first base member and a first wiring pattern provided on the first base member; a second substrate including a second base member and a second wiring pattern provided on the second base member; and a plurality of light emitting elements mounted on the first wiring pattern. The first substrate includes: a joining end portion that is located at a first, joining end of the first substrate, and that overlaps a portion of the second substrate, and a second end, other than the joining end, that does not overlap the second substrate. The first wiring pattern and the second wiring pattern do not face each other. An electrically conductive joining member is disposed across the first wiring pattern and the second wiring pattern, while partially covering the joining end portion of the first substrate.
US10134964B2
In embodiments of the invention, a passivation layer is disposed over a side of a semiconductor structure including a light emitting layer disposed between an n-type region and a p-type region. A material configured to adhere to an underfill is disposed over an etched surface of the semiconductor structure.
US10134935B2
In an embodiment, photoelectric conversion units (10) each include a package (12) accommodating a photoelectric conversion device (11). The package (12) has a front surface (12a) having a window (13); and a side surface (12c). The package (12) includes a first coupling portion (14) protruding from the side surface (12c) in a first direction X parallel to a light incident surface (11a) of the photoelectric conversion device (11), and a second coupling portion (15) recessed from the side surface (12c) in the first direction X. The first coupling portion (14) includes a first terminal (16) electrically connected with the photoelectric conversion device (11), and the second coupling portion (15) includes a second terminal (17) electrically connected with the photoelectric conversion device (11). The first coupling portion (14) and the second coupling portion (15) have shapes and sizes matching each other, and are coupled with each other by fitting.
US10134931B2
The present invention relates to a layer system (1) for thin-film solar cells (100) and solar modules, comprising an absorber layer (4), which includes a chalcogenide compound semiconductor, and a buffer layer (5), which is arranged on the absorber layer (4) and includes halogen-enriched ZnxIn1-xSy with 0.01≤x≤0.9 and 1≤y≤2, wherein the buffer layer (5) consists of a first layer region (5.1) adjoining the absorber layer (4) with a halogen mole fraction A1 and a second layer region (5.2) adjoining the first layer region (5.1) with a halogen mole fraction A2 and the ratio A1/A2 is ≥2 and the layer thickness (d1) of the first layer region (5.1) is ≤50% of the layer thickness (d) of the buffer layer (5).
US10134930B2
The present invention provides a 3-dimensional P-N junction solar cell composed of a base board coated with a back plate on the upper face of the same; a P type semiconductor thin film formed on the top side of the back plate which has a 3-dimensional porous structure and is composed of P type semiconductor crystal grains; a N type buffer layer formed on the surface of the crystal grains of the said P type semiconductor thin film with playing a role of coating the thin film; and a transparent electrode formed on the surface of the crystal grains of the P type semiconductor thin film on which the N type buffer layer is formed. The solar cell of the present invention is a P-N junction solar cell including a 3-dimensional photo catalytic thin film, which can provide an improved photoelectric conversion efficiency, compared with the conventional P-N junction solar cell, owing to the formation of the N-type buffer layer on the surface of the crystal grains of the 3-dimensional P type semiconductor thin film.
US10134921B2
A semiconductor device includes an anode electrode, a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a conductive portion and a cathode electrode. The first semiconductor region is electrically connected to the anode electrode. The second semiconductor region is provided on the first semiconductor region. The conductive portion is provided in the first semiconductor region and the second semiconductor region with an insulating layer interposed between the conductive portion and the first and second semiconductor regions. The cathode electrode is electrically connected to the conductive portions and is electrically isolated from the second semiconductor region.
US10134917B2
A memory device including a first conductivity type vertically orientated semiconductor device in a first region of a substrate and a second conductivity type vertically orientated semiconductor device in a second region of the substrate. A common floating gate structure in simultaneous electrical communication with a first fin structure of the first conductivity type vertically orientated semiconductor device and a second fin structure of the second conductivity type vertically orientated semiconductor device.
US10134914B2
To improve field-effect mobility and reliability of a transistor including an oxide semiconductor film. Provided is a semiconductor device including an oxide semiconductor film. The semiconductor device includes a first insulating film, the oxide semiconductor film over the first insulating film, a second insulating film and a third insulating film over the oxide semiconductor film, and a gate electrode over the second insulating film. The oxide semiconductor film includes a first oxide semiconductor film, a second oxide semiconductor film over the first oxide semiconductor film, and a third oxide semiconductor film over the second oxide semiconductor film. The first to third oxide semiconductor films contain the same element. The second oxide semiconductor film includes a region where the crystallinity is lower than the crystallinity of one or both of the first oxide semiconductor film and the third oxide semiconductor film.
US10134911B2
A transistor whose channel is formed in a semiconductor having dielectric anisotropy is provided. A transistor having a small subthreshold swing value is provided. A transistor having normally-off electrical characteristics is provided. A transistor having a low leakage current in an off state is provided. A semiconductor device includes an insulator, a semiconductor, and a conductor. In the semiconductor device, the semiconductor includes a region overlapping with the conductor with the insulator positioned therebetween, and a dielectric constant of the region in a direction perpendicular to a top surface of the region is higher than a dielectric constant of the region in a direction parallel to the top surface.
US10134908B2
A MISFET is formed to include: a co-doped layer that is formed over a substrate and has an n-type semiconductor region and a p-type semiconductor region; and a gate electrode formed over the co-doped layer via a gate insulation film. The co-doped layer contains a larger amount of Mg, a p-type impurity, than that of Si, an n-type impurity. Accordingly, the carriers (electrons) resulting from the n-type impurities (herein, Si) in the co-doped layer are canceled by the carriers (holes) resulting from p-type impurities (herein, Mg), thereby allowing the co-doped layer to serve as the p-type semiconductor region. Mg can be inactivated by introducing hydrogen into, of the co-doped layer, a region where the n-type semiconductor region is to be formed, thereby allowing the region to serve as the n-type semiconductor region. By thus introducing hydrogen into the co-doped layer, the p-type semiconductor region and the n-type semiconductor region can be formed in the same layer.
US10134900B2
A structure of SiGe source/drain and a preparation method thereof are disclosed in the present invention. Firstly, providing a semiconductor single crystal silicon substrate. Secondly, etching the semiconductor single crystal silicon substrate to form recesses on both sides of the gate. Thirdly, epitaxially growing a SiGe seed layer and a SiGe bulk layer in the recesses in turn. Fourthly, subjecting the SiGe bulk layer to a crystal plane treatment with a mixed-gases. Fifthly, epitaxially growing a lattice change layer on the SiGe bulk layer. Finally, epitaxially growing a cap layer on the lattice change layer. The preparation method of the present invention can greatly improve the morphology of the SiGe epitaxy in the incomplete Un-tuck structure, and promote the formation of the subsequent metal silicide (NiSi), so that problems such as abnormal resistance and leakage of active area (AA leakage) can be effectively prevented.
US10134895B2
The presence of a facet or a void in an epitaxially grown crystal indicates that crystal growth has been interrupted by defects or by certain material boundaries. Faceting can be suppressed during epitaxial growth of silicon compounds that form source and drain regions of strained silicon transistors. It has been observed that faceting can occur when epitaxial layers of certain silicon compounds are grown adjacent to an oxide boundary, but faceting does not occur when the epitaxial layer is grown adjacent to a silicon boundary or adjacent to a nitride boundary. Because epitaxial growth of silicon compounds is often necessary in the vicinity of isolation trenches that are filled with oxide, techniques for suppression of faceting in these areas are of particular interest. One such technique, presented herein, is to line the isolation trenches with SiN to provide a barrier between the oxide and the region in which epitaxial growth is intended.
US10134894B2
Circuit module designs that incorporate dual gate field effect transistors are implemented with fully depleted silicon-on-insulator (FD-SOI) technology. Lowering the threshold voltages of the transistors can be accomplished through dynamic secondary gate control in which a back-biasing technique is used to operate the dual gate FD-SOI transistors with enhanced switching performance. Consequently, such transistors can operate at very low core voltage supply levels, down to as low as about 0.4 V, which allows the transistors to respond quickly and to switch at higher speeds. Performance improvements are shown in circuit simulations of an inverter, an amplifier, a level shifter, and a voltage detection circuit module.
US10134893B2
A vertical transport fin field effect transistor (VTFET) with a smaller cross-sectional area at the top of the fin than at the bottom, including, a substrate, a vertical fin on the substrate, wherein the vertical fin has a cross-sectional area at the base of the vertical fin that is larger than a cross-sectional area at the top of the vertical fin, wherein the cross-sectional area at the top of the vertical fin is in the range of about 10% to about 75% of the cross-sectional area at the base of the vertical fin, and a central gated region between the base and the top of the vertical fin.
US10134892B2
High voltage devices and methods for forming a high voltage device are disclosed. The method includes providing a substrate having top and bottom surfaces. The substrate is defined with a device region and a recessed region disposed within the device region. The recessed region includes a recessed surface disposed lower than the top surface of the substrate. A transistor is formed over the substrate. Forming the transistor includes forming a gate at least over the recessed surface and forming a source region adjacent to a first side of the gate below the recessed surface. Forming the transistor also includes forming a drain region displaced away from a second side of the gate. First and second device wells are formed in the substrate within the device region. The first device well encompasses the drain region and the second device well encompasses the source region.
US10134889B2
A disclosed compound semiconductor device includes a substrate, a channel layer formed over the substrate, an electron supply layer famed on the channel layer, a first cap layer and a second cap layer formed at a distance from each other on the electron supply layer, a source electrode formed on the first cap layer, a drain electrode formed on the second cap layer, and a gate electrode formed on the electron supply layer between the first cap layer and the second cap layer. Each of the first cap layer and the second cap layer is a stacked film formed by alternately stacking i-type first compound semiconductor layers and n-type second compound semiconductor layers having a wider bandgap than the first compound semiconductor layers.
US10134882B2
A method of controlling formation of junctions in a lateral bipolar junction transistor comprises: providing a starting substrate comprising a bulk silicon material as a handle substrate, a buried oxide layer on the handle substrate, and an intrinsic base semiconductor layer of germanium on the buried oxide layer; forming an extrinsic base layer on the intrinsic base semiconductor layer; etching at least a portion of the base layer; disposing a sidewall spacer on a side of the base layer; disposing a faceted germanium layer adjacent the sidewall spacer; recessing the faceted germanium layer and the intrinsic base semiconductor layer below the sidewall spacer; using a hot angle ion implantation technique to implant ions into a side of the intrinsic base semiconductor layer to form a junction edge/profile; annealing the implanted ions; and epitaxially growing a Si or SiGe layer on the germanium layer and the junction edge/profile.
US10134880B2
Fabrication methods and device structures for bipolar junction transistors and heterojunction bipolar transistors. A first dielectric layer is formed and a second dielectric layer is formed on the first dielectric layer. An opening is etched extending vertically through the first dielectric layer and the second dielectric layer. A collector is formed inside the opening. An intrinsic base, which is also formed inside the opening, has a vertical arrangement relative to the collector.
US10134879B2
The on-state characteristics of a transistor are improved and thus, a semiconductor device capable of high-speed response and high-speed operation is provided. A highly reliable semiconductor device showing stable electric characteristics is made. The semiconductor device includes a transistor including a first oxide layer; an oxide semiconductor layer over the first oxide layer; a source electrode layer and a drain electrode layer in contact with the oxide semiconductor layer; a second oxide layer over the oxide semiconductor layer; a gate insulating layer over the second oxide layer; and a gate electrode layer over the gate insulating layer. An end portion of the second oxide layer and an end portion of the gate insulating layer overlap with the source electrode layer and the drain electrode layer.
US10134862B2
High integrity, lower power consuming semiconductor devices and methods for manufacturing the same. The semiconductor device includes: semiconductor substrate; a well region in the semiconductor substrate; an interlayer structure over the well region, the interlayer structure including a back gate conductor, semiconductor fins at both sides of the back gate conductor and respective back gate dielectric isolating the back gate conductor from the semiconductor fins, respectively, wherein the well region functions as one portion of a conductive path of the back gate conductor; a punch-through stop layer at a lower portion of the semiconductor fin; a front gate stack intersecting the semiconductor fin, the front gate stack including a front gate dielectric and a front gate conductor and the front gate dielectric isolating the front gate conductor from the semiconductor fin; and a source region and a drain region connected to a channel region provided by the semiconductor fin.
US10134859B1
A field-effect transistor device including an asymmetric spacer assembly allows lower parasitic capacitance on the drain side of the device and lower resistance on the source side. The asymmetric spacer assembly is formed by a self-aligned process, resulting in less gate/junction overlap on the drain side of the device and greater gate/junction overlap on the source side of the device. Asymmetric transistors having small gate lengths can be obtained without overlay/misalignment issues.
US10134852B2
In a transistor including an oxide semiconductor film, movement of hydrogen and nitrogen to the oxide semiconductor film is suppressed. Further, in a semiconductor device using a transistor including an oxide semiconductor film, a change in electrical characteristics is suppressed and reliability is improved. A transistor including an oxide semiconductor film and a nitride insulating film provided over the transistor are included, and an amount of hydrogen molecules released from the nitride insulating film by thermal desorption spectroscopy is less than 5×1021 molecules/cm3, preferably less than or equal to 3×1021 molecules/cm3, more preferably less than or equal to 1×1021 molecules/cm3, and an amount of ammonia molecules released from the nitride insulating film by thermal desorption spectroscopy is less than 1×1022 molecules/cm3, preferably less than or equal to 5×1021 molecules/cm3, more preferably less than or equal to 1×1021 molecules/cm3.
US10134841B2
A nanowire comprises a source region, a drain region and a channel region. The source region is modified to reduce the lifetime of minority carriers within the source region. In an embodiment the modification may be performed by implanting either amorphizing dopants or lifetime reducing dopants. Alternatively, the source may be epitaxially grown with a different materials or process conditions to reduce the lifetime of minority carriers within the source region.
US10134836B2
A semiconductor device and a method of fabricating the same are provide. The fabricating method includes providing a silicon-on-insulator (SOI) substrate that includes, from bottom to top, a substrate, a first insulating layer and a semiconductor layer. The semiconductor layer is patterned to form a plurality of dummy patterns. A second insulating layer is formed around the plurality of dummy patterns. The plurality of dummy patterns are removed to form a plurality of openings. A dielectric structure is formed on the substrate and fills into the plurality of openings.
US10134833B2
A method is presented for tuning work functions of transistors. The method includes forming a work function stack over a semiconductor substrate, depositing a germanium oxide layer and a barrier layer over the work function stack, and annealing the germanium oxide layer to desorb oxygen therefrom to trigger oxidation of at least one conducting layer of the work function stack. The work function stack includes three layers, that is, a first layer being a TiN layer, a second layer being a titanium aluminum carbon (TiAlC) layer, and a third layer being a second TiN layer.
US10134832B2
A semiconductor device includes: a first conductivity type drift region having crystal defects generated by electron-beam irradiation; a first main electrode region of a first conductivity type arranged in the drift region and having an impurity concentration higher than that of the drift region; and a second main electrode region of a second conductivity type arranged in the drift region to be separated from the first main electrode region, wherein the crystal defects contain a first composite defect implemented by a vacancy and oxygen and a second composite defect implemented by carbon and oxygen, and a density of the crystal defects is set so that a peak signal intensity of a level of the first composite defect identified by a deep-level transient spectroscopy measurement is five times or more than a peak signal intensity of a level of the second composite defect.
US10134830B2
A deep trench capacitor and a method for providing the same in a semiconductor process are disclosed. The method includes forming a plurality of deep trenches in a first region of a semiconductor wafer, the first region having well doping of a first type. A dielectric layer is formed on a surface of the plurality of deep trenches and a doped polysilicon layer is deposited to fill the plurality of deep trenches, with the doped polysilicon being doped with a dopant of a second type. Shallow trench isolation is formed overlying the dielectric layer at an intersection of the dielectric layer with the surface of the semiconductor wafer.
US10134829B2
A display device includes a non-display area adjacent a display area, a thin film transistor, a display element, a thin film encapsulation layer, an organic insulating layer, a power voltage line, and a protective layer. The thin film transistor is on the display area and is connected to the display element. The thin film encapsulation layer covers the display element. The organic insulating layer is between the thin film transistor and display element and extends to the non-display area. The organic insulating layer includes a central portion corresponding to the display area, an outer portion surrounding the central portion, and a division region dividing the central portion and the outer portion and surrounding the display area. The power voltage line is in the non-display area and includes a portion corresponding to the division region. The protective layer covers an upper surface of the power voltage line in the division region.
US10134828B2
A display device according to an embodiment of the present invention includes: a base material including a display region, and a peripheral region which is located outside the display region, at least a part of the peripheral region being a bending region; an insulating layer that is disposed on the base material, extends from the display region to a part of the peripheral region, and is located apart from an edge of the base material; at least one level difference moderating layer that is disposed under the insulating layer and extends from an edge of the insulating layer toward a side of the bending region; and at least one wiring disposed on the insulating layer and the at least one level difference moderating layer.
US10134827B2
Provided is a display apparatus capable of reducing generation of defects during manufacturing of the display apparatus or while in use after being manufactured. The display apparatus includes a substrate including a bending area between a first area and a second area, the substrate being bent in the bending area about a bending axis; an inorganic insulating layer over the substrate and including a first feature that is either a first opening or a first groove, the first feature positioned to correspond to the bending area; and an organic material layer at least partially filling the first feature, and including a second feature that is a second opening or a second groove, the second feature extending along an edge of the substrate.
US10134815B2
Photodetectors, methods of fabricating the same, and methods using the same to detect radiation are described. A photodetector can include a first electrode, a light sensitizing layer, an electron blocking/tunneling layer, and a second electrode. Infrared-to-visible upconversion devices, methods of fabricating the same, and methods using the same to detect radiation are also described. An Infrared-to-visible upconversion device can include a photodetector and an OLED coupled to the photodetector.
US10134801B2
A method of forming a deep trench isolation in a radiation sensing substrate includes: forming a trench in the radiation sensing substrate; forming a corrosion resistive layer in the trench, in which the corrosion resistive layer includes titanium carbon nitride having a chemical formula of TiCxN(2-x), and x is in a range of 0.1 to 0.9; and filling a reflective material in the trench and over the corrosion resistive layer.
US10134799B2
A photodiode architecture comprises first, second, and third independent photodiodes, and a shared electrode. The first, second, and third photodiodes are each connected to respective sources of bias voltage and to a common shared electrode, whereby the photodiode architecture comprises at least one of a shared anode and shared cathode photodiode architecture. The photodiode architecture selectively reverse biases the first, second, and third photodiodes so that, during operation, at least one of the first, second and third photodiodes is always operating in a photoconducting mode, to enable capture and storage of charge from any photodiode in the architecture operating in photoconducting mode. Advantageously, the first photodiode can be configured to respond to a first wavelength of light and at least one of the second and third photodiodes can be configured to be responsive to a respective second or third wavelength of light shorter than the first wavelength of light.
US10134796B2
An improvement is achieved in the performance of a semiconductor device. A semiconductor device includes an n−-type semiconductor region formed in a p-type well, an n-type semiconductor region formed closer to a main surface of a semiconductor substrate than the n−-type semiconductor region, and a p−-type semiconductor region formed between the n−-type semiconductor region and the n-type semiconductor region. A net impurity concentration in the n−-type semiconductor region is lower than a net impurity concentration in the n-type semiconductor region. A net impurity concentration in the p−-type semiconductor region is lower than a net impurity concentration in the p-type well.
US10134784B2
To eliminate electric discharge when an element formation layer including a semiconductor element is peeled from a substrate used for manufacturing the semiconductor element, a substrate over which an element formation layer and a peeling layer are formed and a film are made to go through a gap between pressurization rollers. The film is attached to the element formation layer between the pressurization rollers, bent along a curved surface of the pressurization roller on a side of the pressurization rollers, and collected. Peeling is generated between the element formation layer and the peeling layer and the element formation layer is transferred to the film. Liquid is sequentially supplied by a nozzle to a gap between the element formation layer and the peeling layer, which is generated by peeling, so that electric charge generated on surfaces of the element formation layer and the peeling layer is diffused by the liquid.
US10134779B2
A display device including a substrate including a bending area arranged between a first area and a second area, the substrate being configured to be bent around a bending axis extending in a first direction, a first inorganic insulating layer disposed on the substrate and having a first opening overlapping the bending area, a first organic layer disposed in the first opening, and a plurality of first conductive layers disposed on the first organic layer and extending from the first area to the second area through the bending area, in which wherein at least one edge of the first organic layer overlapping the first conductive layers includes at least one first short circuit prevention pattern.
US10134777B2
Disclosed is a thin film transistor substrate capable of preventing a circuit from being damaged by static electricity, and a display device including the same, wherein the thin film transistor substrate includes a substrate having a display area for displaying an image, and a non-display area. The circuit is disposed in the non-display area. The circuit includes a first electrode, an insulating film on the first electrode, and a second electrode on the insulating film. An edge of the first electrode facing the display area extends beyond an edge of the second electrode facing the display area.
US10134771B2
An array substrate, a method of producing the array substrate, and a display panel incorporating the array substrate are disclosed. The array substrate includes a substrate, a gate line, a data line, and a spacer. The gate line and the data line are arranged over the substrate. The spacer is arranged over the gate line and the data line. The gate line and/or the data line is provided with a via hole at a position corresponding to a spacer. In this manner, a problem of a display panel having gaps of different sizes after assembly because of non-uniform thicknesses of the gate line and/or the data line can be avoided, which, in turn, prevents inhomogeneous color in the display.
US10134763B2
The capacitance between gate structures and source/drain contacts of FinFET devices is reduced by the incorporation of inner spacers in the top portions of the gate structures. A replacement metal gate process used in the fabrication of such devices includes formation of the inner spacers following partial removal of dummy gate material. The remaining dummy gate material is then removed and replaced with gate dielectric and metal gate material.
US10134747B2
A semiconductor device may include a first cell structure, a second cell structure, a pad structure, a circuit, and an opening. The pad structure may include a first stepped structure and a second stepped structure located between the first cell structure and the second cell structure. The first stepped structure may include first pads electrically connected to the first and second cell structures and stacked on top of each other, and the second stepped structure may include second pads electrically connected to the first and second cell structures and stacked on top of each other. The circuit may be located under the pad structure. The opening may pass through the pad structure to expose the circuit, and may be located between the first stepped structure and the second stepped structure to insulate the first pads and the second pads from each other.
US10134744B1
A semiconductor memory device includes a first inverter, a second inverter, a first and second inner access transistors, and a first and second outer access transistors. The first inverter includes a first pull-up transistor and a first pull-down transistor, the second inverter includes a second pull-up transistor (PL2) and a second pull-down transistor, and the first inverter and the second inverter forms a latch circuit. The first and second inner access transistors and the first and second outer access transistors are electrically connected to the latch circuit, and channel widths of the second inner access transistor and the second outer access transistor are different from each other.
US10134741B2
A method of forming an elevationally extending conductor laterally between a pair of conductive lines comprises forming a pair of conductive lines spaced from one another in at least one vertical cross-section. Conductor material is formed to elevationally extend laterally between and cross elevationally over the pair of conductive lines in the at least one vertical cross-section. Sacrificial material is laterally between the elevationally extending conductor material and each of the conductive lines of the pair in the at least one vertical cross-section. The sacrificial material is removed from between the elevationally extending conductor material and each of the conductive lines of the pair while the conductor material is crossing elevationally over the pair of conductive lines to form a void space laterally between the elevationally extending conductor material and each of the conductive lines of the pair in the at least one vertical cross-section.
US10134740B2
A semiconductor device including a substrate; a trench formed within the substrate; a gate insulating film formed conformally along a portion of a surface of the trench; a gate electrode formed on the gate insulating film and filling a portion of the trench; a capping film formed on the gate electrode and filling the trench; and an air gap formed between the capping film and the gate insulating film.
US10134739B1
Disclosed is a structure wherein lower source/drain regions of vertical field effect transistors (VFETs) of memory cells in a memory array are aligned above and electrically connected to buried bitlines. Each cell includes a VFET with a lower source/drain region, an upper source/drain region and at least one channel region extending vertically between the source/drain regions. The lower source/drain region is above and immediately adjacent to a buried bitline, which has the same or a narrower width than the lower source/drain region and which includes a pair of bitline sections and a semiconductor region positioned laterally between the sections. The semiconductor region is made of a different semiconductor material than the lower source/drain region. Also disclosed is a method that ensures that bitlines of a desired critical dimension can be achieved and that allows for size scaling of the memory array with minimal bitline coupling.
US10134737B2
An interconnect structure includes a lower interconnect layer, an intermediate interconnect layer, and an upper interconnect layer. First and second conductive lines in the lower interconnect layer extend generally in a first direction over a memory array region, and additional lower conductive lines in the lower interconnect layer extend generally in the first direction over a peripheral region. A first plurality of conductive line segments in the intermediate interconnect layer extend generally in the first direction over the memory array region, and additional intermediate conductive line segments in the intermediate interconnect layer extend generally in a second, perpendicular direction over the peripheral region. A second plurality of conductive line segments in the upper interconnect layer extend generally in the first direction over the memory array region, and additional upper conductive line segments in the upper interconnect layer extend generally in the first direction over the peripheral region.
US10134726B2
A diode string having a plurality of diodes for ESD protection of a CMOS IC device comprises a first diode and a last diode in the diode string, wherein the first diode and the last diode are both formed on a bottom layer in a silicon substrate, and remaining diodes in the diode string. The remaining diodes are formed on a top layer placed on top of the bottom layer. The diode string further comprises a plurality of conductive lines that connect the first diode and the last diode on the bottom layer sequentially with the remaining diodes on the top layer to form a three dimensional (3D) structure of the diode string.
US10134719B2
A semiconductor package and a manufacturing method for the semiconductor package are provided. The semiconductor package has a redistribution layer, at least one die over the redistribution layer, through interlayer vias on the redistribution layer and aside the die and a molding compound encapsulating the die and the through interlayer vias disposed on the redistribution layer. The semiconductor package has connectors connected to the through interlayer vias and a protection film covering the molding compound and the die. The protection film is formed by a printing process.
US10134716B2
A multi-package integrated circuit assembly can include a first electronic package having a first package substrate including a first die side and a first interface side. A first die can be electrically coupled to the first die side. A second electronic package can include a second package substrate having a second die side and a second interface side. A second die can be electrically coupled to the second die side. A metallic plated hole can be electrically coupled from the interface side of the first package substrate to the interface side of the second package substrate. A collective substrate can be attached to the first electronic package. For instance, the collective substrate can be located on a face of the first electronic package opposing the first package substrate. The collective substrate is electrically coupled to the first die and the second die through the first package substrate.
US10134715B2
A display includes a plurality of pixel chips, chixels, provided on a substrate. The chixels and the light emitters thereon may be shaped, sized and arranged to minimize chixel, pixel, and sub-pixel gaps and to provide a seamless look between adjacent display modules. The substrate may include light manipulators, such as filters, light converters and the like to manipulate the light emitted from light emitters of the chixels. The light manipulators may be arranged to minimize chixel gaps between adjacent chixels.
US10134714B2
Techniques are disclosed for making a flexible laminated circuit board using a metal conductor onto which a SMD may be attached. Conductive metal strips may be laminated to form a flexible substrate and the metal strips may then be perforated for the placement of LED package leads. The LED packages may be attached to the conductive strips using solder or a conductive epoxy and the upper laminate layer may include perforations exposing portions of the metal strips for the attachment of the LED packages. Alternatively, strings of LED packages may be fabricated by attaching LED packages to conductive strips and these strings may be laminated between flexible sheets to form a laminated LED circuit. Plastic housings may aid in attaching the LED packages to the conductive strips. The plastic housings and/or the laminate sheets may be made of a reflective material.
US10134712B1
Semiconductor die assemblies including stacked semiconductor dies having parallel plate capacitors formed between adjacent pairs of semiconductor dies in the stack, and associated systems and methods, are disclosed herein. In one embodiment, a semiconductor die assembly includes a first semiconductor die and a second semiconductor die stacked over the first semiconductor die. The first semiconductor die includes an upper surface having a first capacitor plate formed thereon, and the second semiconductor die includes a lower surface facing the upper surface of the first semiconductor die and having a second capacitor plate formed thereon. A dielectric material is formed at least partially between the first and second capacitor plates. The first capacitor plate, second capacitor plate, and dielectric material together form a capacitor that stores charge locally within the stack, and that can be accessed by the first and/or second semiconductor dies.
US10134709B1
A light emitting diode package including a circuit layer, a light-shielding layer, a plurality of light emitting diodes and an encapsulation layer is provided. A thickness of the circuit layer is less than 100 μm. The light-shielding layer is disposed on a first surface of the circuit layer and the light-shielding layer has a plurality of apertures. The light emitting diodes are disposed on the first surface of the circuit layer and in the apertures of the light-shielding layer. The light emitting diodes are electrically connected to the circuit layer. The encapsulation layer covers the light-shielding layer. A refractive index of the encapsulation layer is 1.4 and to 1.7. The Young's modulus of the encapsulation layer is larger than or equal to 1 GPa. A thickness of the encapsulation layer is greater than thicknesses of the light emitting diodes.
US10134708B2
A package includes a substrate, an Under-Bump Metallurgy (UBM) penetrating through the substrate, a solder region over and contacting the UBM, and an interconnect structure underlying the substrate. The interconnect structure is electrically coupled to the solder region through the UBM. A device die is underlying and bonded to the interconnect structure. The device die is electrically coupled to the solder region through the UBM and the interconnect structure. An encapsulating material encapsulates the device die therein.
US10134698B2
The present disclosure provides bond pad structures, boning ring structure; and MEMS device packaging methods. An exemplary bonding pad structure includes a plurality of first metal blocks made of a first metal material; and a plurality of second metal blocks made of a second metal material. The plurality of first metal blocks are used to prevent the squeezing out and extending of the plurality of second metal blocks. On at least one equal dividing plane of the bonding pad structure, the first metal material is shown at least one time; and the second metal material is shown at least one time.
US10134697B2
Various embodiments provide a semiconductor chip, wherein the semiconductor chip comprises a first contact area and a second contact area both formed at a frontside of the semiconductor chip; a passivation layer arranged at the frontside between the first contact area and the second contact area; and a contact stack formed over the frontside of the semiconductor chip and comprising a plurality of layers, wherein at least one layer of the plurality of layers is removed from the passivation layer and boundary regions of the contact areas being adjacent to the passivation layer and wherein at least one another layer of the plurality of different layer is present in the boundary region of the contact areas adjoining the passivation layer.
US10134683B2
A semiconductor device package includes a first circuit layer having a first surface and a second surface opposite the first side, a first electronic component, a shielding element, a shielding layer and a molding layer. The first electronic component is disposed over the first surface of the first circuit layer, and electrically connected to the first circuit layer. The shielding element is disposed over the first surface of the first circuit layer, and is electrically connected to the first circuit layer. The shielding element is disposed adjacent to at least one side of the first electronic component. The shielding layer is disposed over the first electronic component and the shielding element, and the shielding layer is electrically connected to the shielding element. The molding layer encapsulates the first electronic component, the shielding element and a portion of the shielding layer.
US10134678B2
The present disclosure provides a chip-on-film, a flexible display panel and a display device. The COF includes a plurality of output pads independent of each other. The plurality of output pads are disposed at a side of the substrate and are arranged in at least one row in the first direction. Virtual extension lines of all the output pads intersect at the same intersecting point on the base line. The flexible display panel includes a plurality of input pads independent of each other. The plurality of input pads are disposed in the binding region and are arranged in at least one row in the first direction. Virtual extension lines of all the input pads intersect at the same intersecting point on the base line.
US10134677B1
A semiconductor package device includes a first interconnection structure, a non-silicon interposer and a first die. The first interconnection structure has a first pitch. The non-silicon interposer surrounds the first interconnection structure. The non-silicon interposer includes a second interconnection structure having a second pitch. The second pitch is larger than the first pitch. The first die is above the first interconnection structure and is electrically connected to the first interconnection structure.
US10134669B2
A semiconductor device structure includes a first metal layer formed over a substrate and an interconnect structure formed over the first metal layer. The interconnect structure includes an upper portion, a middle portion and a lower portion, the middle portion is connected between the upper portion and the lower portion. The upper portion and the lower portion each have a constant width, and the middle portion has a tapered width which is gradually tapered from the upper portion to the lower portion.
US10134667B2
Provided are a chip-on-film (COF) semiconductor package capable of improving connection characteristics and a display apparatus including the package. The COF semiconductor package includes a film substrate, a conductive interconnection located on at least one surface of the film substrate and an output pin connected to the conductive interconnection and located at one edge on a first surface of the film substrate, a semiconductor chip connected to the conductive interconnection and mounted on the first surface of the film substrate, a solder resist layer on the first surface of the film substrate to cover at least a portion of the conductive interconnection, and at least one barrier dam on the solder resist layer between the semiconductor chip and the output pin.
US10134660B2
A semiconductor device includes a lead frame site including a die attach region and corrugated metal leads around the die attach region. Each of the corrugated metal leads includes two or more corrugations. Each of the two or more corrugations includes a first flat horizontal portion, a first vertical portion with a first end directly adjacent and connected to a first end of the first flat horizontal portion, a second flat horizontal portion with a first end directly adjacent and connected to a second end of the first vertical portion, and a second vertical portion with a first end directly adjacent and connected to a second end of the second flat horizontal portion. The first flat horizontal portion is in a different plane than the second flat horizontal portion.
US10134647B2
An interconnect assembly includes a bond pad and an interconnect structure configured to electrically couple an electronic structure to the bond pad. The interconnect structure physically contacts areas of the bond pad that are located outside of a probe contact area that may have been damaged during testing. Insulating material covers the probe contact area and defines openings spaced apart from the probe contact area. The interconnect structure extends through the openings to contact the bond pad.
US10134638B2
An embodiment is a structure. The structure comprises a fin on a substrate, isolation regions on the substrate, a dielectric region, and a gate structure. The fin includes a first epitaxial portion. The isolation regions are on opposing sides of the fin, and at least the first epitaxial portion of the fin protrudes from between the isolation regions. The dielectric region directly underlies the first epitaxial portion. A material of the dielectric region is different from a material of the isolation regions. The gate structure is along sidewalls and is over an upper surface of the fin. The gate structure defines a channel region in the first epitaxial portion.
US10134637B1
A semiconductor component is formed by providing a substrate having partially formed first and second transistors, a base electrode stack formed over the transistors, first and second emitter windows formed in the electrode stack over first and second collector regions of the transistors, and an oxide layer extending over the collector regions. A process entails forming a mask layer in a selected emitter window, optionally forming a selectively implanted collector (SIC) in an un-masked emitter window, and removing an oxide layer and forming an epitaxial layer in the un-masked emitter window. The process further entails forming an oxide layer over the epitaxial layer and repeating the operations of forming a mask layer for another selected emitter window, optionally forming a SIC in another un-masked emitter window, and removing an oxide layer and forming an epitaxial layer in the un-masked emitter window. The epitaxial layers may have different epitaxial growth profiles.
US10134636B2
A method for producing a semiconductor device in accordance with various embodiments may include providing a semiconductor workpiece attached to a first carrier; dicing the semiconductor workpiece and the carrier so as to form at least one individual semiconductor chip; mounting the at least one semiconductor chip with a side facing away from the carrier, to an additional carrier.
US10134630B2
Disclosed herein are a metal-graphene heterojunction metal interconnect, a method of forming the same, and a semiconductor device including the same. The method includes: a) forming a carbon source layer by depositing a carbon source on a top surface of a substrate; b) forming a metal catalyst layer by depositing a metal catalyst on the carbon source layer; and c) carrying out heat treatment on the substrate comprising the carbon source layer and the metal catalyst layer. The graphene can be formed by carrying out the heat treatment only once irrespectively of the number of substrates, and accordingly to the manufacturing time and manufacturing cost of the metal interconnect are reduced, and a damage to the metal interconnect by the heat treatment is not caused.
US10134629B1
A method for manufacturing a semiconductor structure includes the following steps. At first, a titanium layer is formed on a preformed layer. Then, a first titanium nitride layer is formed on the titanium layer. A first plasma treatment is applied to the first titanium nitride layer such that the first titanium nitride layer has a first N/Ti ratio. A second titanium nitride layer is formed on the first titanium nitride layer. A second plasma treatment is applied to the second titanium nitride layer such that the second titanium nitride layer has a second N/Ti ratio larger than the first N/Ti ratio.
US10134628B2
A multilayer structure includes a first material layer, a second material layer, and a diffusion barrier layer. The second material layer is connected to the first material layer. The second material layer is spaced apart from the first material layer. The diffusion barrier layer is between the first material layer and the second material layer. The diffusion barrier layer may include a two-dimensional (2D) material. The 2D material may be a non-graphene-based material, such as a metal chalcogenide-based material having a 2D crystal structure. The first material layer may be a semiconductor or an insulator, and the second material layer may be a conductor. At least a part of the multilayer structure may constitute an interconnection for an electronic device.
US10134626B2
A semiconductor device is provided. The semiconductor device includes a doped isolation structure formed above a substrate, and the doped isolation structure includes a first doped portion and a second doped portion, and a doped concentration of the second doped portion is different from a doped concentration of the first doped portion. The semiconductor device also includes a first fin partially embedded in the doped isolation structure, and a sidewall surface of the first fin is in direct contact with the first doped portion. The semiconductor device includes a second fin partially embedded in the doped isolation structure, and the doped isolation structure is between the first fin and the second fin, and a sidewall surface of the second fin is in direct contact with the second doped portion.
US10134625B2
In accordance with various embodiments of the disclosed subject matter, a shallow trench isolation structure and a fabricating method thereof are provided. The method for forming the shallow trench isolation structure may include: providing a semiconductor substrate; forming a shallow trench in the semiconductor substrate; forming a first insulating layer on a surface of the semiconductor substrate and in the shallow trench, a portion of the first insulating layer in the shallow trench includes an opening; etching the first insulating layer to increase a width of the opening; after etching the first insulating layer, performing a plasma treatment to an exposed surface of the first insulating layer; after the plasma treatment, cleaning the surface of the first insulating layer; and after cleaning the surface of the first insulating layer, filling a second insulating layer into the shallow trench.
US10134615B2
Apparatus for processing a substrate are provided herein. In some embodiments, a substrate support includes a body having a support surface; an RF electrode disposed in the body proximate the support surface to receive RF current from an RF source; a shaft to support the body; a conductive element having an interior volume and extending through the shaft, wherein the conductive element is coupled to the RF electrode; and an RF gasket; wherein the conductive element includes features that engage the RF gasket to return the RF current to ground.
US10134611B2
A collector assembly for use with a spin chuck includes a base component, a top component and a first intermediate component configured to be fitted between the base component and the top component. The base, top and first intermediate components are configured so as to be interconnectable to form a process enclosure and so as to be separable from one another. The base component and the intermediate component each comprise collector wall segments such that when the base, top and first intermediate components are interfitted, the wall segments together define an outer side wall of the collector assembly.
US10134608B2
A switching device and a power semiconductor module are configured with a substrate, a power semiconductor component arranged thereupon and with a load connection device. The substrate incorporates mutually electrically-insulated printed conductors and wherein the load connection device, preferably for an AC potential, comprises at least two partial connection devices, having mutually corresponding contact surfaces and being interconnected in an force-fitted or materially-bonded manner and, on the contact surfaces, an electrically conductive manner, wherein a first partial connection device has a first contact device, which is force-fitted or materially-bonded to the printed conductor of the substrate, and wherein a second partial connection device has a second contact device for the further, preferably external, connection of a load connection device.
US10134603B2
In an embodiment, a method of planarizing a surface includes applying a first layer to a surface including a protruding region including at least one compound semiconductor and a stop layer on an upper surface such that the first layer covers the surface and the protruding region, removing a portion of the first layer above the protruding region and forming an indentation in the first layer above the protruding region, the protruding region remaining covered by material of the first layer, and progressively removing an outermost surface of the first layer to produce a planarized surface including the stop layer on the upper surface of the protruding region and an outer surface of the first layer.
US10134598B2
As a first grinding step, a peripheral portion of a back surface of a wafer (1) is ground with a first grindstone (17) to form a fractured layer (19) in the peripheral portion. Subsequently, as a second grinding step, a central portion of the back surface of the wafer (1) is ground with the first grindstone (17) to form a recess (21) while the peripheral portion in which the fractured layer (19) is formed is left as a rib (20). Subsequently, as a third grinding step, a bottom surface of the recess (21) is ground with a second grindstone (22) of an abrasive grain size smaller than that of the first grindstone (17) to reduce a thickness of the wafer (1).
US10134587B1
There is provided a method of manufacturing a semiconductor device, including: transferring a substrate to a module having a first process chamber and a second process chamber; reading a recipe program depending on a type and a number of the substrate; and processing the substrate according to the recipe program, wherein in the act of processing the substrate, a first data indicating a state of the first process chamber and a second data indicating a state of the second process chamber are respectively detected, and a comparison between the first data and a previously-acquired first reference data and a comparison between the second data and a previously-acquired second reference data are displayed on a display screen.
US10134581B2
Methods for forming a spacer comprising depositing a film on the top, bottom and sidewalls of a feature and treating the film to change a property of the film on the top and bottom of the feature. Selectively dry etching the film from the top and bottom of the feature relative to the film on the sidewalls of the feature using a high intensity plasma.
US10134570B2
Methods, systems, and computer programs are presented for reducing chamber instability while processing a semiconductor substrate. One method includes an operation for identifying a first recipe with steps having an operating frequency equal to the nominal frequency of a radiofrequency (RF) power supply. Each step is analyzed with the nominal frequency, and the analysis determines if any step produces instability at the nominal frequency. The operating frequency is adjusted, for one or more of the steps, when the instability in the one or more steps exceeds a threshold. The adjustment acts to find an approximate minimum level of instability. A second recipe is constructed after the adjustment, such that at least one of the steps includes a respective operating frequency different from the nominal frequency. The second recipe is used to etch the one or more layers disposed over the substrate in the semiconductor processing chamber.
US10134566B2
A method of making a nanostructure and nanostructured articles by depositing a layer to a major surface of a substrate by plasma chemical vapor deposition from a gaseous mixture while substantially simultaneously etching the surface with a reactive species. The method includes providing a substrate; mixing a first gaseous species capable of depositing a layer onto the substrate when formed into a plasma, with a second gaseous species capable of etching the substrate when formed into a plasma, thereby forming a gaseous mixture; forming the gaseous mixture into a plasma; and exposing a surface of the substrate to the plasma, wherein the surface is etched and a layer is deposited on at least a portion of the etched surface substantially simultaneously, thereby forming the nanostructure. The substrate can be a (co)polymeric material, an inorganic material, an alloy, a solid solution, or a combination thereof. The deposited layer can include the reaction product of plasma chemical vapor deposition using a reactant gas comprising a compound selected from the group consisting of organosilicon compounds, metal alkyl compounds, meal isopropoxide compounds, metal acetylacetonate compounds, metal halide compounds, and combinations thereof. Nanostructures of high aspect ratio and optionally with random dimensions in at least one dimension and preferably in three orthogonal dimensions can be prepared.
US10134564B2
Provided is a charged particle beam device including a charged particle optical column that irradiates a specimen with a primary charged particle beam, and a specimen base rotating unit that is capable of rotating the specimen base in a state of an angle formed by a surface of the specimen base and an optical axis of the primary charged particle beam being inclined to a non-perpendicular angle, in which the specimen base is configured to include a detecting element that detects a charged particle scattered or transmitted inside the specimen, and transmitted charged particle images of the specimen corresponding to each angle is acquired by irradiating the specimen in a state of the specimen base rotating unit being rotated at a plurality of different angles.
US10134562B2
A multi charged particle beam writing apparatus includes a modulation rate data calculation processing circuitry to calculate, for each pixel being a unit region, a modulation rate of a beam to a pixel concerned and each modulation rate of a beam to at least one pixel at a periphery of the pixel concerned, and a corrected-dose calculation processing circuitry to calculate, for the each pixel, a corrected dose by adding a multiplied value obtained by multiplying the modulation rate of the pixel concerned in a modulation rate map by beam dose to the pixel concerned, and a multiplied value obtained by multiplying the modulation rate of the pixel concerned which becomes one of the at least one pixel at the periphery with respect to another pixel defined for the position of the pixel concerned by a beam dose to the another pixel.
US10134554B2
A first support member and a second support member are provided in a rotation support device and a worm gear is rotated in a state that the second support member is inserted in the first support member, whereby the worm gear is prevented from being shaken through the first support member and the second support member and heat transmission to a housing due to rotation of the worm gear to damage the housing is prevented.
US10134549B2
A key that includes a body with an optically transmissive or light permeable region and an optical film coupled to or carried by the light permeable region is disclosed. The key also includes a resilient structure coupled to the body. The key can be assembled or coupled to, or disposed relative or adjacent to, a display screen. The key also includes a switch actuator (e.g., an electromechanical switch actuator or contact element). Displacement of the key, more specifically the body of the key, displaces the switch actuator for actuating a switch. The resilient structure is configured to bias the body at a first position. The body can be actuated or displaced from the first position to a second position for effectuating corresponding displacement of the switch actuator and actuation of the switch. The resilient structure provides a positive tactile feedback upon user-directed or user-controlled actuation or displacement of the body.
US10134543B2
A luminous keyboard includes plural keys and a backlight module under the plural keys. The backlight module includes a light-shading plate, a light guide plate and a reflecting plate, which are sequentially stacked on each other from top to bottom. The light-shading plate includes a first cutting hole and a first cutting hole periphery around the first cutting hole. The light guide plate includes a perforation. The reflecting plate includes a second cutting hole and a second cutting hole periphery around the second cutting hole. A top surface of the second cutting hole periphery is attached on a bottom surface of the first cutting hole periphery through the perforation. While an object is penetrated through the first cutting hole and the second cutting hole, the object is closely covered by the first cutting hole periphery and the second cutting hole periphery in response to an elastic restoring force.
US10134535B2
A dry transformer load switch, and transformer having such switch, has a hollow insulation cylinder extending longitudinally about a virtual center axis and has a plurality of connection contacts arranged along the inner circumference thereof, and a radially oriented main contact arranged in the interior of the hollow insulation cylinder so as to be rotatable about the center axis and which, with a corresponding rotary movement, can be optionally electrically connected by the radially outer end thereof to one of the connection contacts. In a hollow-cylindrical space about the center axis that is defined by the radially inner and outer end of the main contact, there is a barrier shield, which can be rotated together with the main contact about the axis.
US10134534B2
A connector is disclosed for connecting a first shaped element to a second shaped element. The first shaped element and the second shaped element each include a dovetail guide. In an embodiment, the connector is provided with contact areas. The contact areas are designed to engage into the respective dovetail guides to connect the first and second shaped elements.
US10134529B2
A composite electronic component includes an electronic element mounted on a resistance element in a height direction. The electronic element includes an electronic element body, and first and second external electrodes separated from each other in a length direction. The resistance element includes a base portion, a resistor disposed on an upper surface of the base portion, and first and second upper surface conductors on the upper surface of the base portion. The first and second upper surface conductors are separated from each other in the length direction, and the resistor is located between the first and second upper surface conductors. A dimension in the height direction of the resistor is smaller than both a dimension in the height direction of the first external electrode of a portion located on a lower surface of the electronic element body, and a dimension in the height direction of the second external electrode of a portion located on a lower surface of the electronic element body.
US10134528B2
An apparatus suitable for use in an air-conditioning system and configured to provide a plurality of selectable capacitance values includes a plurality of capacitive devices and a pressure interrupter cover assembly. Each of the capacitive devices has a first capacitor terminal and a second capacitor terminal. The pressure interrupter cover assembly includes a deformable cover, a set of section cover terminals, a common cover terminal, and a set of insulation structures. The first capacitor terminal of at least one of the capacitive devices is electrically connectable to one of the section cover terminals, and the second capacitor terminal of the at least one of the capacitive devices is electrically connectable to the common cover terminal.
US10134527B2
An electronic device includes a capacitor that is configured with a first electrode layer, an insulating layer, and a second electrode layer being formed in the order listed herein. At least one end of the capacitor is defined by an end of the second electrode layer. The insulating layer is provided so as to extend to a non-element region that is on the outside of one end of the capacitor. The insulating layer under the non-element region is formed thinner than the insulating layer under the capacitor. A difference between the thickness of the insulating layer under the non-element region and the thickness of the insulating layer under the capacitor is equal to or less than 50 nm.
US10134524B2
An electric power receiving device includes a ferrite, and a power receiving coil in which a hollow portion is formed. The power receiving coil is formed so as to surround a winding axis that extends in the thickness direction. When the power receiving coil and the ferrite are viewed from an observation position spaced apart from the power receiving coil in a direction in which the winding axis extends, notch portions are formed in an outer peripheral portion of the ferrite such that the notch portions overlap side portions of the coil. The width of each notch portion as measured in a circumferential direction of the power receiving coil increases in a direction away from the hollow portion of the power receiving coil.
US10134523B2
A coil component has a core part 10 composing a closed magnetic path through which a closed loop of a magnetic flux passes, the magnetic flux being generated by two coils 14A, 14B that are arranged in parallel, and generate a magnetic field, and the core part 10 has a pair of I-type base cores 11A, 11B facing each other, and a pair of coupling core parts 11C, 11D. The coupling core parts 11C, 11D are each formed by linearly aligning three unit coupling cores 12A to 12F, and each of these cores 12A to 12F is formed into a configuration in which a column-shaped projection is provided on a core body, and a two-stage gap including a small gap and a large gap is to be formed mutually in a space in the adjacent unit cores 11A, 11B, and 12A to 12F by the configuration.
US10134517B2
A mounting system for mounting an electronic display device, such as an electronic display device, to various surfaces including nonferrous and nonmagnetic surfaces is provided. In one implementation, the mounting system includes a surface-side attachment affixed to a surface, and a device-side attachment coupled to the electronic display device. The surface-side attachment and the device-side attachment include a plurality of magnets with at least one magnet with an outwardly-facing north pole and at least one magnet with an outwardly-facing south pole per attachment that self-aligns the attachments when mounting the electronic display device to the surface. The surface-side attachment and the device-side attachment may further include mechanical features and/or high friction faces to resist slipping and shear forces when the attachments are coupled together.
US10134515B2
A superconducting magnet device includes a vacuum container having a tubular barrel portion; a magnet assembly including a superconducting coil, a refrigerant tank, and a radiation shield, the magnet assembly being housed in the vacuum container; a supporting block fixed to the barrel portion and protruding beyond the barrel portion to the inside of the vacuum container; and a connecting portion which connects the magnet assembly and the supporting block to each other such that the magnet assembly is spaced apart from the barrel portion within the vacuum container. The connecting portion has thermal conductivity lower than thermal conductivity of the supporting member. The supporting member receives weight of the magnet assembly via the connecting portion while protruding inwardly beyond at least an outer circumference surface of the radiation shield of the magnet assembly.
US10134514B2
In a method for producing a grain-oriented electrical steel sheet by hot rolling a raw steel material containing C: 0.002˜0.10 mass %, Si: 2.0˜8.0 mass % and Mn: 0.005˜1.0 mass % to obtain a hot rolled sheet, subjecting the hot rolled sheet to a hot band annealing as required and further to one cold rolling or two or more cold rollings including an intermediate annealing therebetween to obtain a cold rolled sheet having a final sheet thickness, subjecting the cold rolled sheet to a primary recrystallization annealing combined with decarburization annealing, applying an annealing separator to the steel sheet surface and then subjecting to a final annealing, when rapid heating is performed at a rate of not less than 50° C./s in a range of 100˜700° C. in the heating process of the primary recrystallization annealing, the steel sheet is subjected to a holding treatment at any temperature of 250˜600° C. for 0.5˜10 seconds 2 to 6 times to thereby obtain a grain-oriented electrical steel sheet being low in the iron loss and small in the deviation of the iron loss value.
US10134513B2
Provided is a method for manufacturing a high silicon steel sheet having excellent producibility and magnetic properties. The method includes: casting a molten metal as a strip having a thickness of 5 mm or less, the molten metal comprising, by weight %, C: 0.05% or less (excluding 0%), N: 0.05% or less (excluding 0%), Si: 4% to 7%, Al: 0.5% to 3%, Si+Al: 4.5% to 8%, and the balance of Fe and inevitable impurities; hot-rolling the cast strip at a temperature of 800° C. or higher; annealing the hot-rolled strip at a temperature within a range of 900° C. to 1200° C.; cooling the annealed strip; warm-rolling the quenched strip at a temperature within a range of 300° C. to 700° C.; and finally annealing the warm-rolled strip at a temperature within a range of 800° C. to 1200° C.
US10134507B2
A cable (100) includes a plurality of wires (10) and a jacket (20) enclosing the wires. The wires includes a plurality of differential signal wires (11) for transmitting high speed signal, a detection signal wire (12), at least one auxiliary signal wire (13), and a plurality of lower speed signal wires (14). All of the differential signal wires, the detection signal wire and the at least one auxiliary signal wire are arranged at an outer peripheral of and enclosing the lower signal wires. Each two adjacent differential signal wire pairs are separated by one of the detection signal wire and the at least one auxiliary signal wire.
US10134505B2
A cable has at least one elongated electric conductor and a multilayer insulation surrounding the electric conductor. The multilayer insulation has a first semiconducting layer and an electrically insulating layer. The two layers are made from a silicone rubber based composition. A method for making this cable includes co-extruding the first semiconducting layer and the electrically insulating layer.
US10134499B2
A scintillation crystal can include a sodium halide that is co-doped with thallium and another element. In an embodiment, the scintillation crystal can include NaX:Tl, Me, wherein X represents a halogen, and Me represents a Group 1 element, a Group 2 element, a rare earth element, or any combination thereof. In a particular embodiment, the scintillation crystal has a property including, for radiation in a range of 300 nm to 700 nm, an emission maximum at a wavelength no greater than 430 nm; or an energy resolution less than 6.4% when measured at 662 keV, 22° C., and an integration time of 1 microsecond. In another embodiment, the co-dopant can be Sr or Ca. The scintillation crystal can have lower energy resolution, better proportionality, a shorter pulse decay time, or any combination thereof as compared to the sodium halide that is doped with only thallium.
US10134496B2
Methods and devices for directing a waste fluid from a radiopharmaceutical synthesis system to a waste vessel are provided. In one example, the method includes serially connecting a primary waste vessel to a secondary waste vessel with a fluid conduit, including a waste valve connected to the fluid conduit extending between the primary waste vessel and secondary waste vessel; opening the waste valve so as to allow fluid communication between cavities of the primary and secondary waste vessels; drawing a low pressure in both waste vessels; closing the waste valve so as to fluidically isolate the secondary waste vessel from the primary waste vessel, discharging the waste fluid through a pump valve into the primary waste vessel, and opening the waste valve to evacuate the waste fluid from the primary waste vessel into the secondary waste vessel.
US10134490B2
A graphical user interface is provided displaying a first viewing window selected from a set of possible viewing windows conveying respective feature measurements related to labor progression. At least one viewing window in the set of possible viewing windows conveys a given feature measurement and a safety limit associated to the given feature measurement. The graphical user interface also displays at least one control allowing a user to select a subset of viewing windows from the set of possible viewing windows, the subset of viewing windows including at least one viewing window other than the first viewing window. The selected subset of viewing windows is displayed simultaneously with the first viewing window. In response to the given feature measurement exceeding the associated safety limit, information is displayed to attract the attention of the user to the viewing window conveying the given feature measurement.
US10134482B2
Apparatuses and methods are provided for a high speed writing test mode for memories. An example apparatus includes a memory core, a data terminal coupled to a data receiver, a read buffer coupled between the data terminal and the memory core, and a write buffer coupled between the data receiver and the memory core. The write buffer may include at least a first input coupled to the data receiver, and a second input. While in a test mode, the write buffer may be loaded with data from the second input instead of the first input.
US10134481B2
Methods of operating a memory include storing a first target data state of multiple possible data states of a first memory cell to be programmed in a target data latch coupled to a data node, storing at least one bit of a second target data state of the multiple possible data states of a second memory cell to be programmed in an aggressor data latch coupled to the data node, and programming the first memory cell and performing a program verify operation for the first target data state to determine if the first memory cell is verified for the first target data state. The program verify operation including: an intermediate verify corresponding to an amount of aggression to apply a voltage to the data node when performing the intermediate verify, based on the at least one bit of the second target state stored in the aggressor data latch; and a program verify corresponding to a condition of no aggression to apply to the voltage to the data node when performing the program verify, based on the at least one bit of the second target state stored in the aggressor data latch. The methods including inhibiting the first memory cell from further programming if the first memory cell is verified during the intermediate verify and the at least one bit in the aggressor data latch corresponds to the particular amount of aggression, or the first memory cell is verified during the program verify and the at least one bit in the aggressor data latch corresponds to the condition of no aggression. The second memory cell is a neighbor of the first memory cell.
US10134470B2
Disclosed herein is a memory cell. The memory cell may act both as a combined selector device and memory element. The memory cell may be programmed by applying write pulses having different polarities. Different polarities of the write pulses may program different logic states into the memory cell. The memory cell may be read by read pulses all having the same polarity. The logic state of the memory cell may be detected by observing different threshold voltages when the read pulses are applied. The different threshold voltages may be responsive to the different polarities of the write pulses.
US10134465B2
A semiconductor memory device may include a sense amplifier for sensing and amplifying data of a bit line pair with pull-up and pull-down driving voltages; a voltage supplier for supplying a power supply voltage or an internal voltage lower than the power supply voltage as the pull-up driving voltage through a pull-up power supply line in response to a first or second pull-up control signal, and supplying a ground voltage as the pull-down driving voltage through a pull-down power supply line in response to a pull-down control signal; a voltage detector for detecting a voltage level of the power supply voltage and outputting a detection signal; and a control signal generator for generating the first and second pull-up control signals, and the pull-down control signal and delaying an enabling timing of one of the first pull-up and pull-down control signals in response to the detection signal.
US10134462B2
A semiconductor integrated circuit is described. A. transmitter-receiver transmits and receives data to and from outside by a first external terminal and transmits a first control signal by a second external terminal. When another data is transmitted after the data is transmitted and when a data transmission interval from a time when the data is transmitted to a time when the another data is transmitted is equal to or smaller than a first threshold, the transmitter-receiver continuously outputs, from the first external terminal, a potential level of about ½ of a potential level obtained by adding a first potential level and a second potential level, during the data transmission interval, and changes the second potential level of the first control signal to the first potential level when the data transmission interval exceeds the first threshold.
US10134459B2
Memory cells and methods for forming a memory cell are disclosed. The memory cell includes a first selector having a first gate coupled to a first word line (WL) and first and second source/drain (S/D) regions, and a second selector having a second gate coupled to a second WL and first and second S/D regions. The second S/D regions of the first and the second selectors are a common S/D region. The first and the second WLs are a common WL and the second S/D regions of the first and second selectors are coupled to a source line (SL). The memory cell includes a storage element which includes a magnetic tunnel junction (MTJ) element coupled with a bit line (BL) and the first and the second selectors, and a voltage control switch which includes a metal-insulator-transition (MIT) material coupled with the first selector.
US10134453B2
The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an array of memory cells and sensing circuitry coupled to the array. The sensing circuitry includes a plurality of sensing components coupled to a controller. The controller is configured to selectively activate a first control line and a second control line to invert signals stored on a latch.
US10134450B2
A semiconductor memory device includes a peripheral circuit including first and second circuit blocks that are respectively disposed in second and third regions adjacent to each other in a first direction with a first region interposed therebetween, first power lines disposed in a first metal layer and connected to the first unit circuit block, second power lines disposed in the first metal layer and connected to the second unit circuit block, and bridge power lines disposed in a second metal layer in the first region and extending in a second direction intersecting with the first direction. The first power lines extend from the second region to the first region and are meshed with the bridge power lines. The second power lines extend from the third region to the first region and are meshed the bridge power lines.
US10134448B2
A data storage device involves inner surfaces of sidewalls of a second cover overlapping with and adhesively bonded with the outer surfaces of sidewalls of an enclosure base having an uppermost top surface, where the second cover or an underlying first cover are removably adhered to the uppermost top surface of the base. The removable adhesive bond may comprise a pressure-sensitive adhesive, which can provide for reworkability during the manufacturing and testing process. The second cover-to-base sidewall bond may form a hermetic seal between the second cover and the base. Hence, a thinner base sidewall adjacent to the recording disks is enabled, leaving more space available for larger-diameter recording disks within a standard form factor, hermetically-sealed storage device, which may be filled with a lighter-than-air gas.
US10134445B2
An extraction device includes a processor that executes a procedure. The procedure includes: extracting a point as an end of the turn at bat from footage of a baseball game in which a point representing a start of a turn at bat has been associated with information indicating respective specified outcomes of the turn at bat, the extracted point being subsequent to a cut including a final pitch scene in the turn at bat and being prior to which cuts have transitioned a number of times, the number of times being determined according to an outcome of the turn at bat.
US10134444B2
To allow a better coordination between an image creation artist such as a movie director of photography and the final viewer, via a receiving-side display and its built-in image processing, a method of adding image defining information to an input image signal (I) comprises showing the input image (I) to a human operator; receiving via a user interface (303, 308) descriptive data (D) from the human operator, the descriptive data (D) including at least luminance value information on the one hand, and a regime descriptor (rd) on the other hand; and encoding into an output description data signal (DDO), relatable to an output image signal (O) based upon the input image signal (I), of the descriptive data (D) in a technical format standardized to be intended for use by a receiving-side display to control its image processing for changing the color properties of its rendered images.
US10134436B2
A method of forming a near field transducer (NFT) layer, the method including depositing a film of a primary element, the film having a film thickness and a film expanse; and implanting at least one secondary element into the primary element, wherein the NFT layer includes the film of the primary element doped with the at least one secondary element.
US10134432B2
A flexure chain blank sheet includes a plurality of frame units. Each of the frame units includes a frame portion, and a plurality of flexure elements arranged within the frame portion. The frame portion includes lengthwise frames extending in a longitudinal direction of the flexure elements, and lateral frames extending in a width direction of the flexure elements. A slit that extends along the lateral frames, a connection portion, and recesses are formed between adjacent frame units. An opening width of the recesses is greater than an opening width of the slit. The connection portion includes a portion-to-be-cut which is to be cut by a cutter. The recesses allow insertion of the cutter.
US10134417B2
The disclosure provides a method and an apparatus for detecting a voice activity in an input audio signal composed of frames. A noise characteristic of the input signal is determined based on a received frame of the input audio signal. A voice activity detection (VAD) parameter is derived based on the noise characteristic of the input audio signal using an adaptive function. The derived VAD parameter is compared with a threshold value to provide a voice activity detection decision. The input audio signal is processed according to the voice activity detection decision.
US10134415B1
Method and apparatus are disclosed for determining and accounting for distortions to an audio signal due to the geometric properties of the interior cabin of a vehicle. An example vehicle includes a microphone, a seat having a plurality of seat positions, and a processor. The processor is configured to determine a first seat position corresponding to a point in time at which an audio signal is received, determine a cabin impulse response corresponding to the first seat position, and determine a filtered audio signal based on the cabin impulse response and the audio signal.
US10134414B1
A videoconference apparatus at a first location detects audio from a location and determines whether the sound should be included in an audio-video stream sent to a second location, or excluded as an interfering noise. Determining whether to include the audio involves using a face detector to see if there is a face at the source of the sound. If a face is present, the audio data from the location will be transmitted to the second location. If a face is not present, additional motion checks are performed to determine whether the sound corresponds to a person talking, (such as a presenter at a meeting), or whether the sound is instead unwanted noise.
US10134408B2
Methods and apparatus to audio watermarking and watermark detection and extracted are described herein. According to an example method, an identifier is encoded in media content when a different identifier has been previously encoded. According to another example method, messages decoded from media content are validated to provide improved decoding accuracy. In another example method, decoded symbols are stored in memory and synchronization symbols are located to detect a message encoded in media content.
US10134402B2
The present disclosure provide a signal processing method and apparatus. The method includes: determining a total quantity of to-be-allocated bits corresponding to a current frame; implementing primary bit allocation on to-be-processed sub-bands; performing a primary information unit quantity determining operation for each sub-band that has undergone the primary bit allocation; selecting sub-bands for secondary bit allocation from the to-be-processed sub-bands according to at least one of a sub-band characteristic of each sub-band of the to-be-processed sub-bands or the total quantity of surplus bits; implementing secondary bit allocation on the sub-bands for secondary bit allocation; and performing a secondary information unit quantity determining operation for each sub-band of the sub-bands for secondary bit allocation.
US10134398B2
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for hotword detection on multiple devices are disclosed. In one aspect, a method includes the actions of receiving, by a first computing device, audio data that corresponds to an utterance. The actions further include determining a first value corresponding to a likelihood that the utterance includes a hotword. The actions further include receiving a second value corresponding to a likelihood that the utterance includes the hotword, the second value being determined by a second computing device. The actions further include comparing the first value and the second value. The actions further include based on comparing the first value to the second value, initiating speech recognition processing on the audio data.
US10134396B2
In some implementations, a method is performed by computing devices, and includes receiving a first message indicating that an improper voice command has been detected by a first device, identifying a user account associated with the first device based on the first message, identifying a second device associated with the user account, and, in response to receiving the first message indicating that the voice command detected by the first device is improper, sending a second message to the second device, the second message indicating that the voice command should not be performed.
US10134388B1
An automatic speech recognition (ASR) system may add new words to an ASR system by identifying words with similar usage and replicating the variations of the identified words to create new words. A new word that is used similarly to a known word may be varied to create new word forms that are similar to the word forms of a known word. The new word forms may then be incorporated into an ASR model to allow the ASR system to recognize those words when they are detected in speech. Such a system may allow flexible incorporation and recognition of varied forms of new words entering a general lexicon.
US10134386B2
Systems and methods for identifying content corresponding to a language are provided. Language spoken by a first user based on verbal input received from the first user is automatically determined with voice recognition circuitry. A database of content sources is cross-referenced to identify a content source associated with a language field value that corresponds to the determined language spoken by the first user. The language field in the database identifies the language that the associated content source transmits content to a plurality of users. A representation of the identified content source is generated for display to the first user.
US10134382B2
A vehicle sound effect generation apparatus includes a running state detecting unit that detects a running state of a vehicle, an adjustment wave sound selector that selects one or more adjustment wave sounds having a half-order frequency component or an integer-order frequency component, a sound effect generation unit that synthesizes a fundamental wave sound having a fundamental frequency component with the one or more adjustment wave sounds selected by the adjustment wave sound selector, and an inhibition condition determining unit that can determine a condition that correspondence between an amount of an operation performed by a vehicle occupant and a behavior of the vehicle is inhibited. When the inhibition condition determining unit determines the condition that the correspondence between the amount of the operation and the behavior of the vehicle is inhibited, the adjustment wave sound selector reduces the output characteristics of the adjustment wave sounds selected.
US10134372B2
Systems for raising pads on musical instruments to enable drying of pads and increase air flow around the pad and a body of the musical instrument. A vent spanner device, including a positioning feature and a retention feature, is placed between a pad and its corresponding vent to create an air gap. A pad prop is placed against a key mechanism or between the key mechanism and/or the body to raise a pad from sealing its corresponding vent. A linkage feature connects one or more vent spanners, pad props, end pieces, key mechanisms, or the body, and provides storage.
US10134367B2
In one embodiment, dividing a set of texts into one or more text blocks, each text block including a portion of the set of texts; rendering each text block to obtain one or more rendered text blocks; determining a placement instruction for each rendered text block, the placement instruction indicating a position of the rendered text block when it is displayed; and sending the one or more rendered text blocks and their respectively associated placement instructions to an electronic device for displaying on the electronic device.
US10134352B2
A gate driving circuit includes: a pull-up controller applying a carry signal of one of previous stages to a first node in response to the carry signal of the one of the previous stages; a pull-up part outputting a clock signal as an N-th gate output signal; a carry part outputting the clock signal as an N-th carry signal; a first pull-down part pulling down the signal at the first node to a second off voltage; a second pull-down part pulling down the N-th gate output signal to a first off voltage; an inverting part generating an inverting signal based on the clock signal and the second off voltage to output the inverting signal to an inverting node; and a reset part outputting a reset signal to the inverting node.
US10134347B2
A display driver includes a driving voltage generation part that generates a voltage as a pixel driving voltage by inverting a polarity of a voltage representing a luminance level of each pixel based on a video signal according to a polarity inversion signal received via a transmission line, the polarity inversion signal alternately indicating either one of positive and negative polarities, and a polarity inversion abnormality detection part that generates an abnormality detection signal indicating an abnormality of the transmission line when the polarity inversion signal indicates only one constant polarity for a period of N frames (N is an integer greater than or equal to 2) of the video signal.
US10134342B2
A system may produce images including narrow-bandwidth colors. One or more sets of the narrow-bandwidth colors may be selected to be interpreted as substantially a same color by a user. The system may include a light source configured to produce the narrow-bandwidth colors, and/or narrow-passband filters may create narrow-bandwidth colors from light emitted by broad-spectrum light sources or color sources. Spatial and/or time multiplexing may be used to create separate narrow-bandwidth colors interpreted as substantially a same color by the user. The light source and/or the narrow-passband filter elements may be adjustable and may alternate between emission of two or more narrow-bandwidth colors. A viewing device may include filters configured to selectively filter the narrow-bandwidth colors. The user may filter the narrow-bandwidth colors to separate a stereoscopic image pair, to view an image specific to a user, to view desired content obfuscated by an obfuscating image, and/or the like.
US10134341B2
A display device includes: a pixel unit including pixels, each including an OLED; a scan driver configured to supply scan signals to scan lines connected to the pixels; a data driver configured to supply data signals to data lines connected to the pixels; a control line driver configured to supply control signals to control lines connected to the pixels; a sensing unit configured to receive sensing voltages from the data lines during a sensing period; a switching unit configured to selectively connect the data lines to the data driver and to the sensing unit, and to perform current sensing of the OLEDs of the pixels to which the control signals are supplied from among the plurality of pixels; and a timing controller configured to control the control line driver to supply the control signals to one or more of the control lines according to externally input first data.
US10134337B2
Provided are a display device and a method of controlling a power integrated circuit (PIC) thereof. The display device in one embodiment includes a controller for generating a switch pulse signal synchronized with an input image and initializing the switch pulse signal during a frame blank period in which the input image is not present; and a power integrated circuit (PIC) driven according to the switch pulse signal to generate power of a display panel. A duty ratio of the switch pulse signal is aligned to be greater than 0 and equal to or less than 3% during an alignment period set within a frame blank period, compared with a normal period. Thus, a change in the duty ratio of the switch pulse signal within the frame blank period is controlled to be minimized to prevent a degradation of image quality due to the variation of power.
US10134329B2
The invention provides an AMOLED pixel driver circuit and pixel driving method, by using a pixel driver circuit of 5T1C structure to effectively compensate threshold voltage of driving TFT in each pixel through a source-following approach to compensate the threshold voltage of the driving TFT so that the current flowing through the OLED is independent of the threshold voltage of the first TFT, the threshold voltage of the OLED and the negative voltage of the power source to ensure even light-emission result of OLED and improve display result.
US10134323B2
An image whose visibility has been more suitably improved is obtained. The device includes an image input unit which inputs an image, an image processing unit which performs Retinex processing with respect to the input image input by the image input unit and performs image signal generation to generate a new image signal based on information concerning a color of the input image and information of an absolute value or Y-value of a color space vector of the image signal having undergone the Retinex processing, and a display unit which displays an image based on the image signal having undergone image processing by the image processing unit.
US10134296B2
One embodiment of the invention disclosed herein provides techniques for controlling a movement training environment. A movement training system retrieves a movement object from a set of movement objects. The movement training system attains first motion capture data associated with a first user performing a movement based on the movement object. The movement training system generates a first articulable representation based on the first motion capture data. The movement training system compares at least one first joint position related to the first articulable representation with at least one second joint position related to a second articulable representation associated with the movement object. The movement training system calculates a first similarity score based on a difference between the at least one first joint position and the at least one second joint position.
US10134290B2
A system for providing drone piggybacking on vehicles is disclosed. In particular, the system may enable drones or other unmanned mobile connected devices to piggyback onto various types of hosts, such as vehicles, in a symbiotic fashion. Through the symbiotic relationship created between the drones and hosts, the drones may utilize the hosts as a means for transport, such as while delivering a good to an intended destination, and the hosts may receive certain incentives in exchange for transporting the drones. Drones may be paired with hosts based on any number of factors, such as whether the host is traveling on a route that corresponds with reaching the intended destination, whether the host is capable of recharging the drone, and whether the drone has sufficient power to reach the intended destination. By enabling drones to piggyback with hosts, the required traveling range for a drone may be reduced.
US10134286B1
A system and method of enabling a user to select a location for vehicle pickup, wherein the method is carried out by a handheld mobile device, and wherein the method includes: obtaining vehicle reservation information pertaining to a vehicle reservation, wherein the vehicle reservation information includes a reservation start location; displaying a camera feed on a visual display of the mobile device, wherein the camera feed is video data that is obtained by a camera included on the mobile device; receiving a vehicle pickup selection from a user, wherein the vehicle pickup selection is generated by a user selecting an area for pickup that is within a field of view of the camera; and sending a vehicle pickup selection message to the remote server, wherein the vehicle pickup selection message includes the vehicle pickup selection.
US10134285B1
A system and method for integrating a vehicular camera system is disclosed. A threshold value for metadata of one or more sensor devices and the vehicular camera system positioned in a first carrier vehicle is determined. Captured metadata is processed to determine whether the threshold value is exceeded, and a plurality of images is captured by one or more cameras of the vehicular camera system for a predetermined period, in response to exceeding the threshold value for metadata of the one or more sensor devices. The plurality of metadata is linked with each image from the plurality of captured images by matching the collection time of the metadata with the collection time for each image from the plurality of captured images, and a first image selected from the plurality of captured images is communicated along with the metadata linked to the first image, to at least one electronic device.
US10134281B2
Route information indicating a preset route is acquired. Host vehicle position information indicating the position of a host vehicle is acquired. It is detected whether a direction indicator providing advance notice of a traveling direction of the host vehicle is on or off. If the position of the host vehicle agrees with a position on the route, the position of the host vehicle approaches a position to turn on the route, and it is detected that the direction indicator is off, a warning operation pertaining to a warning directed at another vehicle traveling in the vicinity of the host vehicle is performed.
US10134276B1
A method, system, and computer readable program product are disclosed for traffic intersection distance signaling. In an embodiment, the method comprises determining a distance between a first vehicle and a traffic intersection, said first vehicle being on a first side of the intersection; using this determined distance to determine if a pre-defined distance is available between the first vehicle and the intersection; and when this pre-defined distance is available between the first vehicle and the intersection, signaling to a second vehicle, on a second side of the intersection, that space is available for the second vehicle on the first side of the intersection. In embodiments of the invention, the method further comprises measuring a specified length of the second vehicle, and the pre-defined distance is based on this measured specified length. In an embodiment, the predefined distance is equal to or greater than this measured specified length.
US10134275B2
Apparatuses, methods and systems for monitoring vehicle parking occupancy are disclosed. One method includes intermittently receiving, by a wireless node, a wireless signal from a vehicle sensing device, wherein the vehicle sensing device transmits the wireless signal upon sensing a change in vehicle occupancy of an associated parking location, wherein the wireless signal includes a vehicle sensing indicator, wherein the vehicle sensing indicator indicates whether the vehicle sensing device senses vehicle occupancy of the associated parking location, measuring a signal quality of the intermittently received wireless signal over time, correlating the measured signal quality of the intermittently received wireless signal over time with the vehicle occupancy indictor, and identifying errors in the vehicle sensing indicator based on the correlating of the measured signal quality of the intermittently received wireless signal over time with the vehicle occupancy indictor.
US10134258B2
Improvements in an abandoned baby, infant, child or animal alter system is disclosed. When a child or animal is being transported with a driver in the vehicle, the driver will generally maintain a comfortable temperature in the interior of the vehicle. The temperature and temperature changes are monitored to determine that a child or animal is unattended. The monitor is coupled with a connection in the car, a seat belt of a baby seat or integrated into the baby seat. Integrating the sensor with a seat belt or buckle provides a switch for operation of the sensor. The signaling system can be integrated with the light, horn or alarm or can be connected to a cellular network, Wi-Fi or other radio communications system to send a notification that a baby, infant, child or animal has been left and secured in a vehicle and needs attention.
US10134252B1
Systems and methods for making a marker. The methods comprise: obtaining a marker housing having first and second cavities formed therein; disposing a first resonator in the first cavity and a second resonator in a second cavity; and placing a bias element at a location on or in the marker so that the first and second resonators are (a) equally spaced apart from the same bias element and (b) biased by the same bias element when the marker is in use to oscillate at a frequency of a received transmit burst.
US10134251B2
A merchandise security device configured for use with an electronic key for locking and/or unlocking a lock mechanism is provided. The merchandise security device may include a housing operably coupled with a cable, wherein the cable is configured to be extended and retracted relative to the housing and to at least partially surround an item of merchandise. The security device may also include a lock mechanism configured to releasably secure the cable relative to the housing for locking the cable about the item of merchandise. In addition, the lock mechanism is configured to receive electrical power for unlocking the lock mechanism so that the housing and the cable may be removed from the item of merchandise.
US10134246B2
An optical signaling device, in particular a signal pillar (1) of modular construction or similar with at least one first exchangeable light module (3) comprising at least one light element (10) is proposed for optical indication of one or more different operating states of a technical device (2) such as a machine, a plant, a vehicle or similar, wherein the first light module (3) comprises at least one first circuit board (11) oriented essentially in direction of a longitudinal axis (8) of the signaling device with the at least one first light element (10) and electrical components, wherein at least one contact (32) is provided between at least one first detachably contactable electrical contact surface (19) and a second electrical contact surface (18) of an adjacently arranged module (3, 4, 5, 6, 7) configured as a second light module (3) and/or as a holding module (5) and/or as a base module (6) for holding and connecting the signaling device at an operating position, wherein the adjacently arranged module (3, 4, 5, 6, 7) comprises at least one second circuit board (11) oriented essentially in direction of the longitudinal axis (8), which meets stringent requirements as regards the contacting between two adjacent modules and at the same time the constructional expenditure and/or realizes an improved energy/power supply of the modules. According to the invention this is achieved in that at least the two electrical contact surfaces (18, 19) of the contact (32), which can be detachably contacted with each other, are arranged between the first circuit board (11) and the second circuit board (11) in direction of the longitudinal axis (8).
US10134230B2
The present application provides a game playing information integration system which is capable of objectively performing selection and/or settings according to preference of a player, particularly fixed customers, and thereby capable of effectively introducing a gaming machine to invoke demands of players as users and managers of gaming facilities in a well-balanced manner from a result obtained by logically analyzing the gaming machine. (a) Game playing period at one time of each player in gaming machine unit, (b) change in balance over time of player in a game playing period, (c) operation time of the gaming machine unit, and (d) data relating to profit of a shop side by the gaming machine are generated, the degree of satisfaction of player is computed based on (a) and (b), and the degree of satisfaction of a shop side is computed based on (c) and (d).
US10134225B2
A wagering game system and its operations are described herein. In some embodiments, the operations can include establishing a connection with an input device, from a plurality of input devices configured for user input, for use in a wagering game during a wagering game session. The operations can further include receiving input data from the input device, wherein the input data has a first format specific to the input device, and wherein the wagering game requires the input data in a second format different from the first format. The operations can further include converting the input data from the first format to the second format required by the wagering game, and providing the input data to the wagering game in the second format for use as the user input for the wagering game.
US10134219B2
An automated prescription dispensing system and method for facilitating dispensing of medications from an automated prescription dispenser designed for in-home use. The dispenser may connect to a remote patient monitoring center for monitoring of the patient's dispenser use and adherence to a medication regime. The dispenser may further connect to a remote medication operations center for monitoring replenishment of the patient's medications and to a remote medical center for monitoring the patient's reaction to medications and clinical signs. A connection to a data analytics center and analytical engine facilitates communications among and between the users and/or caregivers at the remote centers. The dispenser may be loaded with a standardized cartridge that is replenished according to the patient's needs. The dispenser is further equipped with a camera that allows a caregiver at the remote patient monitoring center to view the patient while the patient uses the dispenser.
US10134214B2
A method for identifying counterfeit coins, comprising receiving surface image data and edge image data of the coin at a processor. Identifying a plurality of defects using the processor. Comparing each of the plurality of defects to a database of known authentic coin image data defects to determine whether the coin is authentic.
US10134209B2
A system for managing the unlocking of a device for identifying a commercial item includes at least two elements capable of assuming a locked position in which they enclose the article between them, and an unlocked position. The system includes a device for unlocking the identification device, elements for preventing unlocking, which are activated, and decision elements for deciding whether to deactivate or not deactivate the elements for preventing unlocking. The decision elements are capable of deciding on the basis of the identification or lack of identification of the association of the identification device and the commercial item to which the device is attached.
US10134207B2
A first message from a remote terminal unit (RTU) is received, where the first message indicates that a motion has been detected. In response to receiving the first message, a timer is started at a supervisory control and data acquisition (SCADA) server. Whether a personal identification number (PIN) verification and a radio-frequency identification (RFID) verification have succeeded is determined before the timer expires. In response to determining that at least one of the PIN verification or the RFID verification fails, a communication port connecting the RTU with the SCADA server is disabled.
US10134206B2
A system includes a smart-phone processor configured to receive a video recording feed from a camera. The processor is also configured to receive a vehicle data feed from a vehicle connected to the processor. The processor is further configured to convert the vehicle data feed into images. The processor is additionally configured to add the images to the video recording feed in real-time and save a combined feed including the video and images resulting from the adding.
US10134201B2
A parking meter includes a housing, processor, memory, network interface, display screen, first camera facing outward from the first side of the housing, second camera facing outward from the housing towards a parking space, and a payment acceptor. The meter is configured to sense a vehicle's presence in the parking space, capture an identification of the vehicle, transmit the identification to a remote networked computer system, determine that a parking violation has occurred, transmit the notice to the remote computer system, accept payment of fines, transmit notice of fine payment to the remote computer system, reset the parking time period to zero upon the vehicle's exit from the parking space, and receive updated parking rate parameters by the processor from the remote computer system via the network interface.
US10134193B2
Disclosed is a smart mirror system for hairstyling using virtual reality, the smart mirror system including: a mirror display provided with a camera and an angle adjusting means, the mirror display being provided on a wall of a hair salon; a chair rotatably provided in front of the mirror display; and a smart device for being mirrored with the mirror display, such that a user uses the mirror display by manipulating the smart device, wherein the smart device is configured to allow hairstyles that match sex and an age group provided by using an app or a server or hairstyles of celebrities provided by Internet search to be displayed on the mirror display by mirroring; and when one of the hairstyles is selected, a selected hairstyle is applied to an image of the user displayed on the mirror display, thereby being three-dimensionally displayed in response to a user's movement.
US10134185B2
An endoscopic system according to an embodiment of the present technology includes a head-mounted display, a detector, and a controller. The head-mounted display is worn by an operator. The detector is capable of detecting a motion of the operator. The controller causes each of the plurality of head-mounted displays to individually display an image. The controller includes an endoscopic image acquisition unit capable of obtaining endoscopic image data of an affected area of a patient and an image control unit capable of controlling the endoscopic image data based on an output from each of the plurality of detectors. The controller performs control to display the image based on an output from the image control unit.
US10134184B2
A method to render an object including a path includes: determining a split line to split a frame; allocating information about the path to a first tile through which the path passes and to a second tile located between the first tile and the split line, among tiles included in the frame; and determining respective winding numbers for the first tile and the second tile, based on information about the allocated path.
US10134174B2
A virtual-reality computing device comprises a pose sensor, a rendering tool, and a display. The pose sensor is configured to measure a current pose of the virtual-reality computing device in a physical space. The rendering tool is configured to receive a holographic animation of a 3D model that includes a sequence of holographic image frames. The rendering tool is also configured to receive a render-baked dynamic lighting animation that includes a sequence of lighting image frames corresponding to the sequence of holographic image frames. The rendering tool also is configured to derive a 2D view of the 3D model with a virtual perspective based on the current pose and texture map a corresponding lighting image frame to the 2D view of the 3D model to generate a rendered image frame of the 2D view with texture-mapped lighting. The display is configured to visually present the rendered image frame.
US10134163B2
A method, apparatus, and system provide the ability to detect an object framework in an image. A frame (of an image) is obtained. The image is pre-processed to smooth the image. Edges in the image are detected and an edge map is generated. Straight lines are detected from the detected edges in the edge map. One or more quadrangles are assembled from the detected straight lines. The quadrangles are sorted. One of the one or more quadrangles are selected based on the sorting. A selected quadrangle is returned to the user.
US10134156B2
In a method and an evaluation device for the evaluation of projection data of an object being examined, which are determined along a trajectory in a multiplicity of projection positions relative to a co-ordinate origin, a particular trajectory function is determined for the projection positions, for each of a multiplicity of positions from a reconstruction region of dimension n by establishing an offset (d) and a direction vector at the co-ordinate origin, establishing a hyperplane of dimension n−1 which runs perpendicular to the direction vector and has an offset to the co-ordinate origin, establishing a number of intersection points where the hyperplane intersects the trajectory, establishing a derivative vector of the trajectory according to its trajectory path and calculating the derivative vector in the projection position, and establishing an absolute value of a scalar product between the derivative vector and the position and dividing the absolute value by the number. The determined trajectory functions are transformed to a frequency domain of dimension n and the projection data are evaluated by means of the transformed trajectory functions.
US10134155B2
Embodiments of the present disclosure are directed to a system for generating three-dimensional images of a target region of a patient. The system may include at least one computer system. The computer system may be configured to receive a plurality of non-parallel projection images of the target region of the patient, convert the plurality of non-parallel projection images into a non-spatial domain, reconstruct a three-dimensional image from the plurality of non-parallel projection images in the non-spatial domain, and convert the reconstructed three-dimensional image from the non-spatial domain to the spatial domain.
US10134147B2
In one embodiment, the disclosure relates to a method for inspecting a load (101) in a container (100), comprising: classifying (S2) one or more patches (11) of a digitized inspection image (10), the digitized inspection image (10) being generated by an inspection system (1) configured to inspect the container (100) by transmission of inspection radiation (3) from an inspection radiation source (31) to an inspection radiation detector (32) through the container (100), wherein the classifying (S2) comprises: extracting (S21) one or more texture descriptors (V, P) of a patch (11), and classifying (S22) the patch (11), by comparing the one or more extracted texture descriptors (V, P) of the patch (11) to respective one or more reference texture descriptors (Vr, Wr, Pr) corresponding to respective one or more classes (202) of reference items (201), the one or more reference texture descriptors (Vr, Wr, Pr) of each class of reference items (201) being extracted from one or more reference images (20) of the one or more reference items (201).
US10134141B2
The present disclosure relates to systems, methods, devices, and non-transitory computer-readable storage medium for segmenting three-dimensional images. In one implementation, a computer-implemented method for segmenting a three-dimensional image is provided. The method may include receiving the three-dimensional image acquired by an imaging device, and creating a first stack of two-dimensional images from a first plane of the three-dimensional image and a second stack of two-dimensional images from a second plane of the three-dimensional image. The method may further include segmenting, by a processor, the first stack and the second stack of two-dimensional images using at least one neural network model. The method may also include determining, by the processor, a label map for the three-dimensional image by aggregating the segmentation results from the first stack and second stack.
US10134133B2
The present disclosure relates to calibration assemblies and methods for use with an imaging system, such as an endoscopic imaging system. A calibration assembly includes: an interface for constraining engagement with an endoscopic imaging system; a target coupled with the interface so as to be within the field of view of the imaging system, the target including multiple of markers having calibration features that include identification features; and a processor configured to identify from first and second images obtained at first and second relative spatial arrangements between the imaging system and the target, respectively, at least some of the markers from the identification features, and using the identified markers and calibration feature positions within the images to generate calibration data.
US10134131B1
The disclosure relates to phenotype analysis of cellular image data using a machine-learned, deep metric network model. An example method includes receiving, by a computing device, a target image of a target biological cell having a target phenotype. Further, the method includes obtaining, by the computing device, semantic embeddings associated with the target image and each of a plurality of candidate images of candidate biological cells each having a respective candidate phenotype. The semantic embeddings are generated using a machine-learned, deep metric network model. In addition, the method includes determining, by the computing device, a similarity score for each candidate image. Determining the similarity score for a respective candidate image includes computing a vector distance between the respective candidate image and the target image. The similarity score for each candidate image represents a degree of similarity between the target phenotype and the respective candidate phenotype.
US10134125B2
Techniques for processing ultrasound data. The techniques include using at least one computer hardware processor to perform obtaining ultrasound data generated based, at least in part, on one or more ultrasound signals from an imaged region of a subject; calculating shadow intensity data corresponding to the ultrasound data; generating, based at least in part on the shadow intensity data and at least one bone separation parameter, an indication of bone presence in the imaged region, generating, based at least in part on the shadow intensity data and at least one tissue separation parameter different from the at least one bone separation parameter, an indication of tissue presence in the imaged region; and generating an ultrasound image of the subject at least in part by combining the indication of bone presence and the indication of tissue presence.
US10134120B2
Dimensioning systems may automate or assist with determining the physical dimensions of an object without the need for a manual measurement. A dimensioning system may project a light pattern onto the object, capture an image of the reflected pattern, and observe changes in the imaged pattern to obtain a range image, which contains 3D information corresponding to the object. Then, using the range image, the dimensioning system may calculate the dimensions of the object. In some cases, a single range image does not contain 3D data sufficient for dimensioning the object. To mitigate or solve this problem, the present invention embraces capturing a plurality of range images from different perspectives, and then combining the range images (e.g., using image-stitching) to form a composite range-image, which can be used to determine the object's dimensions.
US10134115B2
One embodiment provides for a general-purpose graphics processor comprising a fragment processing unit configured to generate pixel color data in a graphics processing pipeline, the fragment processing unit output color data to a multisample render target; and a memory allocator to allocate memory to store color data associated with the multisample render target, the memory allocator to merge a memory allocation for multiple pixels having a sample associated with equal color data.
US10134111B2
A method, device, system, and article of manufacture are provided for generating an enhanced image of a predetermined scene from images. In one embodiment, a method comprises receiving, by a computing device, a first indication associated with continuous image capture of a predetermined scene being enabled; in response to the continuous image capture being enabled, receiving, by the computing device, from an image sensor, a reference image and a first image, wherein each of the reference image and the first image is of the predetermined scene and has a first resolution; determining an estimated second resolution of an enhanced image of the predetermined scene using the reference image and the first image; and in response to the continuous image capture being disabled, determining the enhanced image using the reference image and the first image, wherein the enhanced image has a second resolution that is at least the first resolution and about the estimated second resolution.
US10134108B2
Embodiments of the present invention provide systems, methods, and computer storage media directed at image synthesis utilizing sampling of patch correspondence information between iterations at different scales. A patch synthesis technique can be performed to synthesize a target region at a first image scale based on portions of a source region that are identified by the patch synthesis technique. The image can then be sampled to generate an image at a second image scale. The sampling can include generating patch correspondence information for the image at the second image scale. Invalid patch assignments in the patch correspondence information at the second image scale can then be identified, and valid patches can be assigned to the pixels having invalid patch assignments. Other embodiments may be described and/or claimed.
US10134102B2
A GPU is configured to read and process data produced by a compute shader via the one or more ring buffers and pass the resulting processed data to a vertex shader as input. The GPU is further configured to allow the compute shader and vertex shader to write through a cache. Each ring buffer is configured to synchronize the compute shader and the vertex shader to prevent processed data generated by the compute shader that is written to a particular ring buffer from being overwritten before the data is accessed by the vertex shader. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
US10134095B2
A method and system connects brands, users and communities via socially shared content elements that take the form of, for example, words, pictures/images, videos and/or audio objects. The method creates a social media engagement and distribution capability of dynamic, interactive impressions linking users to users and users to brands around shared “day in the life” moments. The spectrum of reach and range of content types combined with user daily lives creates a ubiquitous new web medium of social content. The user experience created by this method and system creates a sustainable stickiness for members, capturing, creating, sharing and responding to each other interactively in any communication format, at any time, in any place and for any reason.
US10134084B1
A method of facilitating an augmented reality experience to purchase an item at a merchant location may be provided. The method may include storing profile data, receiving location data and environmental data from a computing device associated with the stored profile data. Upon determining that the user device has entered a predefined merchant location, the method may include initiating a sequence of augmented reality modes including at least a first augmented reality mode associated with the selection of an item and a second augmented reality mode associated with the payment of the item. The user device may display virtual content in association with each mode, and upon detecting predetermined user inputs such as gestures, fixed gazes, or moving through thresholds, the system may enable the selection and payment of one or more items by sending a purchase request to a merchant terminal.
US10134078B2
There is provided systems and method for completion of item purchases without merchant interaction. A payment provider may generate a purchase request for a first user, where the purchase request includes a sale of an item to the first user. The purchase request may be generated by first receiving a purchase of an item from another user, where the other user designates that a purchase request should be transferred to the first user. However, the purchase request may also be generated based on purchasing preferences of the first user, such as a specific item that was previously unavailable at a merchant. Once the purchase request is received by the first user, the first user may select a purchase option, which transmits acceptance to the payment provider. The payment provider may then complete the purchase request with the merchant without the first user interacting with the merchant.
US10134067B2
In an example embodiment, identifications of user actions are received from a first user device, the user actions being actions related to identifying data from a multi-tenant database to view. A portion of a first search query is received from a first user device corresponding to a first tenant in a multi-tenant architecture. A list of permissions for the first user device is then obtained. A plurality of fields is retrieved from a multi-tenant database based on the portion of the first search query, the fields obtained from data stored by multiple different tenants in the multi-tenant database, the plurality of fields retrieved being limited to fields for which the first user device has permission to view. Then a plurality of autocomplete suggestions are identified from the plurality of retrieved fields, the identifying based on the user actions.
US10134045B2
Techniques and systems are disclosed for forwarding a limited number of vendor messages during a consumer mobile device campaign, such as a CSC campaign. Opt-in events are received from an aggregator's message service platform for a consumer mobile device (e.g., smart-phone), and a time interval is identified for the campaign that comprises a duration for the campaign. Campaign parameters are identified, where the parameters comprise a desired number of campaign messages for the “opted-in” consumer mobile device. Vendors are grouped into one or more campaign message categories (e.g., by service or products), and a bidding frequency is identified for campaign message categories for the campaign duration. Bids are received for message slots at the bidding frequency for a campaign message category, a desired bid is selected if it meets a threshold, and the corresponding vendor message is sent to the opted-in phone(s).
US10134037B2
The present application relates to a multimedia data capture and processing (C&P) device. In an example, the multimedia data C&P device comprises a multimedia sensor configured to capture a first multimedia data; and a device processor configured to obtain a preset information, and generate a second multimedia data according to the first multimedia data and the preset information, at least a part of the second multimedia data presenting the preset information. The present application also relates to a user terminal and multimedia data processing server.
US10134035B1
Systems, methods, and program products for providing secure authentication for electronic messages are disclosed. A method may comprise generating an asymmetric private key based at least in part upon an invariant biometric feature vector derived from an input biometric reading. The private key may be further based at least in part upon a user password. The resulting private key may not be stored but rather may be generated when required to authenticate an electronic message, at which time it may be used to provide a digital signature for the electronic message. The private key may be deleted after use. The private key may be regenerated by inputting both a new instance of the biometric reading as well as a new instance of the password.
US10134033B2
A payment system utilizes an IC identification card to identify a user, finds and verifies a bank account of the user. The payment system uses an IC identification card reader to read user identity information which includes a user identification card number. The system encrypts user identity information using a first encryption key and encrypts the user-entered bank account password using a bank encryption key corresponding to a participating bank, and sends the encrypted information to an intermediary platform, which sends a bank transaction request including user identity information, bank account password and transaction amount to the participating bank subsystem. The participating bank subsystem conducts the requested bank transaction with a user bank account, which is determined according to the user identification card number either by the intermediary platform or by the participating bank subsystem based on a mapping relationship between the user identity information and bank accounts.
US10134032B2
There are provided systems and method for wireless beacon communications through magnetic card readers. A check-in at a merchant location may be completed using a beacon at the merchant location with a communication device. When a user wishes to pay for an item, the beacon may alert the user through their communication device that payment may be effectuated through the communication device. The communication device may communicate a payment token to the wireless beacon that identifies payment information for the user using a payment provider. The payment token may be encrypted, and the wireless beacon may decrypted the payment token prior to transmission to an accessory of a point of sale device, such as a magnetic card reader using magnetic field generation. This payment token may then be transmitted to a point of sale device, which may utilize a payment provider and/or a payment card issuer to effectuate payment.
US10134025B2
Contactless payment transactions are initiated through single input activation of a mobile device's secure element and contactless communication system. Activation of the secure element and the contactless communication system is coupled to the activation status of the mobile device's screen. Activation of the secure element may be further coupled to the activation status of an electronic wallet application. Where activation of the electronic wallet application is required, one-click activation of the electronic wallet application and secure element is provided.
US10134021B2
The present disclosure provides a method of providing a gift icon using a communication network. The method includes: providing an item list of amounts of money to a user terminal connected with the gift provision apparatus through the communication network; selecting at least one of the amounts of money, and inputting information of a receipt terminal to receive the at least one selected amount of money, wherein the receipt terminal is separated from the user terminal; transmitting a request message for a gift to the gift provision apparatus; and providing the gift icon to the receipt terminal through the communication network, when the gift provision apparatus receives the request message.
US10134019B2
Methods, systems, and computer-readable media for determining whether a check may be cashed at an automated teller machine (ATM) are provided. A user may request to cash a check at an ATM and check image data may be transmitted to a return deposit item computing platform. The computing platform may identify an account number of the account on which the check is drawn. Transaction data associated with the account may be retrieved by the computing platform and a number of occurrences of returned deposit items may be identified. The number of occurrences may be used to determine whether the check should be cashed.
US10134015B2
The invention relates to the sphere of information technologies, in particular, to electronic systems and monetary-fund circulation methods and can be used for solving problems of mutual settlements between participants of the electronic payment system in real-time mode. In doing so, the analogue of monetary funds in the invention presented are electronic bank bearer checks complying with bank regulations and the requirements of applicable legislation. The client application units are rendered as grouped into modules by categories corresponding to the user status determined by the unit of authorization of the client and server applications, with provision of the possibility of pre-setting a group of check circulation parameters for each category. The issue of checks is accompanied by the creation of legally-valid documents and reflection of transactions in the check register.
US10134014B2
Methods and systems for proactively preventing hazardous or other situations in a robot-cloud interaction are provided. An example method includes receiving information associated with task logs for a plurality of robotic devices. The task logs may include information associated with tasks performed by the plurality of robotic devices. The method may also include a computing system determining information associated with hazardous situations based on the information associated with the task logs. For example, the hazardous situations may comprise situations associated with failures of one or more components of the plurality of robotic devices. According to the method, information associated with a contextual situation of a first robotic device may be determined, and when the information associated with the contextual situation is consistent with information associated with the one or more hazardous situations, an alert indicating a potential failure of the first robotic device may be provided.
US10134001B2
A method for collecting data and deriving performance metrics for one or more users within an observation platform environment is described. The method includes recognizing a user identity based on signals from the communications device; Capturing a user's voice message and the secondary signal indicative of the location of the communications device or the relative proximity of the communications device to other devices; Deriving statistical data comprising: primary statistics, secondary statistics, and higher-order statistics from the secondary signal and voice message; and Storing the user identity, the voice message, the location of the communications device, and the statistical data in a database forming a user record, wherein the user record is processed by an inference engine to derive performance information about the user.
US10133999B2
A risk identification system automatically determines deals at risk by analyzing conversations of representatives with customers. The risk identification system retrieves recordings of various conversations, extracts features of each of the conversations, and analyzes the features to determine if any of the conversations includes features that are indicative of a deal discussed in that conversation being at risk. By performing such an analysis of conversations, the risk identification system can identify a number of deals that are at risk and generate a report of such deals and notify a consumer user of the risk identification system of such deals.
US10133996B2
Embodiments presented herein provide techniques for generating analytical graphs that display a visualization of multiple transaction objects processed concurrently in a computer system. An object lifecycle analysis tool identifies one or more transaction objects having a specified identifier. Each transaction object corresponds to an instance of a common transaction having been processed. The analysis tool retrieves transition state information corresponding to each transaction object and sorts the transition state information in chronological order. The analysis tool generates a graph based on the sorted transition state information. The generated graph allows a user to easily identify performance issues (e.g., concurrency bottlenecks) in a transaction management system.
US10133995B1
In some examples, a service provider may determine, for a time of day and a day of a week, orders received by individual merchants of a plurality of merchants over a past period of time. The service provider may further determine, for the time of day and day of the week, based at least in part on the orders received over the past period of time, a first merchant predicted to receive an order. Based at least in part on a pickup location of the first merchant, the service provider may send a communication to a first courier device associated with a first courier of a plurality of couriers. For example, the communication may include location information for a recommended location to which the first courier is to move to be in position for picking up an order from the merchant that is predicted to receive the order.
US10133992B2
Described are a system and method for monitoring pre-prepared meals which can be assembled as a plurality of portions. Assembled pre-prepared meals can be monitored starting from their assembly up to the ultimate consumption. Pre-prepared meals are arranged on tray-like containers and a data carrier is fastened which contains meal-specific data. These meal-specific data can be read out at at least two reading stations to be able to keep a record of the conditions of manufacture, storage and/or cooling.
US10133988B2
The proposed method is used for classification in open-set scenarios, wherein often it is not possible to first obtain the training data for all possible classes that may arise during the testing stage. During the test phase, test samples belonging to one of the classes used in the training phase are classified based on a ratio between similarity scores, as known correct class and test samples belonging to any other class are to be rejected and classified as unknown.
US10133986B1
A device includes a converter configured to convert photons input from a photonic link into Cooper-pairs, a first superconductor, a second superconductor, a plurality of nanowires connected to the first superconductor and the second superconductor, and a gate array connected to the plurality of nanowires and configured to alter quantum states of ions within the plurality of nanowires.
US10133983B1
Described is system for modeling probability matching and loss sensitivity among human subjects. A set of features related to probability matching and loss sensitivity is extracted from collected human responses. The set of features are processed with a genetic algorithm to fit the collected human responses with a set of neural network model instances. A set of model parameters are generated from the genetic algorithm and used to generate at least one of an explanatory and predictive model of human behavior.
US10133968B2
An image forming apparatus includes an image forming unit configured to perform a printing process of forming an image on a print medium based on print data, and a processor. The processor is configured to determine whether or not the printing process has completed based on remaining print data to be printed, when the print medium is removed from a paper discharge tray in which the print medium on which the image is formed by the image forming unit is placed, and to cause a warning to be output upon determining that the printing process has not completed based on the remaining print data to be printed.
US10133966B2
To provide a technology capable of having another object related to one object easily recognized after detection of the one object, there is provided an information processing apparatus including a detection unit configured to detect a predetermined detection object, a data obtaining unit configured to obtain instruction information ordering that a predetermined imaging object according to the detection object fall within an imaging range of an imaging unit, and a display control unit configured to cause a display unit to display the instruction information.
US10133965B2
The invention refers to a method for text recognition, wherein the method is executed by a processor of a computing device and comprises steps of providing a confidence matrix, wherein the confidence matrix is a digital representation of an input sequence, entering a regular expression, searching for a symbol sequence of the input sequence that matches the regular expression, wherein a score value is computed by the processor using confidence values of the confidence matrix, wherein the score value is an indication of the quality of the matching between the symbol sequence of the input sequence and the regular expression. Further, the invention relates to a computer program product which when executed by a processor of a computing device performs the method.
US10133959B2
Disclosed are a quantum system-based image pattern recognition computation apparatus and method for machine vision and a quantum system-based machine vision apparatus. The computation apparatus recognizes patterns between images in machine vision by using a quantum system. The computation apparatus includes a modeling unit and an interpretation unit. The modeling unit sets up an objective function based on the similarity between a first pattern derived from the relationships between points of interests of a first image and a second pattern derived from the relationships between points of interests of a second image. The interpretation unit finds an optimum first pattern and an optimum second pattern, in which the similarity between the first pattern and the second pattern is optimized, by interpreting a final quantum state obtained through an adiabatic evolution process of the quantum system in which the objective function is optimized.
US10133947B2
An apparatus includes an object detector configured to receive image data of a scene viewed from the apparatus and including an object. The image data is associated with multiple scale space representations of the scene. The object detector is configured to detect the object responsive to location data and a first scale space representation of the multiple scale space representations.
US10133945B2
The present disclosure relates to a gaze based error recognition detection system that is intended to predict intention of the user to correct user drawn sketch misrecognitions through a multimodal computer based intelligent user interface. The present disclosure more particularly relates to a gaze based error recognition system comprising at least one computer, an eye tracker to capture natural eye gaze behavior during sketch based interaction, an interaction surface and a sketch based interface providing interpretation of user drawn sketches.
US10133944B2
A system and methodologies for neuromorphic vision simulate conventional analog NM system functionality and generate digital NM image data that facilitate improved object detection, classification, and tracking.
US10133941B2
A method, an apparatus and a device for detecting lane boundaries are provided. The method includes: obtaining a current image of a lane, and extracting brightness jump points in the image by filtering the image; filtering out noise points from the brightness jump points, and determining remaining brightness jump points as edge points to form groups of the edge points, where a connection line of edge points in the same group forms one edge line; recognizing edge lines of the lane boundaries from edge lines; and grouping the edge lines of the lane boundaries, and recognizing edge lines in each group as edge lines of one lane boundary. Based on the method, a calculation for detecting the lane boundaries is simpler, and calculation resources and time consumed in detecting the lane boundaries are reduced to detect the lane boundaries accurately and quickly.
US10133940B2
Provided is a road surface undulation estimation device and a road surface undulation estimation method capable of estimating an undulation of a road surface on which a vehicle travels, being configured to: detect regularly appearing objects from a vehicle periphery image captured by a camera; calculate detection positions of the respective regularly appearing objects by using camera installation information to transform positions of the respective regularly appearing objects in the vehicle periphery image into positions in a real space; calculate detection intervals between neighboring detection positions out of the respective detection positions; and estimate, from the respective detection positions, the calculated detection intervals, and an installation interval of the regularly appearing objects, inclinations of the actual road surface with respect to a road surface obtained through the transformation calculation from the vehicle periphery image to the real space.
US10133930B2
A method for controlling a robot cleaner configured to project light of a predetermined pattern to a floor of an area in front thereof in a specific direction and to acquire an image of the area to which the light is projected, according to the present disclosure, includes: (a) acquiring a front view image of the robot cleaner; (b) detecting the pattern from the image acquired in (a); and (c) discriminating a pattern formed by reflected light from a pattern formed by light directly projected from the robot cleaner, from among patterns indicated in the acquired image, on the basis of geometrical characteristics defined by a projection direction of the light and the direction of an optical axis in which the image is acquired when two or more patterns are detected from the image.
US10133925B2
The present disclosure provides a human-machine interface guidance/indication device for iris recognition of a mobile terminal, comprising a mobile terminal and an iris recognition imaging module; the mobile terminal comprises a visible light LED (light emitting diode) and a display screen respectively in signal connection with a processor chip; the iris recognition imaging module comprises an imaging sensor and a near-infrared LED lighting source, and a near-infrared optical filter and an optical imaging lens are arranged on the imaging sensor; the processor chip is in signal connection with the imaging sensor and the near-infrared LED lighting source respectively.
US10133924B2
A method for fingerprint matching and camera identification includes reading, through a device, a camera fingerprint extracted from a picture taken by a camera, and calculating a compressed version of the camera fingerprint through a random projections technique.
US10133923B2
An IC card includes a first visible layer including a natural material having a unique visual pattern. A storage device is configured to store a digital reference image of the unique visual pattern to be visually compared with the unique visual pattern for authentication. An authentication method based on the IC card is also provided.
US10133920B2
One embodiment provides a method, including: receiving, at an input and display device, handwriting input; receiving, using a processor, voice input; generating, using a processor, at least one first word based on the handwriting input; generating, using a processor, at least one second word based on the voice input; and determining, using a processor, a highest probability word based on the at least one first word and the at least one second word. Other aspects are described and claimed.
US10133919B2
Motion capture system with a motion capture element that uses two or more sensors to measure a single physical quantity, for example to obtain both wide measurement range and high measurement precision. For example, a system may combine a low-range, high precision accelerometer having a range of −24 g to +24 g with a high-range accelerometer having a range of −400 g to +400 g. Data from the multiple sensors is transmitted to a computer that combines the individual sensor estimates into a single estimate for the physical quantity. Various methods may be used to combine individual estimates into a combined estimate, including for example weighting individual estimates by the inverse of the measurement variance of each sensor. Data may be extrapolated beyond the measurement range of a low-range sensor, using polynomial curves for example, and combined with data from a high-range sensor to form a combined estimate.
US10133911B2
Methods and devices are provided for verifying a fingerprint in the field of computer technology. The method includes: N pressing operations successively performed by a finger of a user within an area for acquiring the fingerprint are acquired; a sequence of fingerprints to be verified is generated according to fingerprints and pressing intensities of the N pressing operations; the sequence of fingerprints to be verified is compared with a reference sequence of fingerprints; and when the sequence of fingerprints to be verified is the same as the reference sequence of fingerprints, it is determined that the fingerprint of the user is successfully verified.
US10133908B2
The present disclosure discloses an ultrasonic fingerprint sensor. The ultrasonic fingerprint sensor includes a piezoelectric layer, a number of emitters, and a number of receiving electrode lines. The piezoelectric layer includes an array of piezoelectric posts. The emitters are formed on a lower end of the piezoelectric layer and correspond to the piezoelectric posts. Each of the emitters is connected to a corresponding piezoelectric post. The receiving electrode lines are arranged on an upper end of the piezoelectric layer, and each of the receiving electrode lines corresponds to a row of the piezoelectric posts and connected to the row of the piezoelectric posts. The present disclosure also discloses a fingerprint recognition module.
US10133896B2
An example electronic device includes a watermark scanner to scan a watermark embedded on an initial page of a physical medium. The electronic device also includes a gesture sensor to detect a hand movement of a consumer associated with the physical medium. The electronic device further includes a controller to: determine a page number of the initial page based on the scanned watermark; determine a current page number based on the page number of the initial page; determine a page number of a subsequent page of the physical medium based on the detected hand movement and the current page number; and determine payoff information associated with the subsequent page based on the page number of the subsequent page.
US10133881B2
A circuit arrangement and method for securing an integrated electronic circuit against scans of an address space, wherein the circuit arrangement has at least one master unit and at least one slave unit interconnected via a bus system for access of the master unit to the slave unit, and addresses are used from an address space that is allocated and used in accordance with functionalities of the integrated electronic circuit, where a defense slave unit is connected to the bus system, access to unused address regions of the address space are forwarded to the defense slave unit, the access is analyzed and evaluated by the defense slave unit and depending on an analysis result and the respective access type, defensive measures are triggered, such that address space scans are interrupted or a potential scan result is rendered useless in a simple manner.
US10133880B2
Disclosed are systems and methods for blocking access to interface elements of a page of an application in an applications store. The computing device executes executing a restrictive application that restricts use of the computing device. The restrictive application can determine that a page of the application in the application store is being presented on a display of the computing device and block access to interface elements of the application page, thereby preventing punitive evaluations of the restrictive application. To restore access to the application store page, the restrictive application may obtain authentication data associated with an authorized user, and responsive to determining that the obtained authentication data satisfies one or more conditions for unblocking, provide access to the interface elements of the page of the application in the applications store.
US10133877B2
A social media computer system includes a database that is in network communication with a first mobile phone and a second mobile phone. The database receives a first set of data from the first mobile phone and a second set of data from the second mobile phone. The database allows the second mobile phone to access the first set of data only after the second mobile phone authorizes the first mobile phone via the database to access the second set of data. A portion of the first set of data accessed by the second mobile phone can be automatically or manually synchronized to the memory of the second mobile phone. A user of the second mobile phone can control the portion of the first set of data synchronized to the second mobile phone. The first set of data can include video, audio, geographic location, visual and textual data. The first mobile phone has a memory, and a portion of the second set of data can be synchronized to the memory of the first mobile phone.
US10133866B1
According to one embodiment, a system featuring one or more processors and memory that includes monitoring logic. In operation, the monitoring logic monitors for a notification message that identifies a state change event that represents an activity has caused a change in state of a data store associated with a storage system. The notification message triggers a malware analysis to be conducted on an object associated with the state change event.
US10133860B2
A computer implemented system and method for generating and recovering an authorization code. The system creates an authorization code by accepting a base-sentence from a user. Based on the characters present in this base-sentence, the system computes a base-sentence matrix. The system also generates a plurality of patterns. The user can either select the pattern from the multiple patterns suggested by the system or can create his/her own pattern. The system then performs multiplications between the base-sentence matrix and the selected pattern matrix at different stages in the path forward, for obtaining a strong authorization code. In case the user forgets the base sentence, the system also has provisions to manage forgotten authorization code. This is done by fragmenting the base-sentence into different matrices and storing the fragmented matrices into a repository after computing matrix multiplication with a security question answer and with a secret key provided by the user.
US10133848B1
Medication management is facilitated at least by accessing at least a portion of data, the data may identify medication sets to be taken by a user according to a schedule including time periods. Each of the plurality of medication sets may be associated in the data with identification codes and at least one of the time periods. A medication message may be output identifying a particular medication set of the medication sets to be taken at a particular time period of the time periods. An input identification code may be received, and it may be determined whether the input identification code corresponds to the particular medication set. A warning message may be output in response to it being determined that the input identification code does not correspond to the particular medication set.
US10133837B1
A method for converting a real number modeling to a synthesizable register-transfer level emulation in digital mixed signal environments is provided. The method includes verifying an input in a file including a real number modeling code and cleaning the real number modeling code in the file. The method also includes separating a clean register-transfer level code from the real number modeling code, converting the file to a cycle-driven simulation interface file, and verifying the cycle-driven simulation interface file. The method further includes converting the cycle-driven simulation interface file into a register-transfer level file suitable to perform a circuit emulation in digital mixed signal environments, and verifying that the register-transfer level file is ready to perform circuit emulation in the digital mixed signal environments. A system and a non-transitory, computer readable medium storing commands to perform the above method are also provided.
US10133834B2
The method for simulating wave propagation wherein: a) data representing a three-dimensional scene (14) are supplied; b) primary rays (Pij) emitted in different propagation directions are calculated; d) as a function of a point of reception (P), is calculated primary scattered rays (RdA, RdB), emitted by the surfaces of the objects present in the scene reached by a primary ray. The power transported by the scattered rays (Rd) is calculated as a function of the relative orientation between the primary incident ray that reaches the surface of the object in question and the normal to this surface.Simulator, computer program and recording medium for implementing the method.
US10133828B2
A method of calculating an inserting force using 3D modeling, the method being performed by a numerical analysis apparatus is provided. The method includes receiving 3D modeling of a first model and a second model and receiving a first movement direction of the first model to couple the first model to the second model and searching for a contact surface between the first model and the second model while simulating the movement of the first model along the first movement direction and calculating an inserting force required in the process of coupling the first model and the second model by using the contact surface.
US10133827B2
Techniques are described herein for automatic generation of multi-source breadth-first search (MS-BFS) from high-level graph processing language. In an embodiment, a method involves a computer analyzing original software instructions. The original software instructions are configured to perform multiple breadth-first searches to determine a particular result. Each breadth-first search originates at each of a subset of vertices of a graph. Each breadth-first search is encoded for independent execution. Based on the analyzing, the computer generates transformed software instructions configured to perform a MS-BFS to determine the particular result. Each of the subset of vertices is a source of the MS-BFS. In an embodiment, parallel execution of the MS-BFS is regulated with batches of vertices. In an embodiment, the original software instructions are expressed in Green-Marl graph analysis language. In an embodiment, the transformed software instructions are expressed in a general purpose programming language such as C, C++, Python, or Java.
US10133820B2
Techniques for intelligent content indexing are disclosed. In one particular exemplary embodiment, the techniques may be realized as a method for performing intelligent content indexing comprising indexing by one or more processes associated with a client an initial full set of data of the client to create an index of the client data, detecting a change in the client data, and modifying the index to reflect the change in the client data.
US10133818B2
Social media content items are mapped to relevant time-based media events. These mappings may be used as the basis for multiple applications, such as ranking of search results for time-based media, automatic recommendations for time-based media, prediction of audience interest for media purchasing/planning, and estimating social interest in the time-based media. Social interest in time-based media (e.g., video and audio streams and recordings) segments is estimated through a process of data ingestion and integration. The estimation process determines social interest in specific events represented as segments in time-based media, such as particular plays in a sporting event, scenes in a television show, or advertisements in an advertising block. The resulting estimates of social interest also can be graphically displayed.
US10133817B2
Methods and systems described herein relate to management of media playback based on media preferences. A computing device may receive data indicating that a media item is available to be played by a media playback system. A media preference associated with the media item may then be identified based on the received data. The media preference may be identified in a preference database. Based on the media preference, the computing device determines whether the media item is or is not to be played by the media playback system. If a determination is made that the media item is not to be played, the computing device sends to the media playback system, an indication that the media item is not to be played. If a determination is made that the media item is to be played, the computing device causes the media item to be played by the media playback system.
US10133806B2
Systems and methods for search result replication in a search head cluster of a data aggregation and analysis system. An example method may comprise maintaining a replication count corresponding to how many replicas of a result of a particular map-reduce search exist in a search head cluster comprising a plurality of search heads that are each configured to enable them to manage a reduce phase of a map-reduce search, determining that the replication count is less than a target replication count, selecting, based the determining, a target search head from the search head cluster to receive a replica of the search result, initiating a replication of the search result from a source search head in the search head cluster to the selected target search head, receiving an indication that the replication is complete, and based on receiving the indication, increasing the replication count corresponding to the search result.
US10133805B2
A system and method for determining a sequential access efficiency for a database table includes determining a number of data block changes that occur during a sequential access of a plurality of rows in a database table. The sequential access efficiency is determined based on the determined number of data block changes.
US10133801B2
A system and a method are disclosed for generating a repository to be used on a client device. The repository is generated based on a repository format supported by the client device, which is identified by analyzing an empty repository created by the client device. The generated repository is configured with metadata that allows an operating system executing on the client device to communicate with the repository. Once generated, the repository is populated with data associated with a user of the client device. The populated repository is transmitted to the client device, where the repository is used by applications for retrieving and storing data.
US10133798B2
Content transformations can include transformation of content items in a CMS repository from a source format to a target format. Such transformations can be performed using a transformation node cluster having multiple nodes, each of which is configured for a specific content transformation type. Router nodes can receive requests for content items and route content items to transformation nodes having a proper content transformation type to either transform a requested content item to the target format or perform an intermediate transformation as part of a transformation chain. A transformation node cluster can be dynamically configurable based on estimates of expected loads for the various types of transformations. Systems, methods, and articles of manufacture are also described.
US10133796B2
In connection with processing asynchronous streams of aircraft telemetry data, data processing logic is developed to run on multiple aircraft, even if different avionics equipment are installed on the aircraft. An electronic inventory system tracks data available on affected aircraft. A set of “global” data elements applicable to aircraft in a fleet is defined and is tracked in the electronic inventory system, with relationship to the underlying native data elements and specific aircraft. The global units are derived as appropriate, for each specific aircraft avionics environment. An interface enables definition of data processing logic that is integrated with the electronic inventory system and ensures the general validity of the defined logic. The data processing logic is deployed to one or more aircraft in a function integrated with the electronic inventory system, to ensure the validity of the data processing logic for each aircraft specified as a deployment target.
US10133795B2
A system, method and apparatus for providing real-time tracking of user personalized metrics from a database are provided. A request is received from a user device for personalized metrics data from a customer relationship management (CRM) application. A home page user interface is transmitted for display on the user device. The home page user interface provides several icons for user selection, where each of the several icons corresponds to a unique personal metrics category. A selection of one of the several icons is received. A user interface for a personal metrics category corresponding to the selected icon is transmitted for display on the user device. The user interface provides for display on the user device at least one personalized metrics data corresponding to the personal metrics category.
US10133784B2
A stream computing application may be configured to manage the flow of tuples through a section of an operator graph. A window may be generated over one or more stream operators. The window may include breakpoint thresholds that set the maximum flow of tuples within the window. The stream operators within the window may be monitored to determine the flow of tuples occurring within the window using tuple flow counts. The tuple flow counts may be compared to the breakpoint thresholds to determine whether a breakpoint condition has occurred. If a breakpoint condition has occurred, a tuple flow change may be implemented to reduce the flow of tuples within the window.
US10133765B1
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for storing a plurality of items, each item including digital content, for each item of the plurality of items, generating a quality score to provide a plurality of quality scores, each quality score indicating a quality of an associated item and being based on at least one of a status score and a content score, the status score being associated with an author user of a respective item and the content score being associated with digital content provided in the respective item, determining an order of items based on respective quality scores, and transmitting instructions to display items to a user based on the order.
US10133763B2
Systems and methods include: receiving input at a storage system managing a storage device in which a tree-based data structure is stored, the input identifying a set of heterogeneous operations to be applied to the tree-based data structure; determining one or more nodes of the tree-based data structure to which one or more of the set of heterogeneous operations are to be applied; determining one or more groups of the set of heterogeneous operations, the determining being based at least in part on the one or more nodes to which the heterogeneous operations are to be applied; isolating processing of each node from processing of other nodes; and processing each of the one or more nodes to which one or more of the set of heterogeneous operations are to be applied with one of the groups of the set of heterogeneous operations.
US10133742B2
Method of retrieving event information is presented. Memento objects can be recognized by an archive engine. Based on the recognition, the archive engine obtains information related to the memento object, possibly one or more recognizable features, and uses the information to search for events associated with a timeline that have corresponding tags. The archive engine can then return the event information as a result set to a user.
US10133741B2
A log data service in a virtual environment that allows customers of a compute service provider to access system, application and custom log files associated with virtual machine instances that are executing. In some embodiments, log data can be received that includes events or messages from virtual machines in a multi-tenant environment. The log data can be transformed into metric data, which can be used by the customer to generate statistics, view graphs, and generally monitor the customer's virtual machine instances. The log data can also be stored as a service so that the customer has a central repository for which to access the log data.
US10133727B2
Computer implemented systems and methods of processing clinical documentation for a multi-axial coding scheme include inputting clinical documentation from memory operatively coupled with a computer system, and executing a natural language processor configured to process narrative text in the clinical documentation. The processor segments the narrative text based on boundaries defined in the clinical documentation, sequences words in the narrative text based on the segmentation, and maps the sequenced words to semantic objects in an ontology database. The ontology defines classes of semantic objects and relationships between them, corresponding to the multi-axial coding scheme. The semantic objects are converted into characters and output into slots in a medical code, with the characters positioned in the slots based on the multi-axial coding scheme.
US10133721B2
Data cells in a spreadsheet report are collapsed and expanded without disrupting other spreadsheet data. A user may want to drill down on data corresponding to a parent member of the report to display more detailed information about the parent member. Likewise, a user may want to drill up the displayed information corresponding to the parent member to hide detailed information associated with the parent member. Before expanding or collapsing a report, the spreadsheet is scanned for information to determine whether the display of other data in the spreadsheet would be disrupted by the expansion/collapse. The information may include cross join information associated with the parent member, the number of child members associated with the parent member, the dimension of the report created by the parent member and the associated child members, and other reports that may be linked to the report that includes the parent member.
US10133716B2
The present invention relates to a solution for generating a notification relating to editing of a document in a collaborative document editing environment. The method includes: establishing the collaborative document editing environment at least by defining a plurality of users permitted to access the document; monitoring if the document is edited by the at least one user granted the right to edit the document; in response to a detection generating at least one notification representing at least one edit event performed by the at least one user granted the right to edit the document; and transmitting the at least one notification representing the at least one edit event to at least one recipient. Also disclosed is a system implementing the method and a processor-readable non-transitory medium storing processor-executable instructions for executing the method by a processor.
US10133700B2
An apparatus is provided that compensates for misalignment on a synchronous data bus, the apparatus includes a replica radial distribution element, a bit lag control element, and a synchronous lag receiver. The replica radial distribution element is configured to receive a lag pulse signal, and is configured to generate a replicated strobe signal, where the replica radial distribution network includes replicated propagation path lengths, loads, and buffering of a radial distribution network for a strobe. The bit lag control element is configured to measure the time between assertion of the lag pulse signal and assertion of the replicated strobe signal, and is configured to generate a first value on a lag bus that indicates the time. The bit lag control element has delay lock control that is configured to select one of a plurality of successively delayed versions of the lag pulse signal that coincides with the assertion the replicated strobe signal, and is configured to generate a second value on a lag select bus that indicates the propagation time, where the delay lock control selects the one of a plurality of successively delayed versions of the lag pulse signal by incrementing and decrementing bus states of select inputs on a mux, and where the plurality of successively delayed versions comprises inputs to the mux, and where the plurality of successively delayed versions comprises outputs a first plurality of series-coupled matched inverter pairs. The synchronous lag receiver is coupled to the bit lag control element, and is configured to receive a first one of a plurality of radially distributed strobes and a data bit, and is configured to delay registering of the data bit by the time.
US10133698B2
An IO subsystem chassis includes IO modules and IO slots to receive the IO modules inserted from a frontend of a housing, a baseboard disposed within the housing, the baseboard including first connectors corresponding to the IO slots to receive and connect the IO modules. Each of the IO modules can be coupled a server via the backend panel using a cable. Each IO module includes an IO card having a peripheral device mounted thereon and a card holder having a first receiving socket to receive and hold the IO card plugged in vertically and downwardly. The card holder further includes a second connector to engage with or disengage from a corresponding one of the first connectors of the baseboard horizontally, when the IO module is inserted into or removed from a corresponding IO slot from the frontend, without having to removing the housing.
US10133688B2
The present application discloses a method and an apparatus for transmitting information. A specific implementation of the method includes: sending first information to be transmitted to a shared memory; traversing memory groups in the shared memory, and acquiring a first memory unit suitable for the amount of the first information, each of the memory groups including at least one memory unit, each of memory units in the memory group having an identical size, and the memory units in different memory groups having different sizes; and storing the first information into the acquired first memory unit, so that the first information is read from the first memory unit by a receiving node. Through this implementation, the first information that needs to be transmitted is stored into the memory unit suitable for the amount of the first information, thereby saving memory resources.
US10133687B2
A communication apparatus comprises a general-purpose memory, and a high-speed memory that allows higher-speed access than the general-purpose memory. Protocol processing is executed to packetize transmission data using a general-purpose buffer allocated to the general-purpose memory and/or a high-speed buffer allocated to the high-speed memory as network buffers.
US10133684B2
An integrated circuit, preferably for controlling vehicle functions, having an analog-digital converter for converting an analog signal into digital measurement values, a DSP unit, connected downstream from the analog-digital converter, for pre-processing the digital measurement values, a central computing unit, connected to the DSP unit so as to transmit data, for further processing of the digital measurement values, the DSP unit being set up to control the analog-digital converter during operation.
US10133678B2
In some embodiments, a method of managing cache memory includes identifying a group of cache lines in a cache memory, based on a correlation between the cache lines. The method also includes tracking evictions of cache lines in the group from the cache memory and, in response to a determination that a criterion regarding eviction of cache lines in the group from the cache memory is satisfied, selecting one or more (e.g., all) remaining cache lines in the group for eviction.
US10133676B2
Embodiments related to a cache memory that supports tagless addressing are disclosed. Some embodiments receive a request to perform a memory access, wherein the request includes a virtual address. In response, the system performs an address-translation operation, which translates the virtual address into both a physical address and a cache address. Next, the system uses the physical address to access one or more levels of physically addressed cache memory, wherein accessing a given level of physically addressed cache memory involves performing a tag-checking operation based on the physical address. If the access to the one or more levels of physically addressed cache memory fails to hit on a cache line for the memory access, the system uses the cache address to directly index a cache memory, wherein directly indexing the cache memory does not involve performing a tag-checking operation and eliminates the tag storage overhead.
US10133674B2
A system and method including, in some embodiments, receiving a request for a graphics memory address for an input/output (I/O) device assigned to a virtual machine in a system that supports virtualization, and installing, in a graphics memory translation table, a physical guest graphics memory address to host physical memory address translation.
US10133671B2
A system and method are disclosed that include a bridge that translates non-coherent transactions, which are received from a non-coherent subsystem, into one or more coherent transactions to be issued to a coherent subsystem. The bridge also buffers data coherently in an internal cache, also known as a proxy cache, based on certain attributes of the non-coherent transaction. The invention may be applied to any cache, which receives read and write transactions that become coherent transactions.
US10133660B2
Dynamically allocated thread storage in a computing device is disclosed. The dynamically allocated thread storage is configured to work with a process including two or more threads. Each thread includes a statically allocated thread-local slot configured to store a table. Each table is configured to include a table slot corresponding with a dynamically allocated thread-local value. A dynamically allocated thread-local instance corresponds with the table slot.
US10133651B2
A software defect detection tool determines a modification in a software code at a first time and analyzes an execution of the software code to detect a performance issue at a second time. The software defect detection tool detects a defect in the software code by a comparison of the first time and a second time. A software defect analysis tool generates a cause/category combination for a software code defect. The software defect analysis tool determines whether the cause/category combination is an approved combination and whether the software code defect is a false positive. The software defect analysis tool generates a corrective action plan indicating measures to implement to reduce software defects.
US10133641B2
A computer system comprises a processor unit arranged to run a hypervisor running one or more virtual machines; a cache connected to the processor unit and comprising a plurality of cache rows, each cache row comprising a memory address, a cache line and an image modification flag; and a memory connected to the cache and arranged to store an image of at least one virtual machine. The processor unit is arranged to define a log in the memory and the cache further comprises a cache controller arranged to set the image modification flag for a cache line modified by a virtual machine being backed up, but not for a cache line modified by the hypervisor operating in privilege mode; periodically check the image modification flags; and write only the memory address of the flagged cache rows in the defined log.
US10133638B1
Recovery of an in-memory state in a log-structured filesystem using fuzzy checkpoints is disclosed, including: determining a portion of a data structure to checkpoint to a storage unit, wherein the structure is associated with a set of references to locations in persistent storage at which metadata is stored, wherein the portion of the data structure is dynamically determined based at least in part on a size of the data structure and a predetermined number of storage units to be associated with a checkpoint window, wherein the number of storage units to be associated with the checkpoint window is fewer than a total number of storage units associated with the persistent storage; and checkpointing the portion of the data structure to the storage unit.
US10133637B2
A management controller may be configured to control connectivity among a host system processor, a primary ROM, and a recovery ROM in accordance with a plurality of modes of operation including at least a normal mode that occurs in response to absence of a corruption of the ROM code in which the management controller causes the host system processor to be communicatively coupled to the primary ROM and communicatively decoupled from the recovery ROM, such that the host system processor loads and executes the ROM code during boot of the host system, and a primary ROM recovery mode that occurs in response to presence of the corruption of the ROM code in which the management controller causes the host system processor to be coupled to the primary ROM and the recovery ROM, such that the host system processor loads and executes the recovery code during boot of the host system.
US10133634B2
A method begins by processing modules in a dispersed storage network (DSN) identifying a memory device having a legacy slice storage format (SSF) to a second SSF and that includes a first encoded data slice (EDS) of a set of EDSs. When at least a predetermined threshold number of EDSs of the set of EDSs are included within one or storage units (SUs) excluding the first EDS the method continues by transitioning the first SSF of the memory device to the second SSF, and performing a rebuilding process using the at least the decode threshold number of EDSs of the set of EDSs to generate a rebuilt first EDS. The method continues by storing the rebuilt first EDS within the memory device to replace the first EDS that was deleted during the transitioning.
US10133627B2
A controller includes a command generation unit suitable for generating a first read command for at least one page selected from said plurality of pages, an error correction block suitable for performing a first error correction operation to one or more code words stored in said at least one selected page in response to the first read command, and a command mirroring unit suitable for generating a mirrored command by mirroring the first read command.
US10133625B2
A storage device may include a primary storage array comprising a plurality of memory devices, one or more parity memory devices, and a controller configured to store a block of data. The controller may be configured to store the block of data by at least: writing the block of data to the primary storage array, determining parity data for the block of data, and writing at least a portion of the determined parity data to the one or more parity memory devices.
US10133619B1
Systems for self-configuring health monitoring instrumentation for clustered storage platforms. Master and slave health modules implement a health monitoring system in a clustered virtualization environment comprising a plurality of nodes of the cluster with an installed health module instance running on the nodes. The health module system may gather and analyze data on a node level and at a cluster level to manage the cluster. The cluster health module system observes I/O commands issued to, and I/O command responses returned from, a common storage pool. Health data is stored in the storage pool.
US10133618B2
Various embodiments for retaining diagnostic information for data in a computing storage environment. In one such embodiment, a diagnostic component, apart from a volume table of contents (VTOC), associated with an integrated catalog facility (ICF) catalog and with a base data set from data sets via a catalog association record, is initialized. The diagnostic component is configured to retain base data set-specific diagnostic information retrievable by the computing storage environment to assist in error diagnosis. The base data set-specific diagnostic information is stored pursuant to at least one detected event associated with the base data set.
US10133617B2
Examples include a system comprising a non-volatile memory, a cluster management interface, and a multi-node cluster. In some examples, the cluster management interface may monitor a system critical alert to determine if the system critical alert has been triggered. Based on the determination that it has been triggered, the cluster management interface may multicast a system failure notification. The multi-node cluster of the system has multiple nodes, each node connected to the non-volatile memory and having a processor and a processor cache. Each node of the multi-node cluster may determine if the system failure notification has been received and based on the determination that it has been received, each node may freeze execution of all processes on the process and flush the processor cache to the non-volatile memory.
US10133614B2
Operational event loggings and operational alarm productions within a running multiserver data processing system are automatically and repeatedly sampled and co-associated with one another so as to build annotated logs that can be used by post-process analytics for filling in mappings thereof into an anomalies versus parameters mapping space and for keeping track of unusual changes in the mappings or their rates where the unusual changes can be indicative of emerging new problems of significance within the system.
US10133611B2
A system and method for communicating data between a first software and a second software located on first and second devices, respectively, has a hardware driver and memory associated with each device. Each communication of data from the first software to the second software allocates memory to manage data to be communicated from the first software to the second software, provides memory allocation information to the hardware driver associated with the first software, and transmits the data from the first hardware driver to the second hardware driver for delivery to the second software via the memory associated with the second software.
US10133606B2
An application scaling management method and apparatus are disclosed, so as to perform, in a case in which an application requires capacity expansion and remaining resources of a data center in which the application runs are insufficient, capacity expansion of the application by utilizing remaining resources of another data center, thereby improving resource utilization and capacity expansion efficiency.
US10133601B2
System and techniques for memory management are described herein. A request for an adjusted process-value for a process may be received. Here, the adjusted process-value may be used to compare resident processes to determine which resident process will be terminated in certain circumstances. In response to the request for the adjusted process-value, a launch-time weight for the process may be obtained. The launch-time weight may be combined with a process-value to create an adjusted process-value. The adjusted process-value may then be returned to the requestor.
US10133598B2
An apparatus includes a processor and a guest operating system. In response to receiving a request to create a task, the guest operating system requests a hypervisor to create a virtual processor to execute the requested task. The virtual processor is schedulable on the processor.
US10133593B1
Migrating servers from client networks to virtual machines (VMs) on a provider network. A migration appliance is installed or booted on the client network, and a migration initiator is instantiated on the provider network. A VM and associated volumes are instantiated on the provider network. The initiator sends a request for a boot sector to the appliance; the appliance reads the blocks from a volume on the client network, converts the blocks to a format used by the VM, and sends the blocks to the initiator. The initiator boots the VM using the boot sector and the VM begins execution. The initiator then retrieves all data blocks for the VM from volumes on the client network via the appliance, stores the data to the volumes on the provider network, and fulfills requests from the VM from either local volumes or the remote volumes via the appliance.
US10133588B1
In various example embodiments, a system and method for transforming instructions for collaborative updates are described herein. A group of instructions for an update of an element depicted in a client device version of a user interface are generated. The group of instructions is executed and the group or a subset of instructions are transmitted to a server. The server accepts or rejects the instructions. The server may execute the instructions to update a server version of the element. The server sends accepted instructions to the other or all client devices.
US10133582B2
A processor includes a first logic to execute an instruction stream out-of-order, the instruction stream divided into a plurality of strands, the instruction stream and each strand ordered by program order (PO). The processor also includes a second logic to determine an oldest undispatched instruction in the instruction stream and store an associated PO value of the oldest undispatched instruction as an executed instruction pointer. The instruction stream includes dispatched and undispatched instructions. The processor also includes a third logic to determine a most recently retired instruction in the instruction stream and store an associated PO value of the most recently retired instruction as a retirement pointer, a fourth logic to select a range of instructions between the retirement pointer and the executed instruction pointer, and a fifth logic to identify the range of instructions as eligible for retirement.
US10133581B2
An execution slice circuit for a processor core has multiple parallel instruction execution slices and provides flexible and efficient use of internal resources. The execution slice circuit includes a master execution slice for receiving instructions of a first instruction stream and a slave execution slice for receiving instructions of a second instruction stream and instructions of the first instruction stream that require an execution width greater than a width of the slices. The execution slice circuit also includes a control logic that detects when a first instruction of the first instruction stream has the greater width and controls the slave execution slice to reserve a first issue cycle for issuing the first instruction in parallel across the master execution slice and the slave execution slice.
US10133576B2
An execution unit circuit for use in a processor core provides efficient use of area and energy by reducing the per-entry storage requirement of a load-store unit issue queue. The execution unit circuit includes a recirculation queue that stores the effective address of the load and store operations and the values to be stored by the store operations. A queue control logic controls the recirculation queue and issue queue so that that after the effective address of a load or store operation has been computed, the effective address of the load operation or the store operation is written to the recirculation queue and the operation is removed from the issue queue, so that address operands and other values that were in the issue queue entry no longer require storage. When a load or store operation is rejected by the cache unit, it is subsequently reissued from the recirculation queue.
US10133572B2
A SIMD processor may be configured to determine one or more active threads from a plurality of threads, select one active thread from the one or more active threads, and perform a divergent operation on the selected active thread. The divergent operation may be a serial operation.
US10133569B2
An electronic circuit (4000) includes a bias value generator circuit (3900) operable to supply a varying bias value in a programmable range, and an instruction circuit (3625, 4010) responsive to a first instruction to program the range of said bias value generator circuit (3900) and further responsive to a second instruction having an operand to repeatedly issue said second instruction with said operand varied in an operand value range determined as a function of the varying bias value.
US10133566B2
A software upgrade in a data communication network may be provided by a first node. The first node may transfer a software unit to other nodes in the network. The first node may also monitor for receipt of a notification indicating completion of storage of the software unit by a node. The first node may further transmit a reboot command to the other nodes. The first node transmits the reboot command in response to receipt of the completion notification from each of the other nodes. The first node does not transmit the reboot command to any of the other nodes until the first node has received a completion notification from each of the other nodes.
US10133562B2
Data is received that characterizes a score model. Thereafter, the score model is normalized by transforming it into a directed acyclic graph. The directed acyclic graph is then transformed into a structured rules language program. The structured rules language program is then transformed into a program using a concurrent, class-based, object-oriented computer programming language (e.g., JAVA, C, COBOL, etc.). Related apparatus, systems, techniques and articles are also described.
US10133558B2
A computer implemented method and system for creating a mobile application provides a mobile application development software (MADS) and pre-coded software components (PCSCs) encapsulated in a mobile application creation interface (MACI). The MADS dynamically maps data to be rendered in the mobile application with one or more data sources and launches the MACI. The MADS creates one or more composite software components (CSCs) by combining more than one of distinct software components selected from component sources and/or the PCSCs. The MADS inserts one or more PCSCs and/or CSCs into the MACI. The MADS generates one or more recommendations for adding one or more characteristic objects associated with the mobile application. The MADS creates the mobile application using the inserted PCSCs, the created composite software components, the recommendations, the dynamically mapped data, and/or an adaptively configured application programming interfaces that facilitate backend integration of the mobile application with the user device.
US10133554B2
A non-modular multiplier, a method for non-modular multiplication and a computational device are provided. The non-modular multiplier includes an interface and circuitry. The interface is configured to receive n-bit integers A and B. The circuitry is configured to calculate a non-modular product (A*B) by performing a sequence of computations, and to randomize a pattern of an electrical power consumed by the multiplier when performing the sequence. The sequence includes: generating a random number w, determining moduli M1 and M2 that depend on a number R=2k, k equals a bit-length of M1 and M2, and on the random number w, and calculating a first modular product C=A*B % M1 and a second modular product D=A*B % M2, and producing and outputting the non-modular product (A*B) based on the first and second modular products.
US10133542B2
A system comprising at least one processor; and at least one storage device. The storage device(s) store instructions that, when executed, cause the at least one processor to: prior to enabling output of an audio signal based on an audio data stream, detect, within the audio data stream, an indication of a target sound that corresponds to one of a plurality of sounds that are expected to cause distraction, replace, within the audio data stream, the indication of the target sound with an indication of a replacement sound, wherein the replacement sound is a less distracting version of the target sound, and after replacing the indication of the target sound with the indication of the replacement sound, output the audio data stream.
US10133541B2
An audio processing method and a computing system performing the audio processing method are provided. The computing system includes an audio processing engine and a host central processing unit (CPU). The audio processing engine determines whether it is possible for the audio processing engine to perform a first process for first audio data, based on a run time of the first process for the first audio data, and performs the first process or requests the host CPU to perform the first process, based on a result of the determination.
US10133528B2
An information processing apparatus includes a detector and a receiver. The detector detects a person. The receiver receives optical communication. The receiver does not accept reception of the optical communication when no person is detected by the detector.
US10133526B2
An image forming apparatus includes a session determining section that determines to execute a multipoint session, a first request section that enquires about whether to participate in the multipoint session to other image forming apparatuses, a group forming section that forms a group that participates in the multipoint session including the image forming apparatus and the other image forming apparatuses that have sent a response to participate in the multipoint session when the response to participate in the multipoint session is received from the other image forming apparatuses, and a second request section that enquires about whether to execute the multipoint session to all of the other image forming apparatuses included in the group.
US10133517B2
A storage control device includes a memory device and a processor. The memory device stores therein management information representing a relationship of a total amount of writable data within a warranty period of a storage device with respect to a user capacity of the storage device. The processor acquires a current user capacity and a current spare capacity from the storage device. The processor predicts, at a predetermined timing, a maximum write amount within the warranty period on basis of an accumulated amount of data written into the storage device and an operation time of the storage device. The processor restricts, when the user capacity is extended using the spare capacity, an extension amount of the user capacity on basis of the management information such that a total amount of writable data after the extension of the user capacity does not become less than the maximum write amount.
US10133511B2
An optimized segment cleaning technique is configured to efficiently clean one or more selected portions or segments of a storage array coupled to one or more nodes of a cluster. A bottom-up approach of the segment cleaning technique is configured to read all blocks of a segment to be cleaned (i.e., an “old” segment) to locate extents stored on the SSDs of the old segment and examine extent metadata to determine whether the extents are valid and, if so, relocate the valid extents to a segment being written (i.e., a “new” segment). A top-down approach of the segment cleaning technique obviates reading of the blocks of the old segment to locate the extents and, instead, examines the extent metadata to determine the valid extents of the old segment. A hybrid approach may extend the top-down approach to include only full stripe read operations needed for relocation and reconstruction of blocks as well as retrieval of valid extents from the stripes, while also avoiding any unnecessary read operations of the bottom-down approach.
US10133510B2
A system, method, and program product are disclosed for asynchronous remote copy. One method includes transmitting a write request to a remote primary storage cluster for an asynchronous remote copy operation. The method also includes creating an entry in a write record stored in the local memory, the entry comprising a data consistency value, and removing the entry from the write record in response to receiving an acknowledgement from a remote secondary storage cluster that the asynchronous remote copy operation is completed.
US10133502B2
For adaptive similarity search resolution in a data deduplication system using a processor device in a computing environment, multiple resolution levels are configured for a similarity search. Input similarity elements are calculated in one resolution level for a chunk of input data. The input similarity elements of the one resolution level are used to find similar data in a repository of data where similarity elements of the stored similar repository data are of the multiple resolution levels.
US10133501B2
A data generating apparatus is provided that includes a memory storing a program and a processor configured to execute the program to implement processes of sequentially acquiring n sets of data (where n is an integer greater than or equal to 2) included in a predetermined section of time series data and calculating, based on the acquired data, parameter information satisfying a polynomial of degree (k−1) including k random numbers (where k is an integer greater than or equal to 1 and less than n); generating a signature value by adding a signature to secret information based on a secret sharing protocol, the secret information being calculable by acquiring k sets of the acquired data and the parameter information calculated based on the acquired data; and outputting output data including the signature value and a set of the acquired data and the parameter information calculated based on the acquired data.
US10133496B1
The disclosed techniques may employ components referred to herein as atoms for computing and maintaining of states. Unlike traditional actors, atoms may be capable of binding to other atoms to form a bound combination of atoms, referred to herein as a molecule. In some examples, while bound to other atoms, an atom may operate in a manner that is different from traditional actors. For example, in some cases, atoms that are bound to one another may be prohibited from concurrently performing different operations on their own separate states. Additionally, bound atoms may be operable to collectively (e.g., synchronously) perform shared operations on their associated states. Furthermore, a shared operation performed on the states of bound atoms may be performed atomically. Also, in some examples, bound atoms may be capable of communicating synchronously with one another and of synchronously accessing each other's states.
US10133494B2
A method, computer program product, and computing system for defining an optimal execution time (t) for a concurrent memory operation to be performed on a transactional memory system. An abort probability (p) is associated with the optimal execution time (t) based, at least in part, upon a probability curve. The probability curve is empirically derived and based upon the performance of the transactional memory system. A probable execution time (Ttm) is determined for the concurrent memory operation based, at least in part, upon the abort probability (p).
US10133491B2
A method for updating a control device having a first processor core and having a first flash memory associated with the first processor core, in which the first processor core works with a first block of the first flash memory, in which while it is working, a second block, electronically separate from the first block, of the first flash memory is reprogrammed with a predefined memory image; and in which after reprogramming, the first processor core is switched over from the first block of the first flash memory to the second block of the first flash memory.
US10133480B2
A method for adjusting an input-method keyboard includes: recording the sliding trajectories of a user's two fingers, and the trajectories include two starting contact points and two ending contact points of the two-finger sliding gesture; calculating an adjustment ratio according to the sliding trajectories; obtaining the current state of the input-method keyboard, and the state can be one of a maximum state, an intermediate state and a minimum state; and adjusting the size and/or layout of the current input-method keyboard according to the adjustment ratio and the current state of the input-method keyboard. The mobile terminal for adjusting an input-method keyboard includes a recording module, a calculation module, an acquisition module and an adjustment module. This method allows users to intuitively modify the size and layout of the input-method keyboard comprehensively, thus avoids accidental operation, enhances the user experience and strengthens the reputation and competence of the product.
US10133479B2
A method of text entry for an electronic device comprising: receiving a sequence of keystrokes performed over a plurality of keys of a keyboard of the electronic device, wherein a single keystroke enters a single letter location in a word, and wherein the set of the keystrokes comprises a first set of keystrokes for single letter entries that select single letter in an alphabet and a second set of keystrokes for letter group entries that selects a group of possible letters from the alphabet for a single letter location; creating list of possible words the user intends to enter based on a priori database of words by searching in the word database words having letters that match the sequence of letter entries; and displaying the list of possible words to a user, receiving the user selection of a desired word and providing the selected word for further processing.
US10133473B2
An input apparatus includes a touch pad including a virtual touch area, the touch area being divided into one or more touch areas according to an operation screen of a display, the display providing a screen corresponding to the divided touch area, and a controller controlling the division of the touch area and displaying of the display.
US10133455B2
A live presentation may be prepared and displayed by providing a primary scripting room for preparing a presentation script and a control computer in the primary scripting computer for use by a control operator to view and/or edit possible contributions to the presentation script and for saving the presentation script being preparing. At least one remote scripting room may be connected to the primary scripting room by network to form a virtual scripting room therewith. A remote computer may be provided in the remote scripting room for operation by a contributor to provide possible contributions to the presentation script viewable by the remote operator. At least portions of the saved scripted presentation may be presented on a display computer as the live presentation.
US10133450B2
A communications system is provided which comprises (a) a platform having a plurality of tenants associated therewith, wherein each tenant has a set of mobile communications devices associated with it which has a plurality of members, wherein each mobile communications device in the set maintains an open connection to a communications network and is equipped with a graphical user interface (GUI); and (b) for each of the plurality of tenants, a group of offers selected by the tenant which are displayed on the GUI of each member of the set of mobile communications devices associated with that tenant.
US10133435B2
A method and related processing system and input device are disclosed, the method comprising driving a first capacitive sensing signal having a predefined first sensing frequency onto a first group of a plurality of sensor electrodes, and acquiring first capacitive measurements of resulting signals received by a second group of the plurality of sensor electrodes. Acquiring first capacitive measurements comprises applying a first demodulation signal having a predefined mixing period defined within a sensing period associated with the first sensing frequency. The method further comprises operating, based on the first demodulation signal, one or more switching elements coupled with one or more sensor electrodes of the first group or the second group, wherein the one or more switching elements are in a conducting state during the mixing period.
US10133431B2
The present invention relates to a touch panel capable of detecting a capacitive touch input of a finger of a human body or a touch input tool having conduction characteristics similar to those of the finger, and more particularly, to a structure of a touch panel having a high resolution so as to detect a touch input tool having a diameter smaller than a unit pi. In a touch panel having a high resolution according to an exemplary embodiment of the present invention, it is possible to maintain high touch sensitivity while minimizing a change in structures of touch patterns depending on a size or a purpose of the touch panel.
US10133430B2
A computing device including a capacitive touch screen and a processor configured to receive a capacitive image from the capacitive touch screen, determine that the capacitive image includes an image of a capacitive tag, identify a pattern of capacitive elements of the capacitive tag based on the capacitive image, determine bits of encoded data based on the identified pattern of capacitive elements, and process the encoded data.
US10133428B2
A flexible display device including a flexible substrate and a conductive pattern. The flexible substrate includes a bending part in which a bending occurs. At least a portion of the conductive pattern is disposed on the bending part and the conductive pattern includes grains. Each grain has a grain size of about 10 nm to about 100 nm.
US10133426B2
A reflective display includes an array of reflective pixels in or beneath a display viewing area for viewing electronically displayed information. A layer is located on or over the display viewing area through which the display viewing area is viewed and a plurality of micro-LEDs is located on the layer in the display viewing area and arranged to emit light toward the display viewing area. A plurality of conductors is located on the layer and the conductors are electrically connected to the micro-LEDs. A controller is connected to the conductors to control the micro-LEDs to emit light illuminating the display viewing area.
US10133424B2
The present disclosure discloses a capacitive touch screen and a manufacturing method thereof. The capacitive touch screen comprises a substrate, a photoresist layer formed on the substrate, a reflective layer formed on the photoresist layer and a lead for a metal touch layer formed above the reflective layer and shielded by the photoresist layer in use, wherein a projection of the reflective layer on the substrate covers a projection of the lead for the metal touch layer on the substrate. With the present disclosure, the problem that the white photoresist in the existing capacitive touch screen has a high transmittance and cannot shield the lead for the metal touch layer, can be solved.
US10133418B2
A strain-sensitive structure includes two resistive structures connected in series and formed on one surface of a substrate. One resistive structure is formed with a first trace arranged in first trace pattern. The other resistive structure is formed with a second trace arranged in a second trace pattern. The first resistive structure is configured to experience strain in response to an applied stress on the substrate. The second resistive structure is configured to experience less strain in response to the applied stress on the substrate compared to the first resistive structure. Together the strain-sensitive structure and the substrate form a force sensing layer that can be included in an electronic device.