The invention relates to a full annular grating CMOS field effect transistor and a preparation method thereof. The full annular grating CMOS field effect transistor is characterized in that n-type horizontal three-dimensional monolithic integrated high-mobility nanowire arrays and p-type horizontal three-dimensional monolithic integrated high-mobility nanowire arrays grow on a silicon substrate or an SOI substrate and are arranged at intervals. The full annular grating CMOS field effect transistor comprises the silicon substrate or the SOI substrate. Through the utilization of an ALD technology, nanowires are fully surrounded by gate media and metal gate materials. The method includes the steps of preparing the p-type three-dimensional monolithic integrated nanowire arrays and the n-type three-dimensional monolithic integrated nanowire arrays and then obtaining the full annular grating CMOS field effect transistor. The full annular grating CMOS field effect transistor and the preparation method thereof can meet demands of technology nodes below 10 nm for high device performance, and can provide technology accumulation and technology support for the technology nodes below 10 nm in large-scale integrated circuits.