The invention discloses a semiconductor device with a P top layer and an N energy level. The semiconductor device comprises a P substrate, a high-voltage N well, a first P well, a second P well and a separated N energy level and P top region, the high-voltage N well is arranged in the P substrate, the first P well is formed in the P substrate with a first P+ doped region, the second P well is formed in the high-voltage N well (HVNW) with a second P+ doped region, the second P+ doped region is adjacent to an N+ doped source region, the separated N energy level and P top region is arranged in the HVNW and provided one or more layers defined by multiple P top zones and distributed among multiple N energy level zones, and the N energy level and the P top layer are defined by N-type and P-type diffusion zones arranged separately in sequence. The invention further provides a manufacturing method of the semiconductor device.