- 专利标题： SEMICONDUCTOR DIE BACKSIDE DEVICES AND METHODS OF FABRICATION THEREOF
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申请号： EP17175835.2申请日： 2017-06-13
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公开(公告)号： EP3273467A3公开(公告)日： 2018-05-30
- 发明人: GOWDA, Arun Virupaksha , TUOMINEN, Risto llkka
- 申请人： General Electric Company
- 申请人地址： 1 River Road Schenectady, NY 12345 US
- 专利权人： General Electric Company
- 当前专利权人： General Electric Company
- 当前专利权人地址： 1 River Road Schenectady, NY 12345 US
- 代理机构： Cleary, Fidelma
- 优先权： US201615194775 20160628
- 主分类号： H01L21/60
- IPC分类号： H01L21/60 ; H01L23/522 ; G01N27/12 ; B81C1/00 ; G06K19/077 ; H01L27/06 ; G02B6/42 ; H01L23/58
摘要：
A die (102) for a semiconductor chip package includes a first surface (104) including an integrated circuit (106) formed therein. The die also includes a backside surface (108) opposite the first surface. The backside surface has a total surface area (206) defining a substantially planar region (302) of the backside surface. The die further includes at least one device (132) formed on the backside surface. The at least one device includes at least one extension (136) extending from the at least one device beyond the total surface area.
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