A three-dimensional semiconductor device includes a first active region on a substrate (100), the first active region including a lower channel pattern and a lower source/drain pattern (LSD1) connected to the lower channel pattern, a second active region stacked on the first active region, the second active region including an upper channel pattern and an upper source/drain pattern (USD1) connected to the upper channel pattern, a gate electrode on the lower channel pattern and the upper channel pattern, a lower contact (LCT) electrically connected to the lower source/drain pattern, the lower contact having a bar shape extending on the lower source/drain pattern in a first direction, a first active contact (AC1) coupled to the lower contact, and a second active contact (AC2) coupled to the upper source/drain pattern. A first width of the lower source/drain pattern in a second direction is larger than a second width of the lower contact in the second direction.