一种芯片封装体包含芯片、介电接合层、载体与重布线层。芯片具有基底、焊垫与保护层。保护层位于基底上。焊垫位于保护层中。介电接合层位于保护层上，且介电接合层位于载体与保护层之间。载体、介电接合层与保护层具有连通的穿孔，使焊垫从穿孔裸露。重布线层包含连接部与被动组件部。连接部位于焊垫、穿孔的壁面与载体背对介电接合层的表面上。被动组件部位于载体的表面上，且被动组件部的一端连接在载体之表面上的连接部。

A chip package includes a chip, a dielectric bonding layer, a carrier, and a redistribution layer. The chip has a substrate, an electrical pad, and a protection layer. The protection layer is located on the substrate. The electrical pad is located in the protection layer. The dielectric bonding layer is located on the protection layer and between the carrier and the protection layer. The carrier, the dielectric bonding layer, and the protection layer has a communicated through hole, such that the electrical pad is exposed through the through hole. The redistribution layer includes a connection portion and a passive element portion. The connection portion is located on the electrical pad, the sidewall of the through hole, and a surface of the carrier facing away from the dielectric bonding layer. The passive element portion is located on the surface of the carrier, and an end of the passive element portion is connected to the connection portion that is on the surface of the carrier.